Windows ARM64 uses LLP64 model, which breaks current assumptions.
Signed-off-by: Cao Jiaxi <driver1...@foxmail.com>
---
util/cacheinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/cacheinfo.c b/util/cacheinfo.c
index 3cd080b83d..ce6f0dbf6a 100644
--- a/util/cacheinfo.c
+++ b/util/cacheinfo.c
@@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
static void arch_cache_info(int *isize, int *dsize)
{
if (*isize == 0 || *dsize == 0) {
- unsigned long ctr;
+ uintptr_t ctr;
/* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
but (at least under Linux) these are marked protected by the
--
2.17.1
