Similar to VECTOR ADD COMPUTE CARRY, however 128-bit handling only. Courtesy of Richard H.
Signed-off-by: David Hildenbrand <da...@redhat.com> --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 38d1e22a6d..a531b21908 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1062,6 +1062,8 @@ F(0xe7f1, VACC, VRR_c, V, 0, 0, 0, 0, vacc, 0, IF_VEC) /* VECTOR ADD WITH CARRY */ F(0xe7bb, VAC, VRR_d, V, 0, 0, 0, 0, vac, 0, IF_VEC) +/* VECTOR ADD WITH CARRY COMPUTE CARRY */ + F(0xe7b9, VACCC, VRR_d, V, 0, 0, 0, 0, vaccc, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index c70f380209..6fb93d9aa9 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -1142,3 +1142,35 @@ static DisasJumpType op_vac(DisasContext *s, DisasOps *o) get_field(s->fields, v4)); return DISAS_NEXT; } + +static void gen_accc2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah, + TCGv_i64 bl, TCGv_i64 bh, TCGv_i64 cl, TCGv_i64 ch) +{ + TCGv_i64 tl = tcg_temp_new_i64(); + TCGv_i64 th = tcg_temp_new_i64(); + TCGv_i64 zero = tcg_const_i64(0); + + tcg_gen_andi_i64(tl, cl, 1); + tcg_gen_add2_i64(tl, th, tl, zero, al, zero); + tcg_gen_add2_i64(tl, th, tl, th, bl, zero); + tcg_gen_add2_i64(tl, th, th, zero, ah, zero); + tcg_gen_add2_i64(tl, dl, tl, th, bh, zero); + tcg_gen_mov_i64(dh, zero); + + tcg_temp_free_i64(tl); + tcg_temp_free_i64(th); + tcg_temp_free_i64(zero); +} + +static DisasJumpType op_vaccc(DisasContext *s, DisasOps *o) +{ + if (get_field(s->fields, m5) != ES_128) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + gen_gvec128_4_i64(gen_accc2_i64, get_field(s->fields, v1), + get_field(s->fields, v2), get_field(s->fields, v3), + get_field(s->fields, v4)); + return DISAS_NEXT; +} -- 2.20.1