On 6/17/19 10:53 AM, Peter Maydell wrote: > To prevent execution priority remaining negative if the guest > returns from an NMI or HardFault with a corrupted IPSR, the > v8M interrupt deactivation process forces the HardFault and NMI > to inactive based on the current raw execution priority, > even if the interrupt the guest is trying to deactivate > is something else. In the pseudocode this is done in the > Deactivate() function. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > hw/intc/armv7m_nvic.c | 40 +++++++++++++++++++++++++++++++++++----- > 1 file changed, 35 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
