Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN value back to the base register. Starting in v7 this is UNPREDICTABLE.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org> --- target/arm/translate.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/arm/translate.c b/target/arm/translate.c index 4451adbb97..29e2eae441 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9880,6 +9880,14 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a) static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a) { + /* + * Writeback register in register list is UNPREDICATABLE + * for ArchVersion() >= 7. Prior to v7, A32 would write + * an UNKNOWN value to the base register. + */ + if (ENABLE_ARCH_7 && a->w && (a->list & (1 << a->rn))) { + return false; + } return do_ldm(s, a); } -- 2.17.1