On Monday, November 25, 2019, Filip Bozuta <filip.boz...@rt-rk.com> wrote:
> The script checkpatch.pl located in scripts folder was
> used to detect all errors and warrnings in files:
> hw/mips/mips_fulong2e.c
> hw/isa/vt82c686.c
> hw/pci-host/bonito.c
> include/hw/isa/vt82c686.h
>
> These mips Fulong 2E machine files were edited and
> all the errors and warrings generated by the checkpatch.pl
> script were corrected and then the script was
> ran again to make sure there are no more errors and warnings.
>
> Signed-off-by: Filip Bozuta <filip.boz...@rt-rk.com>
> ---
> hw/isa/vt82c686.c | 23 ++++++++++----------
> hw/pci-host/bonito.c | 60 +++++++++++++++++++++++++++++-
> ----------------------
> 2 files changed, 45 insertions(+), 38 deletions(-)
>
>
Excellent!
Reviewed-by: Aleksandar Markovic <amarko...@wavecomp.com>
> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> index 616f67f..f828708 100644
> --- a/hw/isa/vt82c686.c
> +++ b/hw/isa/vt82c686.c
> @@ -27,7 +27,7 @@
> #include "qemu/timer.h"
> #include "exec/address-spaces.h"
>
> -//#define DEBUG_VT82C686B
> +/* #define DEBUG_VT82C686B */
>
> #ifdef DEBUG_VT82C686B
> #define DPRINTF(fmt, ...) fprintf(stderr, "%s: " fmt, __func__,
> ##__VA_ARGS__)
> @@ -35,8 +35,7 @@
> #define DPRINTF(fmt, ...)
> #endif
>
> -typedef struct SuperIOConfig
> -{
> +typedef struct SuperIOConfig {
> uint8_t config[0x100];
> uint8_t index;
> uint8_t data;
> @@ -102,7 +101,7 @@ static uint64_t superio_ioport_readb(void *opaque,
> hwaddr addr, unsigned size)
> SuperIOConfig *superio_conf = opaque;
>
> DPRINTF("superio_ioport_readb address 0x%x\n", addr);
> - return (superio_conf->config[superio_conf->index]);
> + return superio_conf->config[superio_conf->index];
> }
>
> static const MemoryRegionOps superio_ops = {
> @@ -143,7 +142,7 @@ static void vt82c686b_isa_reset(DeviceState *dev)
> }
>
> /* write config pci function0 registers. PCI-ISA bridge */
> -static void vt82c686b_write_config(PCIDevice * d, uint32_t address,
> +static void vt82c686b_write_config(PCIDevice *d, uint32_t address,
> uint32_t val, int len)
> {
> VT82C686BState *vt686 = VT82C686B_DEVICE(d);
> @@ -365,7 +364,7 @@ static void vt82c686b_pm_realize(PCIDevice *dev, Error
> **errp)
> pci_set_long(pci_conf + 0x48, 0x00000001);
>
> /* SMB ports:0xeee0~0xeeef */
> - s->smb_io_base =((s->smb_io_base & 0xfff0) + 0x0);
> + s->smb_io_base = ((s->smb_io_base & 0xfff0) + 0x0);
> pci_conf[0x90] = s->smb_io_base | 1;
> pci_conf[0x91] = s->smb_io_base >> 8;
> pci_conf[0xd2] = 0x90;
> @@ -462,16 +461,18 @@ static void vt82c686b_realize(PCIDevice *d, Error
> **errp)
>
> wmask = d->wmask;
> for (i = 0x00; i < 0xff; i++) {
> - if (i<=0x03 || (i>=0x08 && i<=0x3f)) {
> - wmask[i] = 0x00;
> - }
> + if (i <= 0x03 || (i >= 0x08 && i <= 0x3f)) {
> + wmask[i] = 0x00;
> + }
> }
>
> memory_region_init_io(&vt82c->superio, OBJECT(d), &superio_ops,
> &vt82c->superio_conf, "superio", 2);
> memory_region_set_enabled(&vt82c->superio, false);
> - /* The floppy also uses 0x3f0 and 0x3f1.
> - * But we do not emulate a floppy, so just set it here. */
> + /*
> + * The floppy also uses 0x3f0 and 0x3f1.
> + * But we do not emulate a floppy, so just set it here.
> + */
> memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
> &vt82c->superio);
> }
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index ceee463..4692d41 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -14,7 +14,8 @@
> * fulong 2e mini pc has a bonito north bridge.
> */
>
> -/* what is the meaning of devfn in qemu and IDSEL in bonito northbridge?
> +/*
> + * what is the meaning of devfn in qemu and IDSEL in bonito northbridge?
> *
> * devfn pci_slot<<3 + funno
> * one pci bus can have 32 devices and each device can have 8 functions.
> @@ -49,7 +50,7 @@
> #include "sysemu/runstate.h"
> #include "exec/address-spaces.h"
>
> -//#define DEBUG_BONITO
> +/* #define DEBUG_BONITO */
>
> #ifdef DEBUG_BONITO
> #define DPRINTF(fmt, ...) fprintf(stderr, "%s: " fmt, __func__,
> ##__VA_ARGS__)
> @@ -60,45 +61,45 @@
> /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/
> #define BONITO_BOOT_BASE 0x1fc00000
> #define BONITO_BOOT_SIZE 0x00100000
> -#define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1)
> +#define BONITO_BOOT_TOP (BONITO_BOOT_BASE + BONITO_BOOT_SIZE - 1)
> #define BONITO_FLASH_BASE 0x1c000000
> #define BONITO_FLASH_SIZE 0x03000000
> -#define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1)
> +#define BONITO_FLASH_TOP (BONITO_FLASH_BASE + BONITO_FLASH_SIZE -
> 1)
> #define BONITO_SOCKET_BASE 0x1f800000
> #define BONITO_SOCKET_SIZE 0x00400000
> -#define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1)
> +#define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE + BONITO_SOCKET_SIZE
> - 1)
> #define BONITO_REG_BASE 0x1fe00000
> #define BONITO_REG_SIZE 0x00040000
> -#define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1)
> +#define BONITO_REG_TOP (BONITO_REG_BASE + BONITO_REG_SIZE - 1)
> #define BONITO_DEV_BASE 0x1ff00000
> #define BONITO_DEV_SIZE 0x00100000
> -#define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1)
> +#define BONITO_DEV_TOP (BONITO_DEV_BASE + BONITO_DEV_SIZE - 1)
> #define BONITO_PCILO_BASE 0x10000000
> #define BONITO_PCILO_BASE_VA 0xb0000000
> #define BONITO_PCILO_SIZE 0x0c000000
> -#define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1)
> +#define BONITO_PCILO_TOP (BONITO_PCILO_BASE + BONITO_PCILO_SIZE -
> 1)
> #define BONITO_PCILO0_BASE 0x10000000
> #define BONITO_PCILO1_BASE 0x14000000
> #define BONITO_PCILO2_BASE 0x18000000
> #define BONITO_PCIHI_BASE 0x20000000
> #define BONITO_PCIHI_SIZE 0x20000000
> -#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1)
> +#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE -
> 1)
> #define BONITO_PCIIO_BASE 0x1fd00000
> #define BONITO_PCIIO_BASE_VA 0xbfd00000
> #define BONITO_PCIIO_SIZE 0x00010000
> -#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1)
> +#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE + BONITO_PCIIO_SIZE -
> 1)
> #define BONITO_PCICFG_BASE 0x1fe80000
> #define BONITO_PCICFG_SIZE 0x00080000
> -#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1)
> +#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE + BONITO_PCICFG_SIZE
> - 1)
>
>
> #define BONITO_PCICONFIGBASE 0x00
> #define BONITO_REGBASE 0x100
>
> -#define BONITO_PCICONFIG_BASE (BONITO_PCICONFIGBASE+BONITO_REG_BASE)
> +#define BONITO_PCICONFIG_BASE (BONITO_PCICONFIGBASE + BONITO_REG_BASE)
> #define BONITO_PCICONFIG_SIZE (0x100)
>
> -#define BONITO_INTERNAL_REG_BASE (BONITO_REGBASE+BONITO_REG_BASE)
> +#define BONITO_INTERNAL_REG_BASE (BONITO_REGBASE + BONITO_REG_BASE)
> #define BONITO_INTERNAL_REG_SIZE (0x70)
>
> #define BONITO_SPCICONFIG_BASE (BONITO_PCICFG_BASE)
> @@ -111,7 +112,7 @@
>
> #define BONITO_BONPONCFG (0x00 >> 2) /* 0x100 */
> #define BONITO_BONGENCFG_OFFSET 0x4
> -#define BONITO_BONGENCFG (BONITO_BONGENCFG_OFFSET>>2) /*0x104 */
> +#define BONITO_BONGENCFG (BONITO_BONGENCFG_OFFSET >> 2) /*0x104
> */
>
> /* 2. IO & IDE configuration */
> #define BONITO_IODEVCFG (0x08 >> 2) /* 0x108 */
> @@ -177,15 +178,15 @@
> /* idsel BIT = pci slot number +12 */
> #define PCI_SLOT_BASE 12
> #define PCI_IDSEL_VIA686B_BIT (17)
> -#define PCI_IDSEL_VIA686B (1<<PCI_IDSEL_VIA686B_BIT)
> +#define PCI_IDSEL_VIA686B (1 << PCI_IDSEL_VIA686B_BIT)
>
> -#define PCI_ADDR(busno,devno,funno,regno) \
> - ((((busno)<<16)&0xff0000) + (((devno)<<11)&0xf800) +
> (((funno)<<8)&0x700) + (regno))
> +#define PCI_ADDR(busno , devno , funno , regno) \
> + ((((busno) << 16) & 0xff0000) + (((devno) << 11) & 0xf800) + \
> + (((funno) << 8) & 0x700) + (regno))
>
> typedef struct BonitoState BonitoState;
>
> -typedef struct PCIBonitoState
> -{
> +typedef struct PCIBonitoState {
> PCIDevice dev;
>
> BonitoState *pcihost;
> @@ -239,7 +240,8 @@ static void bonito_writel(void *opaque, hwaddr addr,
>
> saddr = addr >> 2;
>
> - DPRINTF("bonito_writel "TARGET_FMT_plx" val %x saddr %x\n", addr,
> val, saddr);
> + DPRINTF("bonito_writel "TARGET_FMT_plx" val %x saddr %x\n",
> + addr, val, saddr);
> switch (saddr) {
> case BONITO_BONPONCFG:
> case BONITO_IODEVCFG:
> @@ -363,7 +365,7 @@ static uint64_t bonito_ldma_readl(void *opaque, hwaddr
> addr,
> return 0;
> }
>
> - val = ((uint32_t *)(&s->bonldma))[addr/sizeof(uint32_t)];
> + val = ((uint32_t *)(&s->bonldma))[addr / sizeof(uint32_t)];
>
> return val;
> }
> @@ -377,7 +379,7 @@ static void bonito_ldma_writel(void *opaque, hwaddr
> addr,
> return;
> }
>
> - ((uint32_t *)(&s->bonldma))[addr/sizeof(uint32_t)] = val &
> 0xffffffff;
> + ((uint32_t *)(&s->bonldma))[addr / sizeof(uint32_t)] = val &
> 0xffffffff;
> }
>
> static const MemoryRegionOps bonito_ldma_ops = {
> @@ -400,7 +402,7 @@ static uint64_t bonito_cop_readl(void *opaque, hwaddr
> addr,
> return 0;
> }
>
> - val = ((uint32_t *)(&s->boncop))[addr/sizeof(uint32_t)];
> + val = ((uint32_t *)(&s->boncop))[addr / sizeof(uint32_t)];
>
> return val;
> }
> @@ -414,7 +416,7 @@ static void bonito_cop_writel(void *opaque, hwaddr
> addr,
> return;
> }
>
> - ((uint32_t *)(&s->boncop))[addr/sizeof(uint32_t)] = val & 0xffffffff;
> + ((uint32_t *)(&s->boncop))[addr / sizeof(uint32_t)] = val &
> 0xffffffff;
> }
>
> static const MemoryRegionOps bonito_cop_ops = {
> @@ -446,7 +448,8 @@ static uint32_t bonito_sbridge_pciaddr(void *opaque,
> hwaddr addr)
> cfgaddr = addr & 0xffff;
> cfgaddr |= (s->regs[BONITO_PCIMAP_CFG] & 0xffff) << 16;
>
> - idsel = (cfgaddr & BONITO_PCICONF_IDSEL_MASK) >>
> BONITO_PCICONF_IDSEL_OFFSET;
> + idsel = (cfgaddr & BONITO_PCICONF_IDSEL_MASK) >>
> + BONITO_PCICONF_IDSEL_OFFSET;
> devno = ctz32(idsel);
> funno = (cfgaddr & BONITO_PCICONF_FUN_MASK) >>
> BONITO_PCICONF_FUN_OFFSET;
> regno = (cfgaddr & BONITO_PCICONF_REG_MASK) >>
> BONITO_PCICONF_REG_OFFSET;
> @@ -550,7 +553,7 @@ static void pci_bonito_set_irq(void *opaque, int
> irq_num, int level)
> }
>
> /* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused)
> */
> -static int pci_bonito_map_irq(PCIDevice * pci_dev, int irq_num)
> +static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> {
> int slot;
>
> @@ -618,7 +621,10 @@ static void bonito_realize(PCIDevice *dev, Error
> **errp)
> SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
> PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
>
> - /* Bonito North Bridge, built on FPGA, VENDOR_ID/DEVICE_ID are
> "undefined" */
> + /*
> + * Bonito North Bridge, built on FPGA,
> + * VENDOR_ID/DEVICE_ID are "undefined"
> + */
> pci_config_set_prog_interface(dev->config, 0x00);
>
> /* set the north bridge register mapping */
> --
> 2.7.4
>
>
>
