On Monday, March 16, 2020, Aleksandar Markovic <aleksandar.m.m...@gmail.com>
wrote:
>
>
> On Monday, March 16, 2020, Philippe Mathieu-Daudé <phi...@redhat.com>
> wrote:
>
>> Move out x86-specific structures from generic machine code.
>>
>>
> Philippe,
>
> I a kind of have hard time understanding what is achieved with this patch.
> Is this pure code moving/reorganization? What is the logical connection
> between this patch and the whole series (that is about removing unneeded
> building for user mode)? How does this patch affect build time for user
> mode?
>
> Sincerely,
> Aleksandar
>
>
Ugh, I think I mixed up your two series. You write too much code. :) ;)
>
>
>> Acked-by: Richard Henderson <richard.hender...@linaro.org>
>> Signed-off-by: Philippe Mathieu-Daudé <phi...@redhat.com>
>> ---
>> qapi/machine-target.json | 45 ++++++++++++++++++++++++++++++++++++++
>> qapi/machine.json | 42 -----------------------------------
>> target/i386/cpu.c | 2 +-
>> target/i386/machine-stub.c | 22 +++++++++++++++++++
>> target/i386/Makefile.objs | 3 ++-
>> 5 files changed, 70 insertions(+), 44 deletions(-)
>> create mode 100644 target/i386/machine-stub.c
>>
>> diff --git a/qapi/machine-target.json b/qapi/machine-target.json
>> index f2c82949d8..fb7a4b7850 100644
>> --- a/qapi/machine-target.json
>> +++ b/qapi/machine-target.json
>> @@ -3,6 +3,51 @@
>> # This work is licensed under the terms of the GNU GPL, version 2 or
>> later.
>> # See the COPYING file in the top-level directory.
>>
>> +##
>> +# @X86CPURegister32:
>> +#
>> +# A X86 32-bit register
>> +#
>> +# Since: 1.5
>> +##
>> +{ 'enum': 'X86CPURegister32',
>> + 'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ],
>> + 'if': 'defined(TARGET_I386)' }
>> +
>> +##
>> +# @X86CPUFeatureWordInfo:
>> +#
>> +# Information about a X86 CPU feature word
>> +#
>> +# @cpuid-input-eax: Input EAX value for CPUID instruction for that
>> feature word
>> +#
>> +# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
>> +# feature word
>> +#
>> +# @cpuid-register: Output register containing the feature bits
>> +#
>> +# @features: value of output register, containing the feature bits
>> +#
>> +# Since: 1.5
>> +##
>> +{ 'struct': 'X86CPUFeatureWordInfo',
>> + 'data': { 'cpuid-input-eax': 'int',
>> + '*cpuid-input-ecx': 'int',
>> + 'cpuid-register': 'X86CPURegister32',
>> + 'features': 'int' },
>> + 'if': 'defined(TARGET_I386)' }
>> +
>> +##
>> +# @DummyForceArrays:
>> +#
>> +# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList
>> internally
>> +#
>> +# Since: 2.5
>> +##
>> +{ 'struct': 'DummyForceArrays',
>> + 'data': { 'unused': ['X86CPUFeatureWordInfo'] },
>> + 'if': 'defined(TARGET_I386)' }
>> +
>> ##
>> # @CpuModelInfo:
>> #
>> diff --git a/qapi/machine.json b/qapi/machine.json
>> index 6c11e3cf3a..de05730704 100644
>> --- a/qapi/machine.json
>> +++ b/qapi/machine.json
>> @@ -505,48 +505,6 @@
>> 'dst': 'uint16',
>> 'val': 'uint8' }}
>>
>> -##
>> -# @X86CPURegister32:
>> -#
>> -# A X86 32-bit register
>> -#
>> -# Since: 1.5
>> -##
>> -{ 'enum': 'X86CPURegister32',
>> - 'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
>> -
>> -##
>> -# @X86CPUFeatureWordInfo:
>> -#
>> -# Information about a X86 CPU feature word
>> -#
>> -# @cpuid-input-eax: Input EAX value for CPUID instruction for that
>> feature word
>> -#
>> -# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
>> -# feature word
>> -#
>> -# @cpuid-register: Output register containing the feature bits
>> -#
>> -# @features: value of output register, containing the feature bits
>> -#
>> -# Since: 1.5
>> -##
>> -{ 'struct': 'X86CPUFeatureWordInfo',
>> - 'data': { 'cpuid-input-eax': 'int',
>> - '*cpuid-input-ecx': 'int',
>> - 'cpuid-register': 'X86CPURegister32',
>> - 'features': 'int' } }
>> -
>> -##
>> -# @DummyForceArrays:
>> -#
>> -# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList
>> internally
>> -#
>> -# Since: 2.5
>> -##
>> -{ 'struct': 'DummyForceArrays',
>> - 'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
>> -
>> ##
>> # @NumaCpuOptions:
>> #
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index a84553e50c..0753fe4935 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -37,7 +37,7 @@
>> #include "qemu/option.h"
>> #include "qemu/config-file.h"
>> #include "qapi/error.h"
>> -#include "qapi/qapi-visit-machine.h"
>> +#include "qapi/qapi-visit-machine-target.h"
>> #include "qapi/qapi-visit-run-state.h"
>> #include "qapi/qmp/qdict.h"
>> #include "qapi/qmp/qerror.h"
>> diff --git a/target/i386/machine-stub.c b/target/i386/machine-stub.c
>> new file mode 100644
>> index 0000000000..cb301af057
>> --- /dev/null
>> +++ b/target/i386/machine-stub.c
>> @@ -0,0 +1,22 @@
>> +/*
>> + * QAPI x86 CPU features stub
>> + *
>> + * Copyright (c) 2020 Red Hat, Inc.
>> + *
>> + * Author:
>> + * Philippe Mathieu-Daudé <phi...@redhat.com>
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or
>> later.
>> + * See the COPYING file in the top-level directory.
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qapi/error.h"
>> +#include "qapi/qapi-visit-machine-target.h"
>> +
>> +void visit_type_X86CPUFeatureWordInfoList(Visitor *v, const char *name,
>> + X86CPUFeatureWordInfoList **obj,
>> + Error **errp)
>> +{
>> +}
>> diff --git a/target/i386/Makefile.objs b/target/i386/Makefile.objs
>> index 48e0c28434..1cdfc9f50c 100644
>> --- a/target/i386/Makefile.objs
>> +++ b/target/i386/Makefile.objs
>> @@ -17,6 +17,7 @@ obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-posix.o
>> endif
>> obj-$(CONFIG_HVF) += hvf/
>> obj-$(CONFIG_WHPX) += whpx-all.o
>> -endif
>> +endif # CONFIG_SOFTMMU
>> obj-$(CONFIG_SEV) += sev.o
>> obj-$(call lnot,$(CONFIG_SEV)) += sev-stub.o
>> +obj-$(call lnot,$(CONFIG_SOFTMMU)) += machine-stub.o
>> --
>> 2.21.1
>>
>>
>>
