This patch series add several newly introduced 32/64-bit vector
instructions in Power ISA 3.1. Power ISA 3.1 flag is introduced in
this version. In v3 version, coding style issues are fixed, community
reviews/suggestions are taken into consideration.
Lijun Pan (8):
target/ppc: Introduce Power ISA 3.1 flag
target/ppc: add byte-reverse br[dwh] instructions
target/ppc: convert vmuluwm to tcg_gen_gvec_mul
target/ppc: add vmulld instruction
target/ppc: add vmulh{su}w instructions
fix the prototype of muls64/mulu64
target/ppc: add vmulh{su}d instructions
target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions
include/qemu/host-utils.h | 4 +-
target/ppc/cpu.h | 4 +-
target/ppc/helper.h | 13 ++++-
target/ppc/int_helper.c | 74 ++++++++++++++++++++++++-----
target/ppc/translate.c | 41 ++++++++++++++++
target/ppc/translate/vmx-impl.inc.c | 26 +++++++++-
target/ppc/translate/vmx-ops.inc.c | 27 +++++++++--
target/ppc/translate_init.inc.c | 2 +-
tcg/ppc/tcg-target.h | 2 +
tcg/ppc/tcg-target.inc.c | 7 ++-
10 files changed, 175 insertions(+), 25 deletions(-)
--
2.23.0
