On Sat, 29 Aug 2020 at 00:38, Richard Henderson <richard.hender...@linaro.org> wrote: > > On 8/28/20 11:33 AM, Peter Maydell wrote: > > Convert the Neon floating-point VMUL, VMLA and VMLS to use gvec, > > and use this to implement fp16 support. > > > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > > Reviewed-by: Richard Henderson <richard.hender...@linaro.org> > > > + /* a->vm is M:Vm, which encodes both register and index */ > > + idx = extract32(a->vm, a->size + 2, 2); > > + a->vm = extract32(a->vm, 0, a->size + 2); > > I know this is what the current code does, but I tend to think that this is > better done in decode.
Yeah, I thought that too as I was writing it, but I didn't want to mess with the decode in this patchset, especially given it would have meant I needed to touch all the non-fp scalar-indexed operations too... -- PMM
