From: Xuzhou Cheng <xuzhou.ch...@windriver.com> When a write to ECSPI_CONREG register to disable the SPI controller, imx_spi_soft_reset() is called to reset the controller, but chip select lines should have been disabled, otherwise the state machine of any devices (e.g.: SPI flashes) connected to the SPI master is stuck to its last state and responds incorrectly to any follow-up commands.
Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller") Signed-off-by: Xuzhou Cheng <xuzhou.ch...@windriver.com> Signed-off-by: Bin Meng <bin.m...@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> Message-id: 20210129132323.30946-8-bmeng...@gmail.com Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> --- hw/ssi/imx_spi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index 4cfbb73e35e..2fb65498c3b 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -254,9 +254,15 @@ static void imx_spi_common_reset(IMXSPIState *s) static void imx_spi_soft_reset(IMXSPIState *s) { + int i; + imx_spi_common_reset(s); imx_spi_update_irq(s); + + for (i = 0; i < ECSPI_NUM_CS; i++) { + qemu_set_irq(s->cs_lines[i], 1); + } } static void imx_spi_reset(DeviceState *dev) -- 2.20.1