> -----Original Message-----
> From: Alessandro Di Federico <ale.q...@rev.ng>
> Sent: Saturday, June 19, 2021 3:37 AM
> To: qemu-devel@nongnu.org
> Cc: Taylor Simpson <tsimp...@quicinc.com>; Brian Cain
> <bc...@quicinc.com>; bab...@rev.ng; ni...@rev.ng; phi...@redhat.com;
> richard.hender...@linaro.org; Alessandro Di Federico <a...@rev.ng>
> Subject: [PATCH v5 04/14] target/hexagon: make slot number an unsigned
I'm curious why this is needed. Is there a bug caused by having it be signed?
>
> From: Paolo Montesel <bab...@rev.ng>
>
> Signed-off-by: Alessandro Di Federico <a...@rev.ng>
> Signed-off-by: Paolo Montesel <bab...@rev.ng>
> Acked-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/hexagon/genptr.c | 6 ++++--
> target/hexagon/macros.h | 2 +-
Run the following in your git repo so the .h files will appear first in the
patch.
git config diff.orderFile scripts/git.orderfile
This makes it easier for the community to review
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index
> 797a6c0cc9..3b8013d4e2 100644
> --- a/target/hexagon/genptr.c
> +++ b/target/hexagon/genptr.c
> @@ -33,7 +33,8 @@ static inline TCGv gen_read_preg(TCGv pred, uint8_t
> num)
> return pred;
> }
>
> -static inline void gen_log_predicated_reg_write(int rnum, TCGv val, int slot)
> +static inline void gen_log_predicated_reg_write(int rnum, TCGv val,
> + unsigned slot)
Let's use uint32_t to match insn->slot that is passed to these functions.
