Re: [RFC 1/6] target/riscv: rvk: add flag support for Zbk[bcx]

[Richard Henderson]

On 11/1/21 11:11 PM, liweiwei wrote:

+++ b/target/riscv/cpu.c
@@ -472,15 +472,15 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
**errp)
              error_setg(errp,
                         "I and E extensions are incompatible");
                         return;
-       }
+        }

if (!cpu->cfg.ext_i && !cpu->cfg.ext_e) {

              error_setg(errp,
                         "Either I or E extension must be set");
                         return;
-       }
+        }

- if (cpu->cfg.ext_g && !(cpu->cfg.ext_i & cpu->cfg.ext_m &

+        if (cpu->cfg.ext_g && !(cpu->cfg.ext_i & cpu->cfg.ext_m &
                                 cpu->cfg.ext_a & cpu->cfg.ext_f &
                                 cpu->cfg.ext_d)) {
              warn_report("Setting G will also set IMAFD");

This re-indentation should not be happening.

+    DEFINE_PROP_BOOL("x-zbkb", RISCVCPU, cfg.ext_zbkb, false),
+    DEFINE_PROP_BOOL("x-zbkc", RISCVCPU, cfg.ext_zbkc, false),
+    DEFINE_PROP_BOOL("x-zbkx", RISCVCPU, cfg.ext_zbkx, false),

The properties cannot be exposed until the end.

         bool ext_zbb;
         bool ext_zbc;
         bool ext_zbs;
+        bool ext_zbkb;
+        bool ext_zbkc;
+        bool ext_zbkx;

Better to keep them alphabetical: zbk* < zbs.


r~