On Wed, Dec 15, 2021 at 1:00 AM Nikita Shubin <nikita.shu...@maquefel.me> wrote: > > From: Nikita Shubin <n.shu...@yadro.com> > > As per the privilege specification, any access from S/U mode should fail > if no pmp region is configured and pmp is present, othwerwise access > should succeed. > > Fixes: d102f19a208 (target/riscv/pmp: Raise exception if no PMP entry is > configured) > Signed-off-by: Nikita Shubin <n.shu...@yadro.com>
Whoops! I sent a patch to fix the exact same issue :) I'll drop mine and we can merge yours. Do you mind adding this and resending the patch Resolves: https://gitlab.com/qemu-project/qemu/-/issues/585 Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Alistair > --- > target/riscv/op_helper.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c > index ee7c24efe7..58d992e98a 100644 > --- a/target/riscv/op_helper.c > +++ b/target/riscv/op_helper.c > @@ -146,7 +146,8 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong > cpu_pc_deb) > uint64_t mstatus = env->mstatus; > target_ulong prev_priv = get_field(mstatus, MSTATUS_MPP); > > - if (!pmp_get_num_rules(env) && (prev_priv != PRV_M)) { > + if (riscv_feature(env, RISCV_FEATURE_PMP) && > + !pmp_get_num_rules(env) && (prev_priv != PRV_M)) { > riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); > } > > -- > 2.31.1 > >