On Thu, 24 Feb 2022 at 13:50, Amir Gonnen <amir.gon...@neuroblade.ai> wrote: > > Demonstrate how to use nios2 VIC on a machine. > Introduce a new machine "10m50-ghrd-vic" which is based on "10m50-ghrd" > with a VIC attached and internal interrupt controller removed. > > When VIC is present, irq0 connects the VIC to the cpu, intc_present > is set to false to disable the internal interrupt controller, and the > devices on the machine are attached to the VIC (and not directly to cpu). > To allow VIC update EIC fields, we set the "cpu" property of the VIC > with a reference to the nios2 cpu. > > Signed-off-by: Amir Gonnen <amir.gon...@neuroblade.ai>
Is a VIC a configurable option on the real hardware (well, FPGA image, I guess) that this board is modelling ? I couldn't find any docs on it with a quick google. Also, I wonder if we should have a vic machine option to the machine rather than creating a whole new machine type? thanks -- PMM
