On Mon, Mar 28, 2022 at 3:03 PM Tian, Kevin <kevin.t...@intel.com> wrote:
>
> > From: Jason Wang
> > Sent: Monday, March 21, 2022 1:54 PM
> >
> > + /*
> > + * vtd-spec v3.4 3.14:
> > + *
> > + * """
> > + * Requests-with-PASID with input address in range 0xFEEx_xxxx are
> > + * translated normally like any other request-with-PASID through
> > + * DMA-remapping hardware. However, if such a request is processed
> > + * using pass-through translation, it will be blocked as described
> > + * in the paragraph below.
>
> While PASID+PT is blocked as described in the below paragraph, the
> paragraph itself applies to all situations:
>
> 1) PT + noPASID
> 2) translation + noPASID
> 3) PT + PASID
> 4) translation + PASID
>
> because...
>
> > + *
> > + * Software must not program paging-structure entries to remap any
> > + * address to the interrupt address range. Untranslated requests
> > + * and translation requests that result in an address in the
> > + * interrupt range will be blocked with condition code LGN.4 or
> > + * SGN.8.
>
> ... if you look at the definition of LGN.4 or SGN.8:
>
> LGN.4: When legacy mode (RTADDR_REG.TTM=00b) is enabled, hardware
> detected an output address (i.e. address after remapping) in the
> interrupt address range (0xFEEx_xxxx). For Translated requests and
> requests with pass-through translation type (TT=10), the output
> address is the same as the address in the request
>
> The last sentence in the first paragraph above just highlights the fact that
> when input address of PT is in interrupt range then it is blocked by LGN.4
> or SGN.8 due to output address also in interrupt range.
>
> > + * """
> > + *
> > + * We enable per as memory region (iommu_ir_fault) for catching
> > + * the tranlsation for interrupt range through PASID + PT.
> > + */
> > + if (pt && as->pasid != PCI_NO_PASID) {
> > + memory_region_set_enabled(&as->iommu_ir_fault, true);
> > + } else {
> > + memory_region_set_enabled(&as->iommu_ir_fault, false);
> > + }
> > +
>
> Given above this should be a bug fix for nopasid first and then apply it
> to pasid path too.
Actually, nopasid path patches were posted here.
https://www.mail-archive.com/qemu-devel@nongnu.org/msg867878.html
Thanks
>
> Thanks
> Kevin
>
