env->misa_mxl was already set in the RISC-V cpu init routine, and validated at the beginning of riscv_cpu_realize(). There is no need to do a redundant initialization later.
Signed-off-by: Bin Meng <bmeng...@gmail.com> --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a91253d4bd..61d1737741 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -752,7 +752,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) ext |= RVJ; } - set_misa(env, env->misa_mxl, ext); + env->misa_ext_mask = env->misa_ext = ext; } riscv_cpu_register_gdb_regs_for_features(cs); -- 2.34.1