Implementation for instructions hashstp and hashchkp, the privileged
versions of hashst and hashchk, which were added in Power ISA 3.1B.
Signed-off-by: Víctor Colombo <victor.colo...@eldorado.org.br>
---
linux-headers/asm-powerpc/kvm.h | 1 +
target/ppc/cpu.h | 1 +
target/ppc/cpu_init.c | 3 +++
target/ppc/excp_helper.c | 2 ++
target/ppc/helper.h | 2 ++
target/ppc/insn32.decode | 2 ++
target/ppc/translate/fixedpoint-impl.c.inc | 2 ++
7 files changed, 13 insertions(+)
diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kvm.h
index dd58d574bf..4ae4718143 100644
--- a/linux-headers/asm-powerpc/kvm.h
+++ b/linux-headers/asm-powerpc/kvm.h
@@ -648,6 +648,7 @@ struct kvm_ppc_cpu_char {
#define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5)
/* FIXME: KVM hasn't exposed these registers yet */
#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x00)
+#define KVM_REG_PPC_HASHPKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x00)
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRs
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index f3f98d7a01..e6fc9c41f0 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1678,6 +1678,7 @@ void ppc_compat_add_property(Object *obj, const char
*name,
#define SPR_TIR (0x1BE)
#define SPR_PTCR (0x1D0)
#define SPR_POWER_HASHKEYR (0x1D4)
+#define SPR_POWER_HASHPKEYR (0x1D5)
#define SPR_BOOKE_SPEFSCR (0x200)
#define SPR_Exxx_BBEAR (0x201)
#define SPR_Exxx_BBTAR (0x202)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index db541c531a..ea3197c2be 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -6493,6 +6493,9 @@ static void init_proc_POWER10(CPUPPCState *env)
spr_register_kvm(env, SPR_POWER_HASHKEYR, "HASHKEYR",
SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic,
KVM_REG_PPC_HASHKEYR, 0x0);
+ spr_register_kvm(env, SPR_POWER_HASHPKEYR, "HASHPKEYR",
+ SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_HASHPKEYR, 0x0);
/* env variables */
env->dcache_line_size = 128;
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 34893bdf9f..0998e8374e 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -2253,6 +2253,8 @@ void helper_##op(CPUPPCState *env, target_ulong ea,
target_ulong ra, \
HELPER_HASH(HASHST, env->spr[SPR_POWER_HASHKEYR], true)
HELPER_HASH(HASHCHK, env->spr[SPR_POWER_HASHKEYR], false)
+HELPER_HASH(HASHSTP, env->spr[SPR_POWER_HASHPKEYR], true)
+HELPER_HASH(HASHCHKP, env->spr[SPR_POWER_HASHPKEYR], false)
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 84447aa3a5..51a5910cb7 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -6,6 +6,8 @@ DEF_HELPER_FLAGS_4(td, TCG_CALL_NO_WG, void, env, tl, tl, i32)
#endif
DEF_HELPER_4(HASHST, void, env, tl, tl, tl)
DEF_HELPER_4(HASHCHK, void, env, tl, tl, tl)
+DEF_HELPER_4(HASHSTP, void, env, tl, tl, tl)
+DEF_HELPER_4(HASHCHKP, void, env, tl, tl, tl)
#if !defined(CONFIG_USER_ONLY)
DEF_HELPER_2(store_msr, void, env, tl)
DEF_HELPER_1(rfi, void, env)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 23e8f56f82..6dfb6d5880 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -321,6 +321,8 @@ PEXTD 011111 ..... ..... ..... 0010111100 - @X
HASHST 011111 ..... ..... ..... 1011010010 . @X_DW
HASHCHK 011111 ..... ..... ..... 1011110010 . @X_DW
+HASHSTP 011111 ..... ..... ..... 1010010010 . @X_DW
+HASHCHKP 011111 ..... ..... ..... 1010110010 . @X_DW
## BCD Assist
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc
b/target/ppc/translate/fixedpoint-impl.c.inc
index f525144398..c151c1fe46 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -575,3 +575,5 @@ static bool do_hash(DisasContext *ctx, arg_X *a, bool priv,
TRANS(HASHST, do_hash, false, gen_helper_HASHST)
TRANS(HASHCHK, do_hash, false, gen_helper_HASHCHK)
+TRANS(HASHSTP, do_hash, true, gen_helper_HASHSTP)
+TRANS(HASHCHKP, do_hash, true, gen_helper_HASHCHKP)
--
2.25.1
