Linux kernel expects the northbridge & southbridge chipsets
configured by the BIOS firmware. We emulate that by writing
a tiny bootloader code in write_bootloader().
Upon introduction in commit 5c2b87e34d ("PIIX4 support"),
the PIIX4 configuration space included values specific to
the Malta board.
Set the Malta-specific IRQ routing values in the embedded
bootloader, so the next commit can remove the Malta specific
bits from the PIIX4 PCI-ISA bridge and make it generic
(matching the real hardware).
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
FIXME: Missing the nanoMIPS counter-part!
---
hw/mips/malta.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index df0f448b67..f0b98922f2 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -804,6 +804,8 @@ static void write_bootloader_nanomips(uint8_t *base,
uint64_t run_addr,
stw_p(p++, 0x8422); stw_p(p++, 0x9088);
/* sw t0, 0x88(t1) */
+ /* TODO set PIIX IRQC[A:D] routing values! */
+
stw_p(p++, 0xe320 | NM_HI1(kernel_entry));
stw_p(p++, NM_HI2(kernel_entry));
@@ -841,6 +843,9 @@ static void write_bootloader_nanomips(uint8_t *base,
uint64_t run_addr,
static void write_bootloader(uint8_t *base, uint64_t run_addr,
uint64_t kernel_entry)
{
+ const char pci_pins_cfg[PCI_NUM_PINS] = {
+ 10, 10, 11, 11 /* PIIX IRQRC[A:D] */
+ };
uint32_t *p;
/* Small bootloader */
@@ -915,6 +920,20 @@ static void write_bootloader(uint8_t *base, uint64_t
run_addr,
#undef cpu_to_gt32
+ /*
+ * The PIIX ISA bridge is on PCI bus 0 dev 10 func 0.
+ * Load the PIIX IRQC[A:D] routing config address, then
+ * write routing configuration to the config data register.
+ */
+ bl_gen_write_u32(&p, /* GT_PCI0_CFGADDR */
+ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcf8),
+ bswap32((1 << 31) /* ConfigEn */
+ | PCI_BUILD_BDF(0, PIIX4_PCI_DEVFN) << 8
+ | PIIX_PIRQCA));
+ bl_gen_write_u32(&p, /* GT_PCI0_CFGDATA */
+ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcfc),
+ bswap32(ldl_le_p(pci_pins_cfg)));
+
bl_gen_jump_kernel(&p,
true, ENVP_VADDR - 64,
/*
--
2.37.3
