On Thu, 2022-12-01 at 22:08 +0800, Bin Meng wrote: > Per chapter 6.5.2 in [1], the number of interupt sources including > interrupt source 0 should be 187. > > [1] PolarFire SoC MSS TRM: > https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/ReferenceManuals/PolarFire_SoC_FPGA_MSS_Technical_Reference_Manual_VC.pdf > > Fixes: 56f6e31e7b7e ("hw/riscv: Initial support for Microchip > PolarFire SoC Icicle Kit board") > Signed-off-by: Bin Meng <bm...@tinylab.org> > --- > > include/hw/riscv/microchip_pfsoc.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Wilfred Mallawa <wilfred.mall...@wdc.com> > diff --git a/include/hw/riscv/microchip_pfsoc.h > b/include/hw/riscv/microchip_pfsoc.h > index a757b240e0..9720bac2d5 100644 > --- a/include/hw/riscv/microchip_pfsoc.h > +++ b/include/hw/riscv/microchip_pfsoc.h > @@ -150,7 +150,7 @@ enum { > #define MICROCHIP_PFSOC_MANAGEMENT_CPU_COUNT 1 > #define MICROCHIP_PFSOC_COMPUTE_CPU_COUNT 4 > > -#define MICROCHIP_PFSOC_PLIC_NUM_SOURCES 185 > +#define MICROCHIP_PFSOC_PLIC_NUM_SOURCES 187 > #define MICROCHIP_PFSOC_PLIC_NUM_PRIORITIES 7 > #define MICROCHIP_PFSOC_PLIC_PRIORITY_BASE 0x04 > #define MICROCHIP_PFSOC_PLIC_PENDING_BASE 0x1000
- [PATCH 01/15] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PL... Bin Meng
- [PATCH 15/15] hw/intc: sifive_plic: Fix the pending ... Bin Meng
- Re: [PATCH 15/15] hw/intc: sifive_plic: Fix the ... Wilfred Mallawa
- Re: [PATCH 15/15] hw/intc: sifive_plic: Fix ... Bin Meng
- Re: [PATCH 15/15] hw/intc: sifive_plic: ... Wilfred Mallawa
- Re: [PATCH 15/15] hw/intc: sifive_plic: Fix the ... Alistair Francis
- [PATCH 14/15] hw/riscv: opentitan: Drop "hartid... Bin Meng
- Re: [PATCH 14/15] hw/riscv: opentitan: Drop &quo... Wilfred Mallawa
- Re: [PATCH 14/15] hw/riscv: opentitan: Drop &quo... Alistair Francis
- [PATCH 09/15] hw/riscv: microchip_pfsoc: Fix the num... Bin Meng
- Re: [PATCH 09/15] hw/riscv: microchip_pfsoc: Fix... Wilfred Mallawa
- Re: [PATCH 09/15] hw/riscv: microchip_pfsoc: Fix... Alistair Francis
- Re: [PATCH 09/15] hw/riscv: microchip_pfsoc: Fix... Conor Dooley
- [PATCH 08/15] hw/intc: sifive_plic: Update "num... Bin Meng
- Re: [PATCH 08/15] hw/intc: sifive_plic: Update &... Alistair Francis
- [PATCH 12/15] hw/riscv: virt: Fix the value of "... Bin Meng
- Re: [PATCH 12/15] hw/riscv: virt: Fix the value ... Alistair Francis
- [PATCH 10/15] hw/riscv: sifive_e: Fix the number of ... Bin Meng
- Re: [PATCH 10/15] hw/riscv: sifive_e: Fix the nu... Wilfred Mallawa
- Re: [PATCH 10/15] hw/riscv: sifive_e: Fix the nu... Alistair Francis
- [PATCH 03/15] hw/riscv: Fix opentitan dependency to ... Bin Meng