On 11 January 2012 15:26, Mark Langsdorf <mark.langsd...@calxeda.com> wrote:
> Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
> and create a configurable property for each defaulting to 96 and 64
> (respectively) so that device modelers can set the value appropriately
> for their SoC. Other ARM processors also set their maximum number of
> used IRQs appropriately.
>
> Set the maximum theoretically number of GIC interrupts to 1020 and
This patch has lost the typo fix ("theoretical") that was in the
last version. I wouldn't bother mentioning this if not for:
> +static SysBusDeviceInfo armv7m_nvic_priv_info = {
> + .init = armv7m_nvic_init,
> + .qdev.name = "armv7m_nvic",
> + .qdev.size = sizeof(nvic_state),
> + .qdev.vmsd = &vmstate_nvic,
> + .qdev.props = (Property[]) {
> + /* The ARM v7m may have anything from 0 to 496 external interrupt
> + * IRQ lines. We default to 64 external and 32 internal
> + * Other boards may differ and should set this property
> appropriately.
> + */
This is still wrong: from my comments on v5 of this patch:
This comment shouldn't talk about the 32 internal lines, as they are an
implementation detail of arm_gic.c, not architectural (unlike the A
profile GIC internal interrupt lines).
/* The ARM v7m may have anything from 0 to 496 external interrupt
* IRQ lines. We default to 64. Other boards may differ and should
* set this property appropriately.
*/
-- PMM
