On Thu, Mar 30, 2023 at 6:11 AM Daniel Henrique Barboza
<dbarb...@ventanamicro.com> wrote:
>
> All these generic CPUs are using the latest priv available, at this
> moment PRIV_VERSION_1_12_0:
>
> - riscv_any_cpu_init()
> - rv32_base_cpu_init()
> - rv64_base_cpu_init()
> - rv128_base_cpu_init()
>
> Create a new PRIV_VERSION_LATEST enum and use it in those cases. I'll
> make it easier to update everything at once when a new priv version is
> available.
>
> Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
> Reviewed-by: LIU Zhiwei <zhiwei_...@linux.alibaba.com>
> Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 8 ++++----
> target/riscv/cpu.h | 2 ++
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 75c3d4ed22..1743e9ede3 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -338,7 +338,7 @@ static void riscv_any_cpu_init(Object *obj)
> VM_1_10_SV32 : VM_1_10_SV57);
> #endif
>
> - env->priv_ver = PRIV_VERSION_1_12_0;
> + env->priv_ver = PRIV_VERSION_LATEST;
> }
>
> #if defined(TARGET_RISCV64)
> @@ -349,7 +349,7 @@ static void rv64_base_cpu_init(Object *obj)
> set_misa(env, MXL_RV64, 0);
> riscv_cpu_add_user_properties(obj);
> /* Set latest version of privileged specification */
> - env->priv_ver = PRIV_VERSION_1_12_0;
> + env->priv_ver = PRIV_VERSION_LATEST;
> #ifndef CONFIG_USER_ONLY
> set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57);
> #endif
> @@ -418,7 +418,7 @@ static void rv128_base_cpu_init(Object *obj)
> set_misa(env, MXL_RV128, 0);
> riscv_cpu_add_user_properties(obj);
> /* Set latest version of privileged specification */
> - env->priv_ver = PRIV_VERSION_1_12_0;
> + env->priv_ver = PRIV_VERSION_LATEST;
> #ifndef CONFIG_USER_ONLY
> set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57);
> #endif
> @@ -431,7 +431,7 @@ static void rv32_base_cpu_init(Object *obj)
> set_misa(env, MXL_RV32, 0);
> riscv_cpu_add_user_properties(obj);
> /* Set latest version of privileged specification */
> - env->priv_ver = PRIV_VERSION_1_12_0;
> + env->priv_ver = PRIV_VERSION_LATEST;
> #ifndef CONFIG_USER_ONLY
> set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV32);
> #endif
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 02f26130d5..03b5cc2cf4 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -86,6 +86,8 @@ enum {
> PRIV_VERSION_1_10_0 = 0,
> PRIV_VERSION_1_11_0,
> PRIV_VERSION_1_12_0,
> +
> + PRIV_VERSION_LATEST = PRIV_VERSION_1_12_0,
> };
>
> #define VEXT_VERSION_1_00_0 0x00010000
> --
> 2.39.2
>
>
