On 11/4/23 03:04, Richard Henderson wrote:
We will need a backend interface for performing 32-bit sign-extend.
Use it in tcg_reg_alloc_op in the meantime.

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
  tcg/tcg.c                        |  4 ++++
  tcg/aarch64/tcg-target.c.inc     |  9 +++++++--
  tcg/arm/tcg-target.c.inc         |  5 +++++
  tcg/i386/tcg-target.c.inc        |  5 +++--
  tcg/loongarch64/tcg-target.c.inc |  2 +-
  tcg/mips/tcg-target.c.inc        | 12 +++++++++---
  tcg/ppc/tcg-target.c.inc         |  5 +++--
  tcg/riscv/tcg-target.c.inc       |  2 +-
  tcg/s390x/tcg-target.c.inc       | 10 +++++-----
  tcg/sparc64/tcg-target.c.inc     | 11 ++++++++---
  tcg/tci/tcg-target.c.inc         |  9 ++++++++-
  11 files changed, 54 insertions(+), 20 deletions(-)



diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index f55829e9ce..d7964734c3 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1429,6 +1429,11 @@ static void tcg_out_ext16s(TCGContext *s, TCGType type, 
TCGReg rd, TCGReg rn)
      tcg_out_sxt(s, type, MO_16, rd, rn);
  }
+static void tcg_out_ext32s(TCGContext *s, TCGReg rd, TCGReg rn)
+{
+    tcg_out_sxt(s, TCG_TYPE_I64, MO_32, rd, rn);
+}
+
  static inline void tcg_out_uxt(TCGContext *s, MemOp s_bits,
                                 TCGReg rd, TCGReg rn)
  {
@@ -2232,7 +2237,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
      case INDEX_op_bswap32_i64:
          tcg_out_rev(s, TCG_TYPE_I32, MO_32, a0, a1);
          if (a2 & TCG_BSWAP_OS) {
-            tcg_out_sxt(s, TCG_TYPE_I64, MO_32, a0, a0);
+            tcg_out_ext32s(s, a0, a0);
          }
          break;
      case INDEX_op_bswap32_i32:
@@ -2251,7 +2256,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
          break;
case INDEX_op_ext_i32_i64:
-    case INDEX_op_ext32s_i64:
          tcg_out_sxt(s, TCG_TYPE_I64, MO_32, a0, a1);

While here, maybe reuse the new helper (easier to read):

            tcg_out_ext32s(s, a0, a1);

          break;
      case INDEX_op_extu_i32_i64:
@@ -2322,6 +2326,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
      case INDEX_op_ext16s_i32:
      case INDEX_op_ext16u_i64:
      case INDEX_op_ext16u_i32:
+    case INDEX_op_ext32s_i64:
      default:
          g_assert_not_reached();
      }

Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>


Reply via email to