Magic numbers can be confusing.
Use the range size define for CXL.cachemem rather than a magic number.
Update/add spec references.
Signed-off-by: Ira Weiny <ira.we...@intel.com>
---
include/hw/cxl/cxl_component.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h
index 52b6a2d67f40..bca2b756c202 100644
--- a/include/hw/cxl/cxl_component.h
+++ b/include/hw/cxl/cxl_component.h
@@ -10,7 +10,7 @@
#ifndef CXL_COMPONENT_H
#define CXL_COMPONENT_H
-/* CXL 2.0 - 8.2.4 */
+/* CXL 3.0 - 8.2.3 */
#define CXL2_COMPONENT_IO_REGION_SIZE 0x1000
#define CXL2_COMPONENT_CM_REGION_SIZE 0x1000
#define CXL2_COMPONENT_BLOCK_SIZE 0x10000
@@ -173,7 +173,9 @@ HDM_DECODER_INIT(3);
(CXL_IDE_REGISTERS_OFFSET + CXL_IDE_REGISTERS_SIZE)
#define CXL_SNOOP_REGISTERS_SIZE 0x8
-QEMU_BUILD_BUG_MSG((CXL_SNOOP_REGISTERS_OFFSET + CXL_SNOOP_REGISTERS_SIZE) >=
0x1000,
+/* CXL 3.0 8.2.3 Table 8-21 */
+QEMU_BUILD_BUG_MSG((CXL_SNOOP_REGISTERS_OFFSET +
+ CXL_SNOOP_REGISTERS_SIZE) >= CXL2_COMPONENT_CM_REGION_SIZE,
"No space for registers");
typedef struct component_registers {
--
2.40.0
