This patch includes: - XVNEG.{B/H/W/D}. Signed-off-by: Song Gao <gaos...@loongson.cn> --- target/loongarch/disas.c | 10 ++++++++++ target/loongarch/insn_trans/trans_lasx.c.inc | 20 ++++++++++++++++++++ target/loongarch/insns.decode | 7 +++++++ 3 files changed, 37 insertions(+)
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c index 7b84766fa8..eefd16e3f1 100644 --- a/target/loongarch/disas.c +++ b/target/loongarch/disas.c @@ -1713,6 +1713,11 @@ static void output_xx_i(DisasContext *ctx, arg_xx_i *a, const char *mnemonic) output(ctx, mnemonic, "x%d, x%d, 0x%x", a->xd, a->xj, a->imm); } +static void output_xx(DisasContext *ctx, arg_xx *a, const char *mnemonic) +{ + output(ctx, mnemonic, "x%d, x%d", a->xd, a->xj); +} + static void output_xr(DisasContext *ctx, arg_xr *a, const char *mnemonic) { output(ctx, mnemonic, "x%d, r%d", a->xd, a->rj); @@ -1738,6 +1743,11 @@ INSN_LASX(xvsubi_hu, xx_i) INSN_LASX(xvsubi_wu, xx_i) INSN_LASX(xvsubi_du, xx_i) +INSN_LASX(xvneg_b, xx) +INSN_LASX(xvneg_h, xx) +INSN_LASX(xvneg_w, xx) +INSN_LASX(xvneg_d, xx) + INSN_LASX(xvreplgr2vr_b, xr) INSN_LASX(xvreplgr2vr_h, xr) INSN_LASX(xvreplgr2vr_w, xr) diff --git a/target/loongarch/insn_trans/trans_lasx.c.inc b/target/loongarch/insn_trans/trans_lasx.c.inc index a42e92f930..cea944c3ba 100644 --- a/target/loongarch/insn_trans/trans_lasx.c.inc +++ b/target/loongarch/insn_trans/trans_lasx.c.inc @@ -59,6 +59,21 @@ static bool gvec_xsubi(DisasContext *ctx, arg_xx_i *a, MemOp mop) return true; } +static bool gvec_xx(DisasContext *ctx, arg_xx *a, MemOp mop, + void (*func)(unsigned, uint32_t, uint32_t, + uint32_t, uint32_t)) +{ + uint32_t xd_ofs, xj_ofs; + + CHECK_ASXE; + + xd_ofs = vec_full_offset(a->xd); + xj_ofs = vec_full_offset(a->xj); + + func(mop, xd_ofs, xj_ofs, 32, ctx->vl / 8); + return true; +} + TRANS(xvadd_b, gvec_xxx, MO_8, tcg_gen_gvec_add) TRANS(xvadd_h, gvec_xxx, MO_16, tcg_gen_gvec_add) TRANS(xvadd_w, gvec_xxx, MO_32, tcg_gen_gvec_add) @@ -111,6 +126,11 @@ TRANS(xvsubi_hu, gvec_xsubi, MO_16) TRANS(xvsubi_wu, gvec_xsubi, MO_32) TRANS(xvsubi_du, gvec_xsubi, MO_64) +TRANS(xvneg_b, gvec_xx, MO_8, tcg_gen_gvec_neg) +TRANS(xvneg_h, gvec_xx, MO_16, tcg_gen_gvec_neg) +TRANS(xvneg_w, gvec_xx, MO_32, tcg_gen_gvec_neg) +TRANS(xvneg_d, gvec_xx, MO_64, tcg_gen_gvec_neg) + static bool gvec_dupx(DisasContext *ctx, arg_xr *a, MemOp mop) { TCGv src = gpr_src(ctx, a->rj, EXT_NONE); diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode index 0bed748216..78452c622c 100644 --- a/target/loongarch/insns.decode +++ b/target/loongarch/insns.decode @@ -1301,6 +1301,7 @@ vstelm_b 0011 000110 .... ........ ..... ..... @vr_i8i4 # LASX Argument sets # +&xx xd xj &xxx xd xj xk &xr xd rj &xx_i xd xj imm @@ -1309,6 +1310,7 @@ vstelm_b 0011 000110 .... ........ ..... ..... @vr_i8i4 # LASX Formats # +@xx .... ........ ..... ..... xj:5 xd:5 &xx @xxx .... ........ ..... xk:5 xj:5 xd:5 &xxx @xr .... ........ ..... ..... rj:5 xd:5 &xr @xx_ui5 .... ........ ..... imm:5 xj:5 xd:5 &xx_i @@ -1333,6 +1335,11 @@ xvsubi_hu 0111 01101000 11001 ..... ..... ..... @xx_ui5 xvsubi_wu 0111 01101000 11010 ..... ..... ..... @xx_ui5 xvsubi_du 0111 01101000 11011 ..... ..... ..... @xx_ui5 +xvneg_b 0111 01101001 11000 01100 ..... ..... @xx +xvneg_h 0111 01101001 11000 01101 ..... ..... @xx +xvneg_w 0111 01101001 11000 01110 ..... ..... @xx +xvneg_d 0111 01101001 11000 01111 ..... ..... @xx + xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @xr xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @xr xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @xr -- 2.39.1