This patch includes: - XVFRSTP[I].{B/H}. Signed-off-by: Song Gao <gaos...@loongson.cn> --- target/loongarch/disas.c | 5 ++ target/loongarch/helper.h | 5 ++ target/loongarch/insn_trans/trans_lasx.c.inc | 5 ++ target/loongarch/insns.decode | 5 ++ target/loongarch/lasx_helper.c | 56 ++++++++++++++++++++ 5 files changed, 76 insertions(+)
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c index 60d265a9f2..5340609e6f 100644 --- a/target/loongarch/disas.c +++ b/target/loongarch/disas.c @@ -2234,6 +2234,11 @@ INSN_LASX(xvbitrevi_h, xx_i) INSN_LASX(xvbitrevi_w, xx_i) INSN_LASX(xvbitrevi_d, xx_i) +INSN_LASX(xvfrstp_b, xxx) +INSN_LASX(xvfrstp_h, xxx) +INSN_LASX(xvfrstpi_b, xx_i) +INSN_LASX(xvfrstpi_h, xx_i) + INSN_LASX(xvreplgr2vr_b, xr) INSN_LASX(xvreplgr2vr_h, xr) INSN_LASX(xvreplgr2vr_w, xr) diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h index 294ac477fc..4db0cd25d3 100644 --- a/target/loongarch/helper.h +++ b/target/loongarch/helper.h @@ -1091,3 +1091,8 @@ DEF_HELPER_FLAGS_4(xvbitrevi_b, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) DEF_HELPER_FLAGS_4(xvbitrevi_h, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) DEF_HELPER_FLAGS_4(xvbitrevi_w, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) DEF_HELPER_FLAGS_4(xvbitrevi_d, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) + +DEF_HELPER_4(xvfrstp_b, void, env, i32, i32, i32) +DEF_HELPER_4(xvfrstp_h, void, env, i32, i32, i32) +DEF_HELPER_4(xvfrstpi_b, void, env, i32, i32, i32) +DEF_HELPER_4(xvfrstpi_h, void, env, i32, i32, i32) diff --git a/target/loongarch/insn_trans/trans_lasx.c.inc b/target/loongarch/insn_trans/trans_lasx.c.inc index e87e000478..beeb9b3ff8 100644 --- a/target/loongarch/insn_trans/trans_lasx.c.inc +++ b/target/loongarch/insn_trans/trans_lasx.c.inc @@ -2404,6 +2404,11 @@ TRANS(xvbitrevi_h, gvec_xx_i, MO_16, do_xvbitrevi) TRANS(xvbitrevi_w, gvec_xx_i, MO_32, do_xvbitrevi) TRANS(xvbitrevi_d, gvec_xx_i, MO_64, do_xvbitrevi) +TRANS(xvfrstp_b, gen_xxx, gen_helper_xvfrstp_b) +TRANS(xvfrstp_h, gen_xxx, gen_helper_xvfrstp_h) +TRANS(xvfrstpi_b, gen_xx_i, gen_helper_xvfrstpi_b) +TRANS(xvfrstpi_h, gen_xx_i, gen_helper_xvfrstpi_h) + static bool gvec_dupx(DisasContext *ctx, arg_xr *a, MemOp mop) { TCGv src = gpr_src(ctx, a->rj, EXT_NONE); diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode index 47374054c6..387c1e5776 100644 --- a/target/loongarch/insns.decode +++ b/target/loongarch/insns.decode @@ -1834,6 +1834,11 @@ xvbitrevi_h 0111 01110001 10000 1 .... ..... ..... @xx_ui4 xvbitrevi_w 0111 01110001 10001 ..... ..... ..... @xx_ui5 xvbitrevi_d 0111 01110001 1001 ...... ..... ..... @xx_ui6 +xvfrstp_b 0111 01010010 10110 ..... ..... ..... @xxx +xvfrstp_h 0111 01010010 10111 ..... ..... ..... @xxx +xvfrstpi_b 0111 01101001 10100 ..... ..... ..... @xx_ui5 +xvfrstpi_h 0111 01101001 10101 ..... ..... ..... @xx_ui5 + xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @xr xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @xr xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @xr diff --git a/target/loongarch/lasx_helper.c b/target/loongarch/lasx_helper.c index 7092835d30..011eab46fb 100644 --- a/target/loongarch/lasx_helper.c +++ b/target/loongarch/lasx_helper.c @@ -2170,3 +2170,59 @@ XDO_BITI(xvbitrevi_b, 8, UXB, DO_BITREV) XDO_BITI(xvbitrevi_h, 16, UXH, DO_BITREV) XDO_BITI(xvbitrevi_w, 32, UXW, DO_BITREV) XDO_BITI(xvbitrevi_d, 64, UXD, DO_BITREV) + +#define XVFRSTP(NAME, BIT, MASK, E) \ +void HELPER(NAME)(CPULoongArchState *env, \ + uint32_t xd, uint32_t xj, uint32_t xk) \ +{ \ + int i, j, m1, m2, max; \ + XReg *Xd = &(env->fpr[xd].xreg); \ + XReg *Xj = &(env->fpr[xj].xreg); \ + XReg *Xk = &(env->fpr[xk].xreg); \ + \ + max = LASX_LEN / (BIT * 2); \ + m1 = Xk->E(0) & MASK; \ + for (i = 0; i < max; i++) { \ + if (Xj->E(i) < 0) { \ + break; \ + } \ + } \ + Xd->E(m1) = i; \ + for (j = 0; j < max; j++) { \ + if (Xj->E(j + max) < 0) { \ + break; \ + } \ + } \ + m2 = Xk->E(max) & MASK; \ + Xd->E(m2 + max) = j; \ +} + +XVFRSTP(xvfrstp_b, 8, 0xf, XB) +XVFRSTP(xvfrstp_h, 16, 0x7, XH) + +#define XVFRSTPI(NAME, BIT, E) \ +void HELPER(NAME)(CPULoongArchState *env, \ + uint32_t xd, uint32_t xj, uint32_t imm) \ +{ \ + int i, j, m, max; \ + XReg *Xd = &(env->fpr[xd].xreg); \ + XReg *Xj = &(env->fpr[xj].xreg); \ + \ + max = LASX_LEN / (BIT * 2); \ + m = imm % (max); \ + for (i = 0; i < max; i++) { \ + if (Xj->E(i) < 0) { \ + break; \ + } \ + } \ + Xd->E(m) = i; \ + for (j = 0; j < max; j++) { \ + if (Xj->E(j + max) < 0) { \ + break; \ + } \ + } \ + Xd->E(m + max) = j; \ +} + +XVFRSTPI(xvfrstpi_b, 8, XB) +XVFRSTPI(xvfrstpi_h, 16, XH) -- 2.39.1