> I was wondering how to test that code with having any machine that
> support these instructions when I thought of RPCEmu. The StrongARM
> instruction set includes them but they are not working correctly on a
> real RPCÂ due to the RPC memory bus, but is this also true for RPCEmu?
I didn't implemented them in RPCemu as I never found any software that needed
them, however I did implement them in another project using the same CPU core.
They could be backported to RPCemu I suppose.
> It also makes me think it could be interesting to create some hybrid CPU
> targets which basically behave like the StrongARM so that the existing
> versions of RISC OS and applications work on it but with the extended
> instructions sets from the XScale or the OMAP.
I suggested this when I was getting RISC OS 5 running some time ago, and
implemented CLZ. However, when the fixes found their way into Spoon edition CLZ
went missing.
Tom
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