On Tue, Nov 10, 2009 at 06:52:00PM +0000, Tom Walker wrote: > > I was wondering how to test that code with having any machine that > > support these instructions when I thought of RPCEmu. The StrongARM > > instruction set includes them but they are not working correctly on a > > real RPCÂ due to the RPC memory bus, but is this also true for RPCEmu? > > I didn't implemented them in RPCemu as I never found any software that > needed them, however I did implement them in another project using the > same CPU core. They could be backported to RPCemu I suppose.
For maximum compatability it might be worth implemented them with the same 'bugs' as the real RPC. But as you say they can't really be used on real hardware. > > It also makes me think it could be interesting to create some hybrid CPU > > targets which basically behave like the StrongARM so that the existing > > versions of RISC OS and applications work on it but with the extended > > instructions sets from the XScale or the OMAP. > > I suggested this when I was getting RISC OS 5 running some time ago, and > implemented CLZ. However, when the fixes found their way into Spoon edition > CLZ went missing. ROOL quickly released a second ROM release without the ARMv5 instructions in, so it'd work on real hardware. As such there wasn't a need for CLZ anymore. Peter -- Peter Howkins [email protected] _______________________________________________ Rpcemu mailing list [email protected] http://www.riscos.info/cgi-bin/mailman/listinfo/rpcemu
