> > The question is whether a modern PCI bus will lock for the entire transaction.
>
> I don't see how it can avoid locking up. To allow the machine to
> continue to run would be to risk dropping the write (where would it be
> stored?), and this presumably breaks PCI semantics.
Programmed PCI I/O isn't all that fast (5-10mb/sec) because of overhead
associated capturing the bus for each transaction. DMA on the PCI bus can
speed things up to nearly the PCI limit of 120mb/sec largely because once
it acquires the bus, it can "burst" a large number of 32bit words in rapid
succession without re-negotiating the bus on each cycle. Your PCI card
has a parameter associated with it called "Latency" which I believe sets
how long that card can afford to wait before it must have the bus.
You can set things up so once a burst starts, it continues until complete,
but for large transfers that's not a good idea.
On my project here I could only get abt 8mb/sec transfer rate from a PCI
digitizer using programmed IO. If I substituted a block of ram instead of
the digitizer, I got substantially higher rates - on the order of 400+
mb/sec. After I implemented DMA using the DMA on the PCI card and I
easily see rates of 116mb/sec.
This on a 2.2.16 kernel, a user space driver program, on a Athlon
600Mhz CPU with 256mb ram.
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