Hmm but within a bridge we allocate down to top, right?
Yes. Just the big mem and prefmem blocks which contain everything are
allocated top-down, exactly to avoid fragmenting the memory by moving
stuff as far as possible to the top of the address space, leaving a big
hole between end of guest ram and start of pci allocations.
Within the memory blocks the bars (and bridge windows) are allocated
bottom-up, sorted by size, with no alignment holes between the bars.
The memory layout created this way looks like this:
00000000-00000fff : reserved
00001000-0009efff : System RAM
0009f000-0009ffff : reserved
000f0000-000fffff : reserved
00100000-3fffbfff : System RAM
01000000-01472d32 : Kernel code
01472d33-01b8872f : Kernel data
01c7b000-01e438b7 : Kernel bss
3fffc000-3fffffff : reserved
^^^ RAM
fc000000-fdffffff : 0000:00:02.0
fe000000-fe0fffff : PCI Bus 0000:01
fe100000-fe1fffff : PCI Bus 0000:02
^^^ prefetchable memory block
The whole block is aligned-down according to the alignment requirements
of the largest bar (vga framebuffer in that case).
fe900000-fe9fffff : PCI Bus 0000:01
fe900000-fe901fff : 0000:01:01.0
fe900000-fe901fff : sym53c8xx
fe902000-fe902fff : 0000:01:00.0
fe902000-fe902fff : ehci_hcd
fe903000-fe9033ff : 0000:01:01.0
fe903000-fe9033ff : sym53c8xx
fea00000-feafffff : PCI Bus 0000:02
feb00000-feb0ffff : 0000:00:02.0
feb10000-feb1ffff : 0000:00:03.0
feb20000-feb23fff : 0000:00:08.0
feb20000-feb23fff : ICH HD audio
feb24000-feb24fff : 0000:00:02.0
feb25000-feb25fff : 0000:00:03.0
feb25000-feb25fff : virtio-pci
feb26000-feb26fff : 0000:00:10.0
feb26000-feb26fff : virtio-pci
feb27000-feb27fff : 0000:00:11.0
feb27000-feb27fff : virtio-pci
feb28000-feb28fff : 0000:00:12.0
feb28000-feb28fff : virtio-pci
^^^ normal memory block
Also aligned down according to the requirements of the largest bar (pci
bridge memory window in that case).
fec00000-fec003ff : IOAPIC 0
fed00000-fed003ff : HPET 0
fee00000-fee00fff : Local APIC
feffc000-feffffff : reserved
fffc0000-ffffffff : reserved
The code sizes the bridge windows to be a power of two right now. That
could be changed. It would make the allocation code more complicated
though and I suspect it wouldn't make the packing much better. Also we
want some free address space for the bridges anyway so we can hotplug
stuff, so rounding up the size to the next power of two doesn't hurt
much IMHO.
cheers,
Gerd
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