Hi Rene,
On 09.01.2022 11:27, rene de zwart wrote:
sorry I'm typing on a laptop and my thick vingers hit something and
off, the email, went.
. It seems almost to simple to be true?
. Looking thru corebootsrc/mainboard I see so many files per mainboard
that I'm (even more) confused There has been a lot of work to produce
those files
the number of files and lines of code per mainboard is really kept to
minimum, containing only the exact board specific configuration. When
compared to the common code leveraged across multiple platforms,
mainboard code is very small.
. what I have not found yet is where are the ( ??DT) acpi tables in
seabios? do i need to extract those en use the cbfstool to put them in
the rom?
. I'm trying to get my machine working with a free open source bios I'm
not looking into bug fixing (yet)
SeaBIOS detects the ACPI tables that are produced by coreboot and parses
them for its own needs (e.g. APM). For x86 you don't have a device tree
like for ARM. Typically SeaBIOS is used as a coreboot's payload.
coreboot loads SeaBIOS as an ELF file and handles any needed relocations
and calls the entry point, so you don't have to worry about anything
like that.
If you are looking for open source firmware/BIOS support I advise to
drop a mail to coreb...@coreboot.org instead where community might help
you get your machine working with coreboot. You would have to provide
some basic information about your board:
- workstation/laptop/singe board computer
- architecture (x86, ARM, etc.)
- processor, chipset model
- any additional components like Super I/Os (for serial ports, PS/2 and
fan control on workstations) or Embedded Controllers (for laptop
keyboards, battery charging and fan control)
Thanks Rene
Best regards,
--
Michał Żygowski
Firmware Engineer
GPG: 6B5BA214D21FCEB2
https://3mdeb.com | @3mdeb_com
On Sun, Jan 9, 2022 at 10:50 AM rene de zwart <renezgt...@gmail.com
<mailto:renezgt...@gmail.com>> wrote:
I have been trying to make a coreboot rom and have a few questions
c.q. confirmations.
As far as I understand the process
. Coreboot has to initialize the memory to 32bit flatmode and call
in layout.S:entry_elf(). see
https://www.seabios.org/Execution_and_code_flow
<https://www.seabios.org/Execution_and_code_flow>
. seabios starts and does it's magic
. seabios starts the linux kernel According to the linux
bootprotocol (Documentation/x86/boot.rst)
The linux kernel runs my computer perfect so many answers could be
answered by the kernel source.
as the same held for seabios and intel documentation
. Linux drivers/i2c/busses:
.. i2c-i801.c
.. i2c-smbus.c
. Linux arch/x86/boot:
.. main.c
.. pm.c
. Seabios
.. docs/memory_model.md
. Intel® 965 Express Chipset Family
.. 82p965.pdf Is this the correct file?
questions
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