Re: kernel BUG at crypto/asymmetric_keys/public_key.c:80
On Thu, 2017-11-23 at 09:47 -0800, Florian Fainelli wrote: > Absolutely, please find it enclosed. Thanks. This is a bit odd. I didn't think the most likely reason is that you have CONFIG_CRYPTO_SHA256=m but everything else built-in. Thus, when loading the certificate, there's no way to calculate the digest since that requires sha-256, hence BUG_ON(!sig->digest); If you make CONFIG_CRYPTO_SHA256=y then it should go away. I guess I'll do this: diff --git a/net/wireless/Kconfig b/net/wireless/Kconfig index da91bb547db3..1abcc4fc4df1 100644 --- a/net/wireless/Kconfig +++ b/net/wireless/Kconfig @@ -20,6 +20,10 @@ config CFG80211 tristate "cfg80211 - wireless configuration API" depends on RFKILL || !RFKILL select FW_LOADER + # may need to update this when certificates are changed and are + # using a different algorithm, though right now they shouldn't + # (this is here rather than below to allow it to be a module) + select CRYPTO_SHA256 if CFG80211_USE_KERNEL_REGDB_KEYS ---help--- cfg80211 is the Linux wireless LAN (802.11) configuration API. Enable this if you have a wireless device. @@ -113,6 +117,9 @@ config CFG80211_EXTRA_REGDB_KEYDIR certificates like in the kernel sources (net/wireless/certs/) that shall be accepted for a signed regulatory database. + Note that you need to also select the correct CRYPTO_ modules + for your certificates, and if cfg80211 is built-in they also must be. + config CFG80211_REG_CELLULAR_HINTS bool "cfg80211 regulatory support for cellular base station hints" depends on CFG80211_CERTIFICATION_ONUS Can you try if that fixes your config for you? johannes
Re: [PATCH 1/1] Input: ims-pcu - fix typo in an error log
On 2017/11/24 15:17, Joe Perches wrote:
> On Fri, 2017-11-24 at 14:59 +0800, Zhen Lei wrote:
>> Tiny typo fixed in an error log.
>>
>> I found this when I backported the CVE-2017-16645 patch:
>> ea04efee7635 ("Input: ims-psu - check if CDC union descriptor is sane")
>>
>> Signed-off-by: Zhen Lei
>> ---
>> drivers/input/misc/ims-pcu.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/input/misc/ims-pcu.c b/drivers/input/misc/ims-pcu.c
> []
>> @@ -1651,7 +1651,7 @@ static void ims_pcu_buffers_free(struct ims_pcu *pcu)
>> return union_desc;
>>
>> dev_err(&intf->dev,
>> -"Union descriptor to short (%d vs %zd\n)",
>> +"Union descriptor too short (%d vs %zd\n)",
>
> And this format is incorrect too. It should be:
>
> + "Union descriptor too short (%d vs %zd)\n",
>
> with the close parenthesis before the newline, not after.
You are very observant. Do I need to post v2? It seems that we can simply
modify it directly.
>
>
> .
>
--
Thanks!
BestRegards
Re: [PATCH v2 18/18] arm64: select ARCH_SUPPORTS_LTO_CLANG
On Thu, Nov 23, 2017 at 2:42 PM, Alexander Potapenko wrote: > >> > Ideally we'd get the toolchain people to commit to supporting the > >> > kernel > >> > memory model along side the C11 one. That would help a ton. > >> > >> Does anyone from the kernel side participate in the C standardization > >> process? > > > > Yes, Paul McKenney and Will Deacon. Doesn't mean these two can still be > > reconciled though. From what I understand C11 (and onwards) are > > incompatible with the kernel model on a number of subtle points. > > It would be good to have these incompatibilities written down, then > for the sake of argument, they can be cited both for discussions on > LKML and in the C standardization process. For example, a running > list in Documentation/ or something would make it so that anyone could > understand and cite current issues with the latest C standard. Will should be able to produce this list; I know he's done before, I just can't find it -- my Google-foo isn't strong today. >>> >>> Here you go: >>> >>> http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2017/p0124r4.html >> >> Great, thanks! Will take some time to digest, but happy to refer >> others to this important work in the future. >> >> I wonder if we have anything like a case study that shows specifically >> how a compiler generated a subtle bug due to specifics of the memory >> model, like a "if you do this, here's the problematic code that will >> get generated, and why it's problematic due to the memory model." >> That may be a good way to raise issues with toolchain developers with >> concrete and actionable examples. >> > I don't understand why we'd block patches for enabling experimental > features. We've been running this patch-set on actual devices for > months and would love to provide them to the community for further > testing. If bugs are found, then there's more evidence to bring to > the C standards committee. Otherwise we're shutting down feature > development for the sake of potential bugs in a C standard we're not > even using. So the problem is that its very very hard (and painful) to find these bugs. Getting the tools people to comment on these specific optimizations would really help lots. >> >> No doubt; I do not disagree with you. Kernel developers have very >> important use cases for the language. >> >> But the core point I'm trying to make is "do we need to block this >> patch set until issues with the C standards body in regards to the >> kernels memory model are resolved?" I would hope the two are >> orthogonal and that we'd take them and then test them even more >> extensively than the developer has in order to find out. >> >>> It would be good to get something similar to LKMM into KTSAN, for >>> example. There would probably be a few differences due to efficiency >>> concerns, but closer is better than less close. ;-) >> >> + glider, who may be able to comment on the state of KTSAN. > We haven't touched KTSAN for a while, so it's probably broken right now. > It should be possible to revive it, the question is how much code will > need to be annotated to prevent the tool from overwhelming the > developers with reports. > +Dima and Andrey, who should know better. Hi, KTSAN checks acquire/release pairs, and that's very useful. But as far as I understand this thread is about more subtle things and areas of kernel/compiler tension. I afraid this in this context KTSAN is in the same boat as compiler. Because, well, we need to write code that implements precise algorithms. And if control-dependencies are defined as "extreme care is required to avoid control-dependency-destroying compiler optimizations" (that is, code is correct if it does not break against the current set of enabled optimizations in the current compiler, what?) and data-dependencies are defined akin to C11 definition (read -- non-implementable, unicorns); then KTSAN can't help. When/if C provides implementable rules for data-dependencies (_Dependency) and that's implemented in compilers and kernel sticks to this model, then I guess it should be possible to extract that info from compiler and check against it in KTSAN (e.g. 2 synchronization domains, one for dependent accesses and one for everything else). Kernel could as well define own model, and KTSAN could check against it. But that model must be implemented in compilers first anyway. Because (1) doing it just for KTSAN does not look reasonable, (2) until compiler supports that model there is little point in checking (the fact that compiler uses a different model is the major gaping hole and we are aware of it without tooling help). And, yes, I agree that we should not block this LTO patch. All problems are already there and are orthogonal to LTO. Compiler sees enough code already (large TUs, lots of code in headers) and we move code. I a
Re: [PATCH] media: coda: fix comparision of decoded frames' indexes
Am 22.11.2017 14:43 schrieb Philipp Zabel:
Hi Martin,
On Fri, 2017-11-17 at 15:30 +0100, Martin Kepplinger wrote:
At this point the driver looks the currently decoded frame's index
and compares is to VPU-specific state values. Directly before this
if and else statements the indexes are read (index for decoded and
for displayed frame).
Now what is saved in ctx->display_idx is an older value at this point!
Yes. The rotator that copies out the decoded frame runs in parallel
with
the decoding of the next frame. So the decoder signals with display_idx
which decoded frame should be presented next, but it is only copied out
into the vb2 buffer during the following run. The same happens with the
VDOA, but manually, in prepare_decode.
That means that at this point display_idx is the index of the
previously
decoded internal frame that should be presented next, and ctx-
display_idx is the index of the internal frame that was just copied
into the externally visible vb2 buffer.
The logic reads someting like this:
if (no frame was decoded) {
if (a frame will be copied out next time) {
adapt sequence number offset;
} else if (no frame was copied out this time) {
hold until further input;
}
}
Basically, it will just wait one more run until it stops the stream,
assuming that there is really nothing useful in the bitstream
ringbuffer.
During these index checks, the current values apply, so fix this by
taking display_idx instead of ctx->display_idx.
display_idx is already checked later in the same function.
According to the i.MX6 VPU API document, it can be -2 (never seen) or
-3
during sequence start (if there is frame reordering, depending on
whether decoder skip is enabled), and I think I've seen -3 as prescan
failure on i.MX5. -1 means EOS according to that document, that's why
we
always hold in that case.
ctx->display_idx is updated later in the same function.
Signed-off-by: Martin Kepplinger
---
Please review this thoroughly, but in case I am wrong here, this is
at least very strange to read and *should* be accompanied with a
comment about what's going on with that index value!
Maybe it would be less confusing to move this into the display_idx
checks below, given that we already hold unconditionally
on display_idx == -1.
I don't think it matter that much here because at least playing h264
worked before and works with this change, but I've tested it anyways.
I think this shouldn't happen at all if you feed it a well formed h.264
stream. But if you have a skip because of broken data while there is
still no display frame at the beginning of the stream or after an IDR,
this might be hit.
Right. Let's leave it this way. In case of real changes, one can think
about
cleanup.
Thanks for clarification and helping to understand this thing! I
appreciate it.
martin
Re: [PATCH] mm: Do not stall register_shrinker
On Fri 24-11-17 09:04:59, Minchan Kim wrote:
> Shakeel Butt reported, he have observed in production system that
> the job loader gets stuck for 10s of seconds while doing mount
> operation. It turns out that it was stuck in register_shrinker()
> and some unrelated job was under memory pressure and spending time
> in shrink_slab(). Machines have a lot of shrinkers registered and
> jobs under memory pressure has to traverse all of those memcg-aware
> shrinkers and do affect unrelated jobs which want to register their
> own shrinkers.
>
> To solve the issue, this patch simply bails out slab shrinking
> once it found someone want to register shrinker in parallel.
> A downside is it could cause unfair shrinking between shrinkers.
> However, it should be rare and we can add compilcated logic once
> we found it's not enough.
>
> Link: http://lkml.kernel.org/r/20171115005602.GB23810@bbox
> Cc: Michal Hocko
> Cc: Tetsuo Handa
> Acked-by: Johannes Weiner
> Reported-and-tested-by: Shakeel Butt
> Signed-off-by: Shakeel Butt
> Signed-off-by: Minchan Kim
Acked-by: Michal Hocko
> ---
> mm/vmscan.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/mm/vmscan.c b/mm/vmscan.c
> index 6a5a72baccd5..6698001787bd 100644
> --- a/mm/vmscan.c
> +++ b/mm/vmscan.c
> @@ -486,6 +486,14 @@ static unsigned long shrink_slab(gfp_t gfp_mask, int nid,
> sc.nid = 0;
>
> freed += do_shrink_slab(&sc, shrinker, priority);
> + /*
> + * bail out if someone want to register a new shrinker to
> + * prevent long time stall by parallel ongoing shrinking.
> + */
> + if (rwsem_is_contended(&shrinker_rwsem)) {
> + freed = freed ? : 1;
> + break;
> + }
> }
>
> up_read(&shrinker_rwsem);
> --
> 2.7.4
>
--
Michal Hocko
SUSE Labs
Re: [PATCH v2] fs: handle shrinker registration failure in sget_userns
On Fri 24-11-17 06:51:09, Tetsuo Handa wrote:
> Al Viro wrote:
> > On Fri, Nov 24, 2017 at 12:35:29AM +0900, Tetsuo Handa wrote:
> > > Al Viro wrote:
> > > > On Fri, Nov 24, 2017 at 12:04:23AM +0900, Tetsuo Handa wrote:
> > > > > Al Viro wrote:
> > > > > > On Thu, Nov 23, 2017 at 03:35:37PM +0100, Michal Hocko wrote:
> > > > > > > Hopefully less screwed version. But as I've said I am not really
> > > > > > > familiar with the code and do not feel competent to change it so
> > > > > > > please
> > > > > > > be very careful here. I've moved the shrinker registration to
> > > > > > > alloc_super which turned out to be simpler.
> > > > > >
> > > > > > I don't get it. Why the hell do we need all that PITA in the first
> > > > > > place?
> > > > > > Just make sget_userns() end with
> > > > > > if (unlikely(regsiter_shrinker(&s->s_shrink) != 0)) {
> > > > > > deactivate_locked_super(s);
> > > > > > s = ERR_PTR(-ENOMEM);
> > > > > > }
> > > > > > return s;
> > > > > > and be done with that. All there is to it...
> > > > > >
> > > > >
> > > > > Doesn't deactivate_locked_super() call unregister_shrinker() ?
> > > >
> > > > And? unregister_shrinker() will do list_del() on empty list_head
> > > > and kfree(NULL); where's the problem with that?
> > > >
> > > The problem is that calling unregister_shrinker() without successful
> > > register_shrinker() causes crash due to s_shrink.list.{prev,next} == NULL.
> >
> > *shrug*
> > shrinker->nr_deferred = kzalloc(size, GFP_KERNEL);
> > if (!shrinker->nr_deferred) {
> > /* make sure it's in consistent state */
> > INIT_LIST_HEAD(&shrinker->list);
> > return -ENOMEM;
> > }
> >
> >
>
> Yes, that will work.
>
> Michal, like Al thinks, making unregister_shrinker() no-op if
> register_shrinker() failed simplifies things. Can we go with
> http://lkml.kernel.org/r/1511265853-15654-1-git-send-email-penguin-ker...@i-love.sakura.ne.jp
> with patch description updated to include Syzbot report?
I am not opposed to that patch. I just want it to make sure callers _do_
handle the error because a missing shrinker can cause memory pressure
realated issues. unregister_shrinker definitely shouldn't blow up but
I wanted it to warn. This would however trigger a false positive in this
path, right? It is true that the allocation failure would already
trigger warning so the clean up path could be more relaxed. It can be
still quite some time between those two events.
In any case. I do not have a strong preference. If relying on
deactivate_locked_super is really seem much better for the vfs code then
let's go with your patch without warning.
--
Michal Hocko
SUSE Labs
Re: [PATCH] Add slowpath enter/exit trace events
On 11/23/2017 02:43 PM, Tetsuo Handa wrote: > Please see my attempt at > http://lkml.kernel.org/r/1510833448-19918-1-git-send-email-penguin-ker...@i-love.sakura.ne.jp > . > Printing just current thread is not sufficient for me. > > Seems to me that it is a lot more overhead with timers and stuff. My probe is for the health of the system trying to capture how get the penalty and how much. A slowpath alloc in a audio stream can causes drop-outs. And they are very hard to debug in userspace.
[PATCH 4/4] ASoC: wm2000: Improve a size determination in wm2000_i2c_probe()
From: Markus Elfring Date: Fri, 24 Nov 2017 08:18:14 +0100 Replace the specification of a data structure by a pointer dereference as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style convention. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring --- sound/soc/codecs/wm2000.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm2000.c b/sound/soc/codecs/wm2000.c index 2151e75ee5c6..86e7f9ebab44 100644 --- a/sound/soc/codecs/wm2000.c +++ b/sound/soc/codecs/wm2000.c @@ -826,8 +826,7 @@ static int wm2000_i2c_probe(struct i2c_client *i2c, int reg; u16 id; - wm2000 = devm_kzalloc(&i2c->dev, sizeof(struct wm2000_priv), - GFP_KERNEL); + wm2000 = devm_kzalloc(&i2c->dev, sizeof(*wm2000), GFP_KERNEL); if (!wm2000) return -ENOMEM; -- 2.15.0
[PATCH v2] xfs: handle register_shrinker error
On Fri 24-11-17 09:00:46, Dave Chinner wrote:
> On Thu, Nov 23, 2017 at 05:11:37PM +0100, Michal Hocko wrote:
> > On Fri 24-11-17 01:01:10, Tetsuo Handa wrote:
> > > Michal Hocko wrote:
> > > > On Thu 23-11-17 05:26:33, Christoph Hellwig wrote:
> > > > > Looks good,
> > > > >
> > > > > Reviewed-by: Christoph Hellwig
> > > >
> > > > Thanks!
> > > >
> > > > > I can take a stab at the quota one.
> > > >
> > > > That would be really great!
> > > >
> > > Again, it does not look good. Since kmem_free() does only kvfree(),
> > > nothing will release memory allocated by list_lru_init().
> >
> > Hmm, you are right. I have (blindly) followed the current code flow
> > which is wrong as well. The following should do the trick. Should I
> > split that into two patches?
>
> One is fine by me - if we're need to backport one fix, then we need
> to backport both :/
OK
> > ---
> > diff --git a/fs/xfs/xfs_buf.c b/fs/xfs/xfs_buf.c
> > index dd0e18af990c..4c6e86d861fd 100644
> > --- a/fs/xfs/xfs_buf.c
> > +++ b/fs/xfs/xfs_buf.c
> > @@ -1815,25 +1815,27 @@ xfs_alloc_buftarg(
> > btp->bt_daxdev = dax_dev;
> >
> > if (xfs_setsize_buftarg_early(btp, bdev))
> > - goto error;
> > + goto error_free;
> >
> > if (list_lru_init(&btp->bt_lru))
> > - goto error;
> > + goto error_free;
> >
> > if (percpu_counter_init(&btp->bt_io_count, 0, GFP_KERNEL))
> > - goto error;
> > + goto error_lru;
> >
> > btp->bt_shrinker.count_objects = xfs_buftarg_shrink_count;
> > btp->bt_shrinker.scan_objects = xfs_buftarg_shrink_scan;
> > btp->bt_shrinker.seeks = DEFAULT_SEEKS;
> > btp->bt_shrinker.flags = SHRINKER_NUMA_AWARE;
> > - if (register_shrinker(&btp->bt_shrinker)) {
> > - percpu_counter_destroy(&btp->bt_io_count);
> > - goto error;
> > - }
> > + if (register_shrinker(&btp->bt_shrinker))
> > + goto error_pcpu;
> > return btp;
> >
> > -error:
> > +error_pcpu:
> > + percpu_counter_destroy(&btp->bt_io_count);
> > +error_lru:
> > + list_lru_destroy(&btp->bt_lru);
> > +error_free:
> > kmem_free(btp);
> > return NULL;
>
> That should do the trick.
>
> Acked-by: Dave Chinner
Thanks. Updated patch below
---
>From 1009db61988c48c9a9e327a9d076945b29b02eee Mon Sep 17 00:00:00 2001
From: Michal Hocko
Date: Thu, 23 Nov 2017 17:13:40 +0100
Subject: [PATCH] xfs: fortify xfs_alloc_buftarg error handling
percpu_counter_init failure path doesn't clean up &btp->bt_lru list.
Call list_lru_destroy in that error path. Similarly register_shrinker
error path is not handled.
While it is unlikely to trigger these error path, it is not impossible
especially the later might fail with large NUMAs. Let's handle the
failure to make the code more robust.
Acked-by: Dave Chinner
Noticed-by: Tetsuo Handa
Signed-off-by: Michal Hocko
---
fs/xfs/xfs_buf.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/fs/xfs/xfs_buf.c b/fs/xfs/xfs_buf.c
index 4db6e8d780f6..4c6e86d861fd 100644
--- a/fs/xfs/xfs_buf.c
+++ b/fs/xfs/xfs_buf.c
@@ -1815,22 +1815,27 @@ xfs_alloc_buftarg(
btp->bt_daxdev = dax_dev;
if (xfs_setsize_buftarg_early(btp, bdev))
- goto error;
+ goto error_free;
if (list_lru_init(&btp->bt_lru))
- goto error;
+ goto error_free;
if (percpu_counter_init(&btp->bt_io_count, 0, GFP_KERNEL))
- goto error;
+ goto error_lru;
btp->bt_shrinker.count_objects = xfs_buftarg_shrink_count;
btp->bt_shrinker.scan_objects = xfs_buftarg_shrink_scan;
btp->bt_shrinker.seeks = DEFAULT_SEEKS;
btp->bt_shrinker.flags = SHRINKER_NUMA_AWARE;
- register_shrinker(&btp->bt_shrinker);
+ if (register_shrinker(&btp->bt_shrinker))
+ goto error_pcpu;
return btp;
-error:
+error_pcpu:
+ percpu_counter_destroy(&btp->bt_io_count);
+error_lru:
+ list_lru_destroy(&btp->bt_lru);
+error_free:
kmem_free(btp);
return NULL;
}
--
2.15.0
--
Michal Hocko
SUSE Labs
[PATCH 3/4] ASoC: wm2000: Fix a typo in a comment line
From: Markus Elfring Date: Fri, 24 Nov 2017 08:02:57 +0100 Delete a duplicate character in a word of this description. Signed-off-by: Markus Elfring --- sound/soc/codecs/wm2000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm2000.c b/sound/soc/codecs/wm2000.c index 0ed2a8992df4..2151e75ee5c6 100644 --- a/sound/soc/codecs/wm2000.c +++ b/sound/soc/codecs/wm2000.c @@ -13,7 +13,7 @@ * 'wm2000_anc.bin' by default (overridable via platform data) at * runtime and is expected to be in flat binary format. This is * generated by Wolfson configuration tools and includes - * system-specific callibration information. If supplied as a + * system-specific calibration information. If supplied as a * sequence of ASCII-encoded hexidecimal bytes this can be converted * into a flat binary with a command such as this on the command line: * -- 2.15.0
[PATCH 2/4] ASoC: wm2000: One function call less in wm2000_i2c_probe() after error detection
From: Markus Elfring
Date: Fri, 24 Nov 2017 07:45:59 +0100
The release_firmware() function was called in a few cases by the
wm2000_i2c_probe() function during error handling even if
the passed variable contained a null pointer.
* Adjust jump targets according to the Linux coding style convention.
* Delete the label "out" and an initialisation for the variable "fw"
at the beginning which became unnecessary with this refactoring.
Signed-off-by: Markus Elfring
---
sound/soc/codecs/wm2000.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/sound/soc/codecs/wm2000.c b/sound/soc/codecs/wm2000.c
index ce936deed7e3..0ed2a8992df4 100644
--- a/sound/soc/codecs/wm2000.c
+++ b/sound/soc/codecs/wm2000.c
@@ -821,7 +821,7 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
struct wm2000_priv *wm2000;
struct wm2000_platform_data *pdata;
const char *filename;
- const struct firmware *fw = NULL;
+ const struct firmware *fw;
int ret, i;
int reg;
u16 id;
@@ -840,7 +840,7 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
ret = PTR_ERR(wm2000->regmap);
dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
ret);
- goto out;
+ return ret;
}
for (i = 0; i < WM2000_NUM_SUPPLIES; i++)
@@ -868,7 +868,7 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
if (id != 0x2000) {
dev_err(&i2c->dev, "Device is not a WM2000 - ID %x\n", id);
ret = -ENODEV;
- goto err_supplies;
+ goto disable_regulator;
}
reg = wm2000_read(i2c, WM2000_REG_REVISON);
@@ -878,7 +878,7 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
if (IS_ERR(wm2000->mclk)) {
ret = PTR_ERR(wm2000->mclk);
dev_err(&i2c->dev, "Failed to get MCLK: %d\n", ret);
- goto err_supplies;
+ goto disable_regulator;
}
filename = "wm2000_anc.bin";
@@ -893,7 +893,7 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
ret = request_firmware(&fw, filename, &i2c->dev);
if (ret != 0) {
dev_err(&i2c->dev, "Failed to acquire ANC data: %d\n", ret);
- goto err_supplies;
+ goto disable_regulator;
}
/* Pre-cook the concatenation of the register address onto the image */
@@ -901,9 +901,9 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
wm2000->anc_download = devm_kzalloc(&i2c->dev,
wm2000->anc_download_size,
GFP_KERNEL);
- if (wm2000->anc_download == NULL) {
+ if (!wm2000->anc_download) {
ret = -ENOMEM;
- goto err_supplies;
+ goto release_firmware;
}
wm2000->anc_download[0] = 0x80;
@@ -918,12 +918,10 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
wm2000_reset(wm2000);
ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm2000, NULL, 0);
-
-err_supplies:
- regulator_bulk_disable(WM2000_NUM_SUPPLIES, wm2000->supplies);
-
-out:
+release_firmware:
release_firmware(fw);
+disable_regulator:
+ regulator_bulk_disable(WM2000_NUM_SUPPLIES, wm2000->supplies);
return ret;
}
--
2.15.0
Re: [PATCH] schedule: use unlikely()
* Mikulas Patocka wrote:
> A small patch for schedule(), so that the code goes straght in the common
> case.
>
> Signed-off-by: Mikulas Patocka
>
> ---
> include/linux/blkdev.h |2 +-
> kernel/sched/core.c|2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> Index: linux-2.6/include/linux/blkdev.h
> ===
> --- linux-2.6.orig/include/linux/blkdev.h
> +++ linux-2.6/include/linux/blkdev.h
> @@ -1308,7 +1308,7 @@ static inline bool blk_needs_flush_plug(
> {
> struct blk_plug *plug = tsk->plug;
>
> - return plug &&
> + return unlikely(plug != NULL) &&
> (!list_empty(&plug->list) ||
>!list_empty(&plug->mq_list) ||
>!list_empty(&plug->cb_list));
That's an unrelated change.
> Index: linux-2.6/kernel/sched/core.c
> ===
> --- linux-2.6.orig/kernel/sched/core.c
> +++ linux-2.6/kernel/sched/core.c
> @@ -3405,7 +3405,7 @@ void __noreturn do_task_dead(void)
>
> static inline void sched_submit_work(struct task_struct *tsk)
> {
> - if (!tsk->state || tsk_is_pi_blocked(tsk))
> + if (!tsk->state || unlikely(tsk_is_pi_blocked(tsk)))
> return;
> /*
>* If we are going to sleep and we have plugged IO queued,
Do these changes actually change the generated assembly code?
Thanks,
Ingo
[PATCH 1/4] ASoC: wm2000: Delete an error message for a failed memory allocation in wm2000_i2c_probe()
From: Markus Elfring
Date: Thu, 23 Nov 2017 22:28:00 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
sound/soc/codecs/wm2000.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/sound/soc/codecs/wm2000.c b/sound/soc/codecs/wm2000.c
index 23cde3a0dc11..ce936deed7e3 100644
--- a/sound/soc/codecs/wm2000.c
+++ b/sound/soc/codecs/wm2000.c
@@ -902,7 +902,6 @@ static int wm2000_i2c_probe(struct i2c_client *i2c,
wm2000->anc_download_size,
GFP_KERNEL);
if (wm2000->anc_download == NULL) {
- dev_err(&i2c->dev, "Out of memory\n");
ret = -ENOMEM;
goto err_supplies;
}
--
2.15.0
RE: [dm-devel] [PATCH 3/4] dm: convert dm_dev_internal.count from atomic_t to refcount_t
> On Fri, Oct 20, 2017 at 10:37:38AM +0300, Elena Reshetova wrote:
> > } else if (dd->dm_dev->mode != (mode | dd->dm_dev->mode)) {
> > r = upgrade_mode(dd, mode, t->md);
> > if (r)
> > return r;
> > + refcount_inc(&dd->count);
> > }
>
> Missing here:
>
> else
> refcount_inc(&dd->count);
>
> ?
Oh, yes, thanks for catching this! I think this got unnoticed so far and patch
was merged, so I am going to send a followup patch now.
Best Regards,
Elena.
>
> Alasdair
[PATCH 0/4] ASoC: wm2000: Adjustments for wm2000_i2c_probe()
From: Markus Elfring Date: Fri, 24 Nov 2017 08:26:56 +0100 A few update suggestions were taken into account from static source code analysis. Markus Elfring (4): Delete an error message for a failed memory allocation One function call less in wm2000_i2c_probe() after error detection Fix a typo in a comment line Improve a size determination sound/soc/codecs/wm2000.c | 28 1 file changed, 12 insertions(+), 16 deletions(-) -- 2.15.0
Re: [PATCH 00/23] [v4] KAISER: unmap most of the kernel from userspace page tables
* Dave Hansen wrote: > On 11/23/2017 10:35 PM, Ingo Molnar wrote: > > So the pteval_t changes break the build on most non-x86 architectures > > (alpha, arm, > > arm64, etc.), because most of them don't have an asm/pgtable_types.h file. > > > > pteval_t is an x86-ism. > > > > So I left out the changes below. > > There was a warning on the non-PAE 32-bit builds saying that there was a > shift larger than the type. I assumed this was because of a reference > to _PAGE_NX, and thus we needed a change to pteval_t. > > But, now that I think about it more, that doesn't make sense since > _PAGE_NX should be #defined down to a 0 on those configs unless > something is wrong. If pte flags need to be passed around then the canonical way to do it is to pass around a pte_t, and use pte_val() on it and such. But please investigate the warning. One other detail: I see you fixed some of the commit titles to use standard x86 tags - could you please also capitalize sentences? I.e.: - x86/mm/kaiser: allow flushing for future ASID switches + x86/mm/kaiser: Allow flushing for future ASID switches Could you please also double-check whether the merges I did in the latest WIP.x86/mm branch are OK? Andy changed the entry stack code a bit under Kaiser, which created about 3 new conflicts. The key resolutions that I did were: .macro interrupt func cld testb $3, CS-ORIG_RAX(%rsp) jz 1f SWAPGS SWITCH_TO_KERNEL_CR3 scratch_reg=%rax callswitch_to_thread_stack 1: Plus I also dropped the extra switch_to_thread_stack call done in: x86/mm/kaiser: Prepare assembly for entry/exit CR3 switching Because Andy's latest preparatory patch does it now: x86/entry/64: Use a percpu trampoline stack for IDT entries Thanks, Ingo
NULL pointer dereference in process_one_work
Hi,tj and jiangshan, I build a ceph storage pool to run some benchmarks with 3.10 kernel. Occasionally, when the cpus' load is very high, some nodes crash with message below. [292273.612014] BUG: unable to handle kernel NULL pointer dereference at 0008 [292273.612057] IP: [] process_one_work+0x31/0x470 [292273.612087] PGD 0 [292273.612099] Oops: [#1] SMP [292273.612117] Modules linked in: rbd(OE) bcache(OE) ip_vs xfs xt_CHECKSUM iptable_mangle ipt_MASQUERADE nf_nat_masquerade_ipv4 iptable_nat nf_nat_ipv4 nf_nat nf_conntrack_ipv4 nf_defrag_ipv4 xt_conntrack nf_conntrack ipt_REJECT tun bridge stp llc ebtable_filter ebtables ip6table_filter ip6_tables iptable_filter bonding intel_powerclamp coretemp intel_rapl kvm_intel kvm crc32_pclmul ghash_clmulni_intel aesni_intel lrw gf128mul glue_helper ablk_helper cryptd mxm_wmi iTCO_wdt iTCO_vendor_support dcdbas ipmi_devintf pcspkr ipmi_ssif mei_me sg lpc_ich mei sb_edac ipmi_si mfd_core edac_core ipmi_msghandler shpchp wmi acpi_power_meter nfsd auth_rpcgss nfs_acl lockd grace sunrpc ip_tables ext4 mbcache jbd2 sd_mod crc_t10dif crct10dif_generic mgag200 syscopyarea sysfillrect sysimgblt i2c_algo_bit drm_kms_helper [292273.612495] crct10dif_pclmul crct10dif_common ttm crc32c_intel drm ahci nvme bnx2x libahci i2c_core libata mdio libcrc32c megaraid_sas ptp pps_core dm_mirror dm_region_hash dm_log dm_mod [292273.612580] CPU: 16 PID: 353223 Comm: kworker/16:2 Tainted: G OE 3.10.0-327.el7.x86_64 #1 [292273.612620] Hardware name: Dell Inc. PowerEdge R730xd/0WCJNT, BIOS 2.4.3 01/17/2017 [292273.612655] task: 8801f55e6780 ti: 882a199b task.ti: 882a199b [292273.612685] RIP: 0010:[] [] process_one_work+0x31/0x470 [292273.612721] RSP: 0018:882a199b3e28 EFLAGS: 00010046 [292273.612743] RAX: RBX: 88088b273028 RCX: 882a199b3fd8 [292273.612771] RDX: RSI: 88088b273028 RDI: 88088b273000 [292273.612799] RBP: 882a199b3e60 R08: R09: 0770 [292273.612827] R10: 8822a3bb1f80 R11: 8822a3bb1f80 R12: 88088b273000 [292273.612855] R13: 881fff313fc0 R14: R15: 881fff313fc0 [292273.612883] FS: () GS:881fff30() knlGS: [292273.612914] CS: 0010 DS: ES: CR0: 80050033 [292273.612937] CR2: 00b8 CR3: 0194a000 CR4: 003407e0 [292273.612965] DR0: DR1: DR2: [292273.612994] DR3: DR6: fffe0ff0 DR7: 0400 [292273.613021] Stack: [292273.613031] ff313fd8 881fff313fd8 000188088b273030 [292273.613069] 8801f55e6780 88088b273000 881fff313fc0 882a199b3ec0 [292273.613108] 8109e4cc 882a199b3fd8 882a199b3fd8 8801f55e6780 [292273.613146] Call Trace: [292273.613160] [] worker_thread+0x21c/0x400 [292273.613185] [] ? rescuer_thread+0x400/0x400 [292273.613212] [] kthread+0xcf/0xe0 [292273.613234] [] ? kthread_create_on_node+0x140/0x140 [292273.613263] [] ret_from_fork+0x58/0x90 [292273.613287] [] ? kthread_create_on_node+0x140/0x140 [292273.614303] Code: 48 89 e5 41 57 41 56 45 31 f6 41 55 41 54 49 89 fc 53 48 89 f3 48 83 ec 10 48 8b 06 4c 8b 6f 48 48 89 c2 30 d2 a8 04 4c 0f 45 f2 <49> 8b 46 08 44 8b b8 00 01 00 00 41 c1 ef 05 44 89 f8 83 e0 01 [292273.617971] RIP [] process_one_work+0x31/0x470 [292273.620011] RSP [292273.621940] CR2: 0008 Some crash messsages: crash> sys KERNEL: /usr/lib/debug/lib/modules/3.10.0-327.el7.x86_64/vmlinux DUMPFILE: vmcore [PARTIAL DUMP] CPUS: 32 DATE: Wed Oct 18 05:21:14 2017 UPTIME: 3 days, 09:07:25 LOAD AVERAGE: 221.70, 222.22, 224.96 TASKS: 3115 NODENAME: node121 RELEASE: 3.10.0-327.el7.x86_64 VERSION: #1 SMP Thu Nov 19 22:10:57 UTC 2015 MACHINE: x86_64 (2099 Mhz) MEMORY: 255.9 GB PANIC: "BUG: unable to handle kernel NULL pointer dereference at 0008" crash> bt PID: 353223 TASK: 8801f55e6780 CPU: 16 COMMAND: "kworker/16:2" #0 [882a199b3af0] machine_kexec at 81051beb #1 [882a199b3b50] crash_kexec at 810f2542 #2 [882a199b3c20] oops_end at 8163e1a8 #3 [882a199b3c48] no_context at 8162e2b8 #4 [882a199b3c98] __bad_area_nosemaphore at 8162e34e #5 [882a199b3ce0] bad_area_nosemaphore at 8162e4b8 #6 [882a199b3cf0] __do_page_fault at 81640fce #7 [882a199b3d48] do_page_fault at 81641113 #8 [882a199b3d70] page_fault at 8163d408 [exception RIP: process_one_work+49] RIP: 8109d4b1 RSP: 882a199b3e28 RFLAGS: 00010046 RAX: RBX: 88088b273028 RCX: 882a199b3fd8 RDX: RSI: 88088b273028 RDI: 88088b273000 RBP: 882a199b3e60 R8: R9: 0770
[PATCH 1/2] powerpc/lib/code-patching: refactor patch_instruction()
patch_instruction() uses almost the same sequence as
__patch_instruction()
This patch refactor it so that patch_instruction() uses
__patch_instruction() instead of duplicating code.
Signed-off-by: Christophe Leroy
---
arch/powerpc/lib/code-patching.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index d469224c4ada..80954c910b66 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -23,19 +23,26 @@
#include
#include
-static int __patch_instruction(unsigned int *addr, unsigned int instr)
+static int __patch_instruction(unsigned int *exec_addr, unsigned int instr,
+ unsigned int *patch_addr)
{
int err;
- __put_user_size(instr, addr, 4, err);
+ __put_user_size(instr, patch_addr, 4, err);
if (err)
return err;
- asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" :: "r" (addr));
+ asm ("dcbst 0, %0; sync; icbi 0,%1; sync; isync" :: "r" (patch_addr),
+ "r" (exec_addr));
return 0;
}
+static int raw_patch_instruction(unsigned int *addr, unsigned int instr)
+{
+ return __patch_instruction(addr, instr, addr);
+}
+
#ifdef CONFIG_STRICT_KERNEL_RWX
static DEFINE_PER_CPU(struct vm_struct *, text_poke_area);
@@ -138,7 +145,7 @@ static inline int unmap_patch_area(unsigned long addr)
int patch_instruction(unsigned int *addr, unsigned int instr)
{
int err;
- unsigned int *dest = NULL;
+ unsigned int *patch_addr = NULL;
unsigned long flags;
unsigned long text_poke_addr;
unsigned long kaddr = (unsigned long)addr;
@@ -149,7 +156,7 @@ int patch_instruction(unsigned int *addr, unsigned int
instr)
* to allow patching. We just do the plain old patching
*/
if (!this_cpu_read(*PTRRELOC(&text_poke_area)))
- return __patch_instruction(addr, instr);
+ return raw_patch_instruction(addr, instr);
local_irq_save(flags);
@@ -159,17 +166,10 @@ int patch_instruction(unsigned int *addr, unsigned int
instr)
goto out;
}
- dest = (unsigned int *)(text_poke_addr) +
+ patch_addr = (unsigned int *)(text_poke_addr) +
((kaddr & ~PAGE_MASK) / sizeof(unsigned int));
- /*
-* We use __put_user_size so that we can handle faults while
-* writing to dest and return err to handle faults gracefully
-*/
- __put_user_size(instr, dest, 4, err);
- if (!err)
- asm ("dcbst 0, %0; sync; icbi 0,%0; icbi 0,%1; sync; isync"
- ::"r" (dest), "r"(addr));
+ __patch_instruction(addr, instr, patch_addr);
err = unmap_patch_area(text_poke_addr);
if (err)
@@ -184,7 +184,7 @@ int patch_instruction(unsigned int *addr, unsigned int
instr)
int patch_instruction(unsigned int *addr, unsigned int instr)
{
- return __patch_instruction(addr, instr);
+ return raw_patch_instruction(addr, instr);
}
#endif /* CONFIG_STRICT_KERNEL_RWX */
--
2.13.3
[PATCH 2/2] powerpc/lib/feature-fixups: use raw_patch_instruction()
feature fixups need to use patch_instruction() early in the boot,
even before the code is relocated to its final address, requiring
patch_instruction() to use PTRRELOC() in order to address data.
But feature fixups applies on code before it is set to read only,
even for modules. Therefore, feature fixups can use
raw_patch_instruction() instead.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/code-patching.h | 1 +
arch/powerpc/lib/code-patching.c | 4 ++--
arch/powerpc/lib/feature-fixups.c| 8
3 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/code-patching.h
b/arch/powerpc/include/asm/code-patching.h
index abef812de7f8..1090024e8519 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -31,6 +31,7 @@ unsigned int create_cond_branch(const unsigned int *addr,
unsigned long target, int flags);
int patch_branch(unsigned int *addr, unsigned long target, int flags);
int patch_instruction(unsigned int *addr, unsigned int instr);
+int raw_patch_instruction(unsigned int *addr, unsigned int instr);
int instr_is_relative_branch(unsigned int instr);
int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr);
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 80954c910b66..b7c555df5cd6 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -38,7 +38,7 @@ static int __patch_instruction(unsigned int *exec_addr,
unsigned int instr,
return 0;
}
-static int raw_patch_instruction(unsigned int *addr, unsigned int instr)
+int raw_patch_instruction(unsigned int *addr, unsigned int instr)
{
return __patch_instruction(addr, instr, addr);
}
@@ -155,7 +155,7 @@ int patch_instruction(unsigned int *addr, unsigned int
instr)
* when text_poke_area is not ready, but we still need
* to allow patching. We just do the plain old patching
*/
- if (!this_cpu_read(*PTRRELOC(&text_poke_area)))
+ if (!this_cpu_read(text_poke_area))
return raw_patch_instruction(addr, instr);
local_irq_save(flags);
diff --git a/arch/powerpc/lib/feature-fixups.c
b/arch/powerpc/lib/feature-fixups.c
index 41cf5ae273cf..0872d60ede10 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -62,7 +62,7 @@ static int patch_alt_instruction(unsigned int *src, unsigned
int *dest,
}
}
- patch_instruction(dest, instr);
+ raw_patch_instruction(dest, instr);
return 0;
}
@@ -91,7 +91,7 @@ static int patch_feature_section(unsigned long value, struct
fixup_entry *fcur)
}
for (; dest < end; dest++)
- patch_instruction(dest, PPC_INST_NOP);
+ raw_patch_instruction(dest, PPC_INST_NOP);
return 0;
}
@@ -129,7 +129,7 @@ void do_lwsync_fixups(unsigned long value, void
*fixup_start, void *fixup_end)
for (; start < end; start++) {
dest = (void *)start + *start;
- patch_instruction(dest, PPC_INST_LWSYNC);
+ raw_patch_instruction(dest, PPC_INST_LWSYNC);
}
}
@@ -147,7 +147,7 @@ static void do_final_fixups(void)
length = (__end_interrupts - _stext) / sizeof(int);
while (length--) {
- patch_instruction(dest, *src);
+ raw_patch_instruction(dest, *src);
src++;
dest++;
}
--
2.13.3
Re: [PATCH v2] gpio: davinci: Assign first bank regs for unbanked case
On Friday 10 November 2017 04:43 PM, Keerthy wrote:
> As per the re-design assign the first bank regs for unbanked
> irq case. This was missed out in the original patch.
Linus,
A gentle ping.
- Keerthy
>
> Signed-off-by: Keerthy
> Fixes: b5cf3fd827d2e1 ("gpio: davinci: Redesign driver to accommodate ngpios
> in one gpio chip")
> ---
>
> Changes in v2:
>
> * Fixed $Author
>
> drivers/gpio/gpio-davinci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
> index f75d844..e4b3d7d 100644
> --- a/drivers/gpio/gpio-davinci.c
> +++ b/drivers/gpio/gpio-davinci.c
> @@ -383,7 +383,7 @@ static int gpio_irq_type_unbanked(struct irq_data *data,
> unsigned trigger)
> u32 mask;
>
> d = (struct davinci_gpio_controller
> *)irq_data_get_irq_handler_data(data);
> - g = (struct davinci_gpio_regs __iomem *)d->regs;
> + g = (struct davinci_gpio_regs __iomem *)d->regs[0];
> mask = __gpio_mask(data->irq - d->base_irq);
>
> if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
>
Re: [PATCH 2/2] scripts: leaking_addresses: help screen updates
On Fri, Nov 24, 2017 at 11:29 AM, Tobin C. Harding wrote: > Neither of these patches applies to my tree. Are you editing the diff's > by hand? I noticed the patches don't end with the version signature, like > this: > > > 2.7.4 I cloned your tree from here: https://github.com/tcharding/linux/tree/leaks is that right? One thing i can think of: i have to copy across the script to a cloud-based 32-bit system, work on it there, copy it back to your tree on my laptop manually, then i do the 'git diff -r' and basically copy-paste that. Is this causing issues? thanks, Kaiwan. > thanks, > Tobin.
Re: [PATCH 1/1] Input: ims-pcu - fix typo in an error log
On Fri, 2017-11-24 at 14:59 +0800, Zhen Lei wrote:
> Tiny typo fixed in an error log.
>
> I found this when I backported the CVE-2017-16645 patch:
> ea04efee7635 ("Input: ims-psu - check if CDC union descriptor is sane")
>
> Signed-off-by: Zhen Lei
> ---
> drivers/input/misc/ims-pcu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/input/misc/ims-pcu.c b/drivers/input/misc/ims-pcu.c
[]
> @@ -1651,7 +1651,7 @@ static void ims_pcu_buffers_free(struct ims_pcu *pcu)
> return union_desc;
>
> dev_err(&intf->dev,
> - "Union descriptor to short (%d vs %zd\n)",
> + "Union descriptor too short (%d vs %zd\n)",
And this format is incorrect too. It should be:
+ "Union descriptor too short (%d vs %zd)\n",
with the close parenthesis before the newline, not after.
[PATCH 1/1] Input: ims-pcu - fix typo in an error log
Tiny typo fixed in an error log.
I found this when I backported the CVE-2017-16645 patch:
ea04efee7635 ("Input: ims-psu - check if CDC union descriptor is sane")
Signed-off-by: Zhen Lei
---
drivers/input/misc/ims-pcu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/input/misc/ims-pcu.c b/drivers/input/misc/ims-pcu.c
index ae47312..253ae8e 100644
--- a/drivers/input/misc/ims-pcu.c
+++ b/drivers/input/misc/ims-pcu.c
@@ -1651,7 +1651,7 @@ static void ims_pcu_buffers_free(struct ims_pcu *pcu)
return union_desc;
dev_err(&intf->dev,
- "Union descriptor to short (%d vs %zd\n)",
+ "Union descriptor too short (%d vs %zd\n)",
union_desc->bLength, sizeof(*union_desc));
return NULL;
}
--
1.8.3
[PATCH 2/6] clk: lpc32xx: pr_err() strings should end with newlines
pr_err() messages should end with a new-line to avoid other messages
being concatenated.
Signed-off-by: Arvind Yadav
---
drivers/clk/nxp/clk-lpc32xx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/nxp/clk-lpc32xx.c b/drivers/clk/nxp/clk-lpc32xx.c
index 7b359af..b669a5c 100644
--- a/drivers/clk/nxp/clk-lpc32xx.c
+++ b/drivers/clk/nxp/clk-lpc32xx.c
@@ -526,7 +526,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
!(pll_is_valid(parent_rate, 1, 100, 2000)
&& pll_is_valid(cco_rate, 1, 15600, 32000)
&& pll_is_valid(ref_rate, 1, 100, 2700)))
- pr_err("%s: PLL clocks are not in valid ranges: %lu/%lu/%lu",
+ pr_err("%s: PLL clocks are not in valid ranges: %lu/%lu/%lu\n",
clk_hw_get_name(hw),
parent_rate, cco_rate, ref_rate);
@@ -1505,7 +1505,7 @@ static void __init lpc32xx_clk_init(struct device_node
*np)
return;
}
if (clk_get_rate(clk_32k) != 32768) {
- pr_err("invalid clock rate of external 32KHz oscillator");
+ pr_err("invalid clock rate of external 32KHz oscillator\n");
return;
}
--
1.9.1
[PATCH 6/6] clk: h8300: pr_err() strings should end with newlines
pr_err() messages should end with a new-line to avoid other messages
being concatenated.
Signed-off-by: Arvind Yadav
---
drivers/clk/h8300/clk-div.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/h8300/clk-div.c b/drivers/clk/h8300/clk-div.c
index 4ae6244..d413ade 100644
--- a/drivers/clk/h8300/clk-div.c
+++ b/drivers/clk/h8300/clk-div.c
@@ -24,13 +24,13 @@ static void __init h8300_div_clk_setup(struct device_node
*node)
num_parents = of_clk_get_parent_count(node);
if (!num_parents) {
- pr_err("%s: no parent found", clk_name);
+ pr_err("%s: no parent found\n", clk_name);
return;
}
divcr = of_iomap(node, 0);
if (divcr == NULL) {
- pr_err("%s: failed to map divide register", clk_name);
+ pr_err("%s: failed to map divide register\n", clk_name);
goto error;
}
offset = (unsigned long)divcr & 3;
--
1.9.1
Re: [PATCH] arm64: dts: Hi3660: Fix state id for 'CPU_NAP' state
Hi Sudeep,
On Thu, Nov 23, 2017 at 02:03:51PM +, Sudeep Holla wrote:
> Hi Daniel,
>
> Thanks a lot for pointing me to this and having some useful discussion
> in private. That helped to dig a bit further on this.
>
> On 23/11/17 05:40, Leo Yan wrote:
> > Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
> > idle state. From ftrace log we can observe CA73 CPUs can be easily waken
> > up from 'CPU_NAP' state but the 'waken up' CPUs doesn't handle anything
> > and sleep again; so there have tons of trace events for CA73 CPUs
> > entering and exiting idle state.
> >
> > On Hi3660 CA73 has retention state 'CPU_NAP' for CPU idle, this state we
> > set its psci parameter as '0x001' and from this parameter it can
> > calculate state id is 1. Unfortunately ARM trusted firmware (ARM-TF)
> > takes 1 as a invalid value for state id, so the CPU cannot enter idle
> > state and directly bail out to kernel.
> >
> > This commit changes psci parameter to '0x' for state id = 0;
> > this id is accepted by ARM trusted firmware and finally CPU can stay
> > properly in 'CPU_NAP' state.
> >
>
> I would like to conditionally NACK this patch. If we can't update the
> ARM TF at all then, I will agree with this change reluctantly.
Thanks for reviewing. Just like Daniel said, we need to figure out the
right method for this. So suggestions are very welcome!
> This looks like an artifact of copy paste in ARM TF port for this
> platform. If you look as PSCI specification, CPU suspend parameter has
> some recommendations and it's good to follow then unless you have strong
> reasons not to.
>
> As Daniel pointed to me, this patch is required to satisfy TF
> particularly [1]. Now that looks like copy pasted from Juno or FVP port
> and if you look deeper, it's clearly under !ARM_RECOM_STATE_ID_ENC [2]
> which was not copied IIUC :).
Thanks for sharing pointers. It's shame that the copying is not
correct for Hikey960 :)
Come back to recommended state id, I reviewed Juno board defintion and
I found it's not align with PSCI spec defintion, in ARM-TF Juno code
defines state as below [1]:
#define ARM_LOCAL_STATE_RUN 0
#define ARM_LOCAL_STATE_RET 1
#define ARM_LOCAL_STATE_OFF 2
In PSCI spec chapter "6.5 Recommended StateID Encoding" recommends power
state id as below:
0: Run
1: Standby
2: Retention
3: Powerdown
So could you confirm on Hikey960 we should follow PSCI definition for
state id definition?
> Juno's implementation is legacy as these recommendations were added
> later in the specification while Juno is 3 year old platform now.
>
> Though strictly speaking it's not violation of the PSCI specification,
> but I would rather get this fixed not before it's too late and copied to
> the next generation of platforms. Since the firmware can be easily
> upgraded that shouldn't be that difficult.
If completely compliant with PSCI recommended state id, we need change
both for ARM-TF and kernel for this. In ARM-TF, I have sent PR [2].
For the kernel patch, we should change state id as below. Please let me
know if you have suggestion for this.
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 12544c3..812437a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -179,7 +179,7 @@
CPU_NAP: cpu-nap {
compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x001>;
+ arm,psci-suspend-param = <0x002>;
entry-latency-us = <7>;
exit-latency-us = <2>;
min-residency-us = <15>;
@@ -188,7 +188,7 @@
CPU_SLEEP: cpu-sleep {
compatible = "arm,idle-state";
local-timer-stop;
- arm,psci-suspend-param = <0x001>;
+ arm,psci-suspend-param = <0x0010003>;
entry-latency-us = <40>;
exit-latency-us = <70>;
min-residency-us = <3000>;
@@ -197,7 +197,7 @@
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
local-timer-stop;
- arm,psci-suspend-param = <0x101>;
+ arm,psci-suspend-param = <0x1010033>;
entry-latency-us = <500>;
exit-latency-us = <5000>;
min-residency-us = <2>;
@@ -206,7 +206,7 @@
CLUSTER_SLEEP_1: cluster-sleep-1 {
compatible = "arm,idle-state";
local-timer-stop;
-
[PATCH 1/6] clk: stm32f4: pr_err() strings should end with newlines
pr_err() messages should end with a new-line to avoid other messages
being concatenated.
Signed-off-by: Arvind Yadav
---
drivers/clk/clk-stm32f4.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 96c6b6b..da44f8d 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -1424,7 +1424,7 @@ static void __init stm32f4_rcc_init(struct device_node
*np)
base = of_iomap(np, 0);
if (!base) {
- pr_err("%s: unable to map resource", np->name);
+ pr_err("%s: unable to map resource\n", np->name);
return;
}
--
1.9.1
[PATCH 3/6] clk: SPEAr: pr_err() strings should end with newlines
pr_err() messages should end with a new-line to avoid other messages
being concatenated.
Signed-off-by: Arvind Yadav
---
drivers/clk/spear/clk-frac-synth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/spear/clk-frac-synth.c
b/drivers/clk/spear/clk-frac-synth.c
index 58d678b..cbdf43a 100644
--- a/drivers/clk/spear/clk-frac-synth.c
+++ b/drivers/clk/spear/clk-frac-synth.c
@@ -131,7 +131,7 @@ struct clk *clk_register_frac(const char *name, const char
*parent_name,
struct clk *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
- pr_err("Invalid arguments passed");
+ pr_err("Invalid arguments passed\n");
return ERR_PTR(-EINVAL);
}
--
1.9.1
[PATCH 5/6] clk: h8s2678: pr_err() strings should end with newlines
pr_err() messages should end with a new-line to avoid other messages
being concatenated.
Signed-off-by: Arvind Yadav
---
drivers/clk/h8300/clk-h8s2678.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/h8300/clk-h8s2678.c b/drivers/clk/h8300/clk-h8s2678.c
index fc24b0b..b68045d 100644
--- a/drivers/clk/h8300/clk-h8s2678.c
+++ b/drivers/clk/h8300/clk-h8s2678.c
@@ -93,7 +93,7 @@ static void __init h8s2678_pll_clk_setup(struct device_node
*node)
num_parents = of_clk_get_parent_count(node);
if (!num_parents) {
- pr_err("%s: no parent found", clk_name);
+ pr_err("%s: no parent found\n", clk_name);
return;
}
@@ -104,13 +104,13 @@ static void __init h8s2678_pll_clk_setup(struct
device_node *node)
pll_clock->sckcr = of_iomap(node, 0);
if (pll_clock->sckcr == NULL) {
- pr_err("%s: failed to map divide register", clk_name);
+ pr_err("%s: failed to map divide register\n", clk_name);
goto free_clock;
}
pll_clock->pllcr = of_iomap(node, 1);
if (pll_clock->pllcr == NULL) {
- pr_err("%s: failed to map multiply register", clk_name);
+ pr_err("%s: failed to map multiply register\n", clk_name);
goto unmap_sckcr;
}
--
1.9.1
[PATCH 4/6] SPEAr: clk: pr_err() strings should end with newlines
pr_err() messages should end with a new-line to avoid other messages
being concatenated.
Signed-off-by: Arvind Yadav
---
drivers/clk/spear/clk-gpt-synth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/spear/clk-gpt-synth.c
b/drivers/clk/spear/clk-gpt-synth.c
index 1a722e9..1cf219a6 100644
--- a/drivers/clk/spear/clk-gpt-synth.c
+++ b/drivers/clk/spear/clk-gpt-synth.c
@@ -120,7 +120,7 @@ struct clk *clk_register_gpt(const char *name, const char
*parent_name, unsigned
struct clk *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
- pr_err("Invalid arguments passed");
+ pr_err("Invalid arguments passed\n");
return ERR_PTR(-EINVAL);
}
--
1.9.1
[PATCH 0/6] clk: pr_err() strings should end with newlines
pr_err() messages should end with a new-line to avoid other messages being concatenated. Arvind Yadav (6): [PATCH 1/6] clk: stm32f4: pr_err() strings should end with newlines [PATCH 2/6] clk: lpc32xx: pr_err() strings should end with newlines [PATCH 3/6] clk: SPEAr: pr_err() strings should end with newlines [PATCH 4/6] SPEAr: clk: pr_err() strings should end with newlines [PATCH 5/6] clk: h8s2678: pr_err() strings should end with newlines [PATCH 6/6] clk: h8300: pr_err() strings should end with newlines drivers/clk/clk-stm32f4.c | 2 +- drivers/clk/h8300/clk-div.c| 4 ++-- drivers/clk/h8300/clk-h8s2678.c| 6 +++--- drivers/clk/nxp/clk-lpc32xx.c | 4 ++-- drivers/clk/spear/clk-frac-synth.c | 2 +- drivers/clk/spear/clk-gpt-synth.c | 2 +- 6 files changed, 10 insertions(+), 10 deletions(-) -- 1.9.1
$27M USD
Apologies! I am a military woman ,seeking your kind assistance. --- This email has been checked for viruses by Avast antivirus software. https://www.avast.com/antivirus
Re: [PATCH] fat: Fix sb_rdonly() change
On Fri, 2017-11-24 at 15:07 +0900, OGAWA Hirofumi wrote: > Joe Perches writes: > > > On Thu, 2017-11-23 at 15:29 +0900, OGAWA Hirofumi wrote: > > > Ouch forgot to add stable@ > > > > > > -- > > > commit bc98a42c1f7d0f886c0c1b75a92a004976a46d9f introduced bug. > > > > I think your commit message needs a bit more information. > > > > It'd be useful to describe that the introduction of > > sb_rdonly converted the bitwise & to a boolean and so > > this conversion and comparison was made defective. > > > > Are there any other instances of defective comparisons? > > Please ask to that patch author. The patch author, David Howells, is on the cc list. btw: It seems all the the other uses use a (bool) cast of the (*flags & MS_RDONLY) and a comparison of sb_rdonly(sb). It would make sense to change the argument type of the ext[24]_setup_super int read_only arg to bool to match the sb_rdonly() type.
Re: Review of "[PATCH v2 0/3] virt: Add vboxguest driver for Virtual Box Guest integration"
On Thu, Nov 23, 2017 at 07:37:48PM +0100, Hans de Goede wrote: > Hi Arnd, Greg, > > It seems that since there are no obvious glaring issues > with v2 of my vboxguest driver series it is now stuck > waiting for review. It's also the merge window and I can't do anything then... > Larry Finger (in the Cc) is willing to review this series, > would Larry's Reviewed-by (once he is happy with the > series) be enough to get this merged under drivers/misc > (or drivers/virt) ? It can't hurt, the fact that no one seems to want to review it, including the original developers of the code, does not seem good, don't make it all up to me please. thanks, greg k-h
Re: [PATCH 00/23] [v4] KAISER: unmap most of the kernel from userspace page tables
On 11/23/2017 10:35 PM, Ingo Molnar wrote: > So the pteval_t changes break the build on most non-x86 architectures (alpha, > arm, > arm64, etc.), because most of them don't have an asm/pgtable_types.h file. > > pteval_t is an x86-ism. > > So I left out the changes below. There was a warning on the non-PAE 32-bit builds saying that there was a shift larger than the type. I assumed this was because of a reference to _PAGE_NX, and thus we needed a change to pteval_t. But, now that I think about it more, that doesn't make sense since _PAGE_NX should be #defined down to a 0 on those configs unless something is wrong.
Re: [PATCH 00/23] [v4] KAISER: unmap most of the kernel from userspace page tables
* Dave Hansen wrote:
> I've updated these a bit since yesterday with some minor fixes:
> * Fixed KASLR compile bug
> * Fixed ds.c compile problem
> * Changed ulong to pteval_t to fix 32-bit compile problem
> * Stop mapping cpu_current_top_of_stack (never used until after CR3 switch)
>
> Rather than re-spamming everyone, the resulting branch is here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/daveh/x86-kaiser.git/log/?h=kaiser-414-tipwip-20171123
>
> If anyone wants to be re-spammed, just say the word.
So the pteval_t changes break the build on most non-x86 architectures (alpha,
arm,
arm64, etc.), because most of them don't have an asm/pgtable_types.h file.
pteval_t is an x86-ism.
So I left out the changes below.
Thanks,
Ingo
diff --git a/arch/x86/include/asm/kaiser.h b/arch/x86/include/asm/kaiser.h
index 35f12a8a7071..2198855f7de9 100644
--- a/arch/x86/include/asm/kaiser.h
+++ b/arch/x86/include/asm/kaiser.h
@@ -18,6 +18,8 @@
#ifndef __ASSEMBLY__
#ifdef CONFIG_KAISER
+#include
+
/**
* kaiser_add_mapping - map a kernel range into the user page tables
* @addr: the start address of the range
@@ -31,7 +33,7 @@
* table.
*/
extern int kaiser_add_mapping(unsigned long addr, unsigned long size,
- unsigned long flags);
+ pteval_t flags);
/**
* kaiser_add_mapping_cpu_entry - map the cpu entry area
diff --git a/arch/x86/mm/kaiser.c b/arch/x86/mm/kaiser.c
index 1eb27b410556..58cae2924724 100644
--- a/arch/x86/mm/kaiser.c
+++ b/arch/x86/mm/kaiser.c
@@ -431,7 +431,7 @@ void __init kaiser_init(void)
}
int kaiser_add_mapping(unsigned long addr, unsigned long size,
- unsigned long flags)
+ pteval_t flags)
{
return kaiser_add_user_map((const void *)addr, size, flags);
}
diff --git a/include/linux/kaiser.h b/include/linux/kaiser.h
index 83d465599646..f662013515a1 100644
--- a/include/linux/kaiser.h
+++ b/include/linux/kaiser.h
@@ -4,7 +4,11 @@
#ifdef CONFIG_KAISER
#include
#else
+
#ifndef __ASSEMBLY__
+
+#include
+
/*
* These stubs are used whenever CONFIG_KAISER is off, which
* includes architectures that support KAISER, but have it
@@ -20,7 +24,7 @@ static inline void kaiser_remove_mapping(unsigned long start,
unsigned long size
}
static inline int kaiser_add_mapping(unsigned long addr, unsigned long size,
-unsigned long flags)
+pteval_t flags)
{
return 0;
}
Re: [PATCH 1/6] perf: Add new type PERF_TYPE_PROBE
On 11/23/17 2:02 AM, Peter Zijlstra wrote:
On Wed, Nov 15, 2017 at 09:23:33AM -0800, Song Liu wrote:
Note: We use type __u64 for pointer probe_desc instead of __aligned_u64.
The reason here is to avoid changing the size of struct perf_event_attr,
and breaking new-kernel-old-utility scenario. To avoid alignment problem
with the pointer, we will (in the following patches) copy probe_desc to
__aligned_u64 before using it as pointer.
ISTR there are only relatively few architectures where __u64 and
__aligned_u64 are not the same thing.
The comment that goes with it seems to suggest i386 has short alignment
for u64 but my compiler says differently:
printf("%d, %d\n", sizeof(unsigned long long), __alignof__(unsigned
long long));
$ gcc -m32 -o align align.c && ./align
8, 8
unfortunately 32-bit is more screwed than it seems:
$ cat align.c
#include
struct S {
unsigned long long a;
} s;
struct U {
unsigned long long a;
} u;
int main()
{
printf("%d, %d\n", sizeof(unsigned long long),
__alignof__(unsigned long long));
printf("%d, %d\n", sizeof(s), __alignof__(s));
printf("%d, %d\n", sizeof(u), __alignof__(u));
}
$ gcc -m32 align.c
$ ./a.out
8, 8
8, 4
8, 4
so we have to use __aligned_u64 in uapi.
Otherwise, yes, we could have used config1 and config2 to pass pointers
to the kernel, but since they're defined as __u64 already we cannot
change them and have to do this ugly dance around 'config' field.
If you prefer we can do the same around 'config1', but it's not
any prettier.
We considered adding __aligned_u64 to the end of
'struct perf_event_attr', but it's a waste for most users, so reusing
the space of 'config' field like this seems the least evil.
Re: [PATCH RT 03/10] random: avoid preempt_disable()ed section
Hi Steve, I just build the patches, a build error found here: drivers/char/random.c: In function ‘get_random_int’: drivers/char/random.c:1816:7: error: assignment from incompatible pointer type [-Werror=incompatible-pointer-types] hash = &get_locked_var(hash_entropy_int_lock, get_random_int_hash); ^ drivers/char/random.c: In function ‘get_random_long’: drivers/char/random.c:1838:7: error: assignment from incompatible pointer type [-Werror=incompatible-pointer-types] hash = &get_locked_var(hash_entropy_int_lock, get_random_int_hash); ^ > - hash = get_cpu_var(get_random_int_hash); > + hash = &get_locked_var(hash_entropy_int_lock, get_random_int_hash); ^ Is this a extra '&' which need to remove? > > hash[0] += current->pid + jiffies + random_get_entropy(); > md5_transform(hash, random_int_secret); > ret = hash[0]; > - put_cpu_var(get_random_int_hash); > + put_locked_var(hash_entropy_int_lock, get_random_int_hash); > > return ret; > } > @@ -1833,12 +1835,12 @@ unsigned long get_random_long(void) > if (arch_get_random_long(&ret)) > return ret; > > - hash = get_cpu_var(get_random_int_hash); > + hash = &get_locked_var(hash_entropy_int_lock, get_random_int_hash); ^ Ditto Regards Alex
Re: [PATCH v2 00/11] Rockchip ISP1 Driver
HI all, 2017-11-24 10:36 GMT+08:00 Jacob Chen : > This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 > SoC. > > Kernel Branch: > https://github.com/wzyy2/linux/tree/rkisp1/drivers/media/platform/rockchip/isp1 > > Below are some infomations about driver/hardware: > > Rockchip ISP1 have many Hardware Blocks(simplied): > > MIPI --> ISP --> DCrop(Mainpath) --> RSZ(Mainpath) --> DMA(Mainpath) > DMA-Input --> --> DCrop(Selfpath) --> RSZ(Selfpath) --> DMA(Selfpath);) > > (Acutally the TRM(rk3288, isp) could be found online.. which contains a > more detailed block diagrams ;-P) > > The funcitons of each hardware block: > > Mainpath : up to 4k resolution, support raw/yuv format > Selfpath : up tp 1080p, support rotate, support rgb/yuv format > RSZ: scaling > DCrop: crop > ISP: 3A, Color processing, Crop > MIPI: MIPI Camera interface > > Media pipelines: > > Mainpath, Selfpath <-- ISP subdev <-- MIPI <-- Sensor > 3A stats <--<-- 3A parms > > Code struct: > > capture.c : Mainpath, Selfpath, RSZ, DCROP : capture device. > rkisp1.c : ISP : v4l2 sub-device. > isp_params.c : 3A parms : output device. > isp_stats.c : 3A stats : capture device. > mipi_dphy_sy.c : MIPI : sperated v4l2 sub-device. > > Usage: > ChromiumOS: > use below v4l2-ctl command to capture frames. > > v4l2-ctl --verbose -d /dev/video4 --stream-mmap=2 > --stream-to=/tmp/stream.out --stream-count=60 --stream-poll > > use below command to playback the video on your PC. > > mplayer /tmp/stream.out -loop 0 --demuxer=rawvideo > --rawvideo=w=800:h=600:size=$((800*600*2)):format=yuy2 > or > mplayer ./stream.out -loop 0 -demuxer rawvideo -rawvideo > w=800:h=600:size=$((800*600*2)):format=yuy2 > > Linux: > use rkcamsrc gstreamer plugin(just a modified v4l2src) to preview. > > gst-launch-1.0 rkcamsrc device=/dev/video0 io-mode=4 disable-3A=true > videoconvert ! video/x-raw,format=NV12,width=640,height=480 ! kmssink > > Jacob Chen (7): > media: rkisp1: add rockchip isp1 driver > media: rkisp1: add Rockchip MIPI Synopsys DPHY driver > dt-bindings: Document the Rockchip ISP1 bindings > dt-bindings: Document the Rockchip MIPI RX D-PHY bindings > ARM: dts: rockchip: add isp node for rk3288 > ARM: dts: rockchip: add rx0 mipi-phy for rk3288 > MAINTAINERS: add entry for Rockchip ISP1 driver > > Jeffy Chen (1): > media: rkisp1: Add user space ABI definitions > > Shunqian Zheng (3): > media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format > arm64: dts: rockchip: add isp0 node for rk3399 > arm64: dts: rockchip: add rx0 mipi-phy for rk3399 > > .../devicetree/bindings/media/rockchip-isp1.txt| 61 + > .../bindings/media/rockchip-mipi-dphy.txt | 77 + > MAINTAINERS| 10 + > arch/arm/boot/dts/rk3288.dtsi | 24 + > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26 + > drivers/media/platform/Kconfig | 10 + > drivers/media/platform/Makefile|1 + > drivers/media/platform/rockchip/isp1/Makefile |8 + > drivers/media/platform/rockchip/isp1/capture.c | 1691 > > drivers/media/platform/rockchip/isp1/capture.h | 46 + > drivers/media/platform/rockchip/isp1/common.h | 330 > drivers/media/platform/rockchip/isp1/dev.c | 632 > drivers/media/platform/rockchip/isp1/isp_params.c | 1556 ++ > drivers/media/platform/rockchip/isp1/isp_params.h | 81 + > drivers/media/platform/rockchip/isp1/isp_stats.c | 537 +++ > drivers/media/platform/rockchip/isp1/isp_stats.h | 81 + > .../media/platform/rockchip/isp1/mipi_dphy_sy.c| 805 ++ > drivers/media/platform/rockchip/isp1/regs.c| 251 +++ > drivers/media/platform/rockchip/isp1/regs.h| 1578 ++ > drivers/media/platform/rockchip/isp1/rkisp1.c | 1230 ++ > drivers/media/platform/rockchip/isp1/rkisp1.h | 130 ++ > drivers/media/v4l2-core/v4l2-ioctl.c |2 + > include/uapi/linux/rkisp1-config.h | 554 +++ > include/uapi/linux/videodev2.h |4 + > 24 files changed, 9725 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/rockchip-isp1.txt > create mode 100644 > Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt > create mode 100644 drivers/media/platform/rockchip/isp1/Makefile > create mode 100644 drivers/media/platform/rockchip/isp1/capture.c > create mode 100644 drivers/media/platform/rockchip/isp1/capture.h > create mode 100644 drivers/media/platform/rockchip/isp1/common.h > create mode 100644 drivers/media/platform/rockchip/isp1/dev.c > create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.c > create mode 100644 drivers/media/platform/rockchip/isp1
Re: regression: 4.13 cannot follow symlinks on some ext3 fs
On Nov 23, 2017, at 7:04 PM, Andi Kleen wrote:
>
>> As a workaround, you could delete and recreate the symlink with the new
>
> I revert the patch for now. Everything seems to work.
>
>> kernel to create a proper fast symlink. It would be useful to scan
>> the image to see if there are other similar symlinks present:
>>
>>find /myth/tmp -type l -size -60 -ls | awk '$2 != 0 { print }'
>
> Doesn't find anything. Your recipe must be wrong.
I see that I should have used "-60c" to properly limit the listing to
short symlinks, but this doesn't appear to be the core problem. It
looks like there is a bug in find (at least version 4.4.2 that I'm
testing with) that it doesn't print the blocks count properly.
According to find(1) the "-ls" argument should list the file the same
as "ls -dils" format (blocks is $2), but as shown below "find -ls"
prints "0" for blocks when it should be "4" (for a long symlink using
"+60c" in my example, I couldn't find any short+external symlinks on a
couple of 8 year old root filesystems):
$ find /etc/alternatives/rmid -type l -size +60c -ls
327877 0 lrwxrwxrwx 1 root root 73 Jan 4 2017 /etc/alternatives/rmid ->
/usr/lib/jvm/java-1.8.0-openjdk-1.8.0.111-0.b15.el6_8.x86_64/jre/bin/rmid
$ ls -dils /etc/alternatives/rmid
327877 4 lrwxrwxrwx 1 root root 73 Jan 4 2017 /etc/alternatives/rmid ->
/usr/lib/jvm/java-1.8.0-openjdk-1.8.0.111-0.b15.el6_8.x86_64/jre/bin/rmid*
Try the following command instead:
find / -type l -size -60c -print0 | xargs -0r ls -dils | awk '$2 != 0 { print }'
>> This is probably something that e2fsck should check for and fix.
>
> Nah the kernel should just support it like it always did.
The reason we changed this code in the first place was because the
old check would repeatedly break when some new reason for storing
blocks on a symlink appeared. It broke when xattrs were allowed
on symlinks for SELinux. It broke when bigalloc blocks were added.
It broke when inline_data was added, and it would have broken (and
been really hard to fix efficiently) when large xattrs were added.
We checked old kernels, and old e2fsprogs, and didn't see any cases
where fast (<= 60 chars) symlinks were created using external blocks.
It seems that _something_ did create them, and it would be good to
figure that out so we can determine if it is a widespread problem.
I think e2fsck can fix this quite easily, and there really isn't
an easy way to revert to the old method if the large xattr feature
is enabled. If you are willing to run a new kernel, you should also
be willing to run a new e2fsck.
We could probably add a fallback to the old mechanism (and print
a one-time warning to upgrade to a newer e2fsck) if an external fast
symlink is found and the large xattr feature is not enabled, which
would give more time to fix this (hopefully rare in the wild) case.
Cheers, Andreas
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Description: Message signed with OpenPGP
Re: [PATCH] fat: Fix sb_rdonly() change
Joe Perches writes: > On Thu, 2017-11-23 at 15:29 +0900, OGAWA Hirofumi wrote: >> Ouch forgot to add stable@ >> >> -- >> commit bc98a42c1f7d0f886c0c1b75a92a004976a46d9f introduced bug. > > I think your commit message needs a bit more information. > > It'd be useful to describe that the introduction of > sb_rdonly converted the bitwise & to a boolean and so > this conversion and comparison was made defective. > > Are there any other instances of defective comparisons? Please ask to that patch author. -- OGAWA Hirofumi
Re: [PATCH 2/2] scripts: leaking_addresses: help screen updates
On Thu, Nov 23, 2017 at 10:45:31AM +0530, kaiwan.billimo...@gmail.com wrote: > The current leaking_addresses.pl script only supports showing "leaked" > 64-bit kernel virtual addresses. This patch modifies the "help" screen in the > following manner: > - the '--raw', '--suppress-dmesg', '--squash-by-path' and > '--squash-by-filename' > option switches are only meaningful when the '--input-raw=' option switch is > used. So, indent the 'Help' screen lines to reflect the fact. > - an additional example demonstrating usage of the new '--page-offset' > parameter. > > > Feedback welcome.. > > > Signed-off-by: Kaiwan N Billimoria > --- > diff --git a/scripts/leaking_addresses.pl b/scripts/leaking_addresses.pl > index 7ca218221486..3832abb743d7 100755 > --- a/scripts/leaking_addresses.pl > +++ b/scripts/leaking_addresses.pl > @@ -105,10 +105,10 @@ Options: > > -o, --output-raw= Save results for future processing. > -i, --input-raw= Read results from file instead of scanning. > - --rawShow raw results (default). > - --suppress-dmesg Do not show dmesg results. > - --squash-by-path Show one result per unique path. > - --squash-by-filename Show one result per unique filename. > + --rawShow raw results (default). > + --suppress-dmesg Do not show dmesg results. > + --squash-by-path Show one result per unique path. > + --squash-by-filename Show one result per unique filename. > --page-offset= PAGE_OFFSET value (for 32-bit kernels). > -d, --debug Display debugging output. > -h, --help, --versionDisplay this help and exit. > @@ -124,6 +124,10 @@ Examples: > # View summary report. > $0 --input-raw scan.out --squash-by-filename > > + # (On a 32-bit system with a 2GB:2GB VMSPLIT), pass PAGE_OFFSET value > + # as a parameter > + $0 --page-offset=0x8000 This should be in the first patch since that is the patch that added it. > + > Scans the running (32 or 64 bit) kernel for potential leaking addresses. > > EOM Neither of these patches applies to my tree. Are you editing the diff's by hand? I noticed the patches don't end with the version signature, like this: 2.7.4 thanks, Tobin.
[RFC v2] dma-coherent: introduce no-align to avoid allocation failure and save memory
dma-coherent uses bitmap APIs which internally consider align based on the
requested size. If most of allocations are small size like KBs, using
alignment scheme seems to be good for anti-fragmentation. But if large
allocation are commonly used, then an allocation could be failed because
of the alignment. To avoid the allocation failure, we had to increase total
size.
This is a example, total size is 30MB, only few memory at front is being
used, and 9MB is being requsted. Then 9MB will be aligned to 16MB. The
first try on offset 0MB will be failed because others already are using
them. The second try on offset 16MB will be failed because of ouf of bound.
So if the alignment is not necessary on a specific dma-coherent memory
region, we can set no-align property. Then dma-coherent will ignore the
alignment only for the memory region.
patch changelog:
v2: use no-align property rather than forcely using no-align
Signed-off-by: Jaewon Kim
---
.../bindings/reserved-memory/reserved-memory.txt | 6 +++
arch/arm/mm/dma-mapping-nommu.c| 3 +-
drivers/base/dma-coherent.c| 49 --
include/linux/dma-mapping.h| 12 +++---
4 files changed, 50 insertions(+), 20 deletions(-)
diff --git
a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
index 16291f2a4688..b279e111a7ca 100644
--- a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
+++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
@@ -63,6 +63,12 @@ reusable (optional) - empty property
able to reclaim it back. Typically that means that the operating
system can use that region to store volatile or cached data that
can be otherwise regenerated or migrated elsewhere.
+no-align (optional) - empty property
+- Depending on a device or its usage pattern, tring to do aligning is not
+ useful. Because of aligning, allocation can be failed and that leads to
+ increasing total memory size to avoid the allocation failure. This
+ property indicates allocator will not try to do aligning on size nor
+ offset.
Linux implementation note:
- If a "linux,cma-default" property is present, then Linux will use the
diff --git a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c
index 6db5fc26d154..6512dae5d19b 100644
--- a/arch/arm/mm/dma-mapping-nommu.c
+++ b/arch/arm/mm/dma-mapping-nommu.c
@@ -75,8 +75,7 @@ static void arm_nommu_dma_free(struct device *dev, size_t
size,
if (attrs & DMA_ATTR_NON_CONSISTENT) {
ops->free(dev, size, cpu_addr, dma_addr, attrs);
} else {
- int ret = dma_release_from_global_coherent(get_order(size),
- cpu_addr);
+ int ret = dma_release_from_global_coherent(size, cpu_addr);
WARN_ON_ONCE(ret == 0);
}
diff --git a/drivers/base/dma-coherent.c b/drivers/base/dma-coherent.c
index 1e6396bb807b..95d96bd764d9 100644
--- a/drivers/base/dma-coherent.c
+++ b/drivers/base/dma-coherent.c
@@ -17,6 +17,7 @@ struct dma_coherent_mem {
int flags;
unsigned long *bitmap;
spinlock_t spinlock;
+ boolno_align;
booluse_dev_dma_pfn_offset;
};
@@ -163,19 +164,35 @@ EXPORT_SYMBOL(dma_mark_declared_memory_occupied);
static void *__dma_alloc_from_coherent(struct dma_coherent_mem *mem,
ssize_t size, dma_addr_t *dma_handle)
{
- int order = get_order(size);
unsigned long flags;
int pageno;
void *ret;
spin_lock_irqsave(&mem->spinlock, flags);
- if (unlikely(size > (mem->size << PAGE_SHIFT)))
+ if (unlikely(size > (mem->size << PAGE_SHIFT))) {
+ WARN_ONCE(1, "%s too big size, req-size: %zu total-size: %d\n",
+ __func__, size, (mem->size << PAGE_SHIFT));
goto err;
+ }
- pageno = bitmap_find_free_region(mem->bitmap, mem->size, order);
- if (unlikely(pageno < 0))
- goto err;
+ if (mem->no_align) {
+ int nr_page = PAGE_ALIGN(size) >> PAGE_SHIFT;
+
+ pageno = bitmap_find_next_zero_area(mem->bitmap, mem->size, 0,
+ nr_page, 0);
+ if (unlikely(pageno >= mem->size)) {
+ pr_err("%s: alloc failed, req-size: %u pages\n",
__func__, nr_page);
+ goto err;
+ }
+ bitmap_set(mem->bitmap, pageno, nr_page);
+ } else {
+ int order = get_order(size);
+
+ pageno = bitmap_find_free_region(mem->bitmap, mem->size, order);
+ if (unlikely(pageno < 0))
+ goto err;
+ }
/*
* Memory was found in
Re: [PATCH 1/2] scripts: leaking_addresses: add support for 32-bit kernel addresses
Hi Kaiwan,
thanks for the patches!
On Thu, Nov 23, 2017 at 10:44:00AM +0530, kaiwan.billimo...@gmail.com wrote:
> The current leaking_addresses.pl script only supports showing "leaked"
> 64-bit kernel virtual addresses. This patch adds support for showing
> "leaked" 32-bit kernel virtual addresses. It also takes into account Tobin's
> feedback on the previous iteration. (Note: this patch is meant to apply on
> the 'leaks' branch of Tobin's tree).
Please don't mention me in the commit log. Usually this sort of comment
would go below the - so it doesn't get into the kernel tree.
Perhaps
Currently leaking_addresses.pl only supports scanning 64 bit kernels. We
can scan 32 bit kernels also by ... (describe PAGE_OFFSET stuff)
> Briefly, the way it works- once it detects we're running on an i'x'86
> platform,
> (where x=3|4|5|6), it takes this arch into account for checking. The
> essential rationale:
> if virt-addr >= PAGE_OFFSET => it's a kernel virtual address.
>
> This version programatically queries and sets PAGE_OFFSET based on the
> /boot/config-$(uname -r) content. If, for any reason, this file cannot be
> used, we fallback to requesting the user to pass PAGE_OFFSET as a parameter.
This is a good start. What if we were to check a few places in order?
/boot/config
/boot/config-$(uname -r)
/proc/config.gz
And fall back to 0xc000 with a warning printed to stderr if we can't
find it?
I'd suggest creating a sub routine get_page_offset() that returns
it. You could cache the result locally in the subroutine to make it
faster, here is a stack overflow post on how to do that
https://stackoverflow.com/questions/10841076/static-local-variables-in-perl
Or you could save it to a global and check this each time the you enter
the subroutine, which ever you fancy.
> Pending/TODO:
> - support for ARM-32
We don't need this in the git log either :)
> Feedback welcome..
Or this. Once it is in the tree no feed back will be possible.
> Signed-off-by: Kaiwan N Billimoria
> ---
> diff --git a/scripts/leaking_addresses.pl b/scripts/leaking_addresses.pl
> index 865c07649dff..0566f8055ec5 100755
> --- a/scripts/leaking_addresses.pl
> +++ b/scripts/leaking_addresses.pl
> @@ -2,10 +2,10 @@
> #
> # (c) 2017 Tobin C. Harding
> # (c) 2017 Kaiwan N Billimoria (ix86 support)
> -
> +
> # Licensed under the terms of the GNU GPL License version 2
> #
> -# leaking_addresses.pl: Scan 64 bit kernel for potential leaking addresses.
> +# leaking_addresses.pl: Scan 32/64 bit kernel for potential leaking
> addresses.
> # - Scans dmesg output.
> # - Walks directory tree and parses each file (for each directory in @DIRS).
> #
> @@ -14,7 +14,7 @@
> #
> # You may like to set kptr_restrict=2 before running script
> # (see Documentation/sysctl/kernel.txt).
> -
> +#
> use warnings;
> use strict;
> use POSIX;
> @@ -37,7 +37,7 @@ my $TIMEOUT = 10;
> # Script can only grep for kernel addresses on the following architectures.
> If
> # your architecture is not listed here and has a grep'able kernel address
> please
> # consider submitting a patch.
> -my @SUPPORTED_ARCHITECTURES = ('x86_64', 'ppc64');
> +my @SUPPORTED_ARCHITECTURES = ('x86_64', 'ppc64', 'i[3456]86');
>
> # Command line options.
> my $help = 0;
> @@ -49,6 +49,12 @@ my $input_raw = "";# Read raw results from file
> instead of scanning.
> my $suppress_dmesg = 0; # Don't show dmesg in output.
> my $squash_by_path = 0; # Summary report grouped by absolute
> path.
> my $squash_by_filename = 0; # Summary report grouped by filename.
> +my $page_offset_param = 0; # 32-bit: overrides value of
> PAGE_OFFSET_32BIT
I don't like the _param here, it's not in style with the rest of the
code. I do like the global name $PAGE_OFFSET_32BIT though. You don't
_really_ need both since the command line option _is_ a global. I also
struggled with the Perl variable nomenclature between capitals for
globals but not for command line options. (For the record I attempted to
imitate checkpatch.pl.)
+my $page_offset = 0; # ...
> +
> +my $bit_size = 64; # Check 64-bit kernel addresses by default
I thought we said we didn't need this?
> +my $kconfig_file = '/boot/config-'.`uname -r`;
> +$kconfig_file =~ s/\R*//g;
> +my $PAGE_OFFSET_32BIT = 0xc000;
So, the page_offset stuff still needs a bit of work. We want it as
simple as possible and also we don't want the 32 bit stuff cluttering up
the 64 bit stuff (i.e with lots of globals). For this reason I think it
would be nice to confine all this to a subroutine then we can do
if (is_ix86_32()) {
$page_offset = get_page_offset();
...
if ($addr < $page_offset)
...
}
> # Do not parse these files (absolute path).
> my @skip_parse_files_abs = ('/proc/kmsg',
> @@ -99,10 +105,11 @@ Options:
>
> -o, --output-raw= Save results for future processing.
> -i, --input-raw= Read
Re: [PATCH v2 1/5] mm: memory_hotplug: Memory hotplug (add) support for arm64
On Thu, Nov 23, 2017 at 4:43 PM, Maciej Bielski
wrote:
> Introduces memory hotplug functionality (hot-add) for arm64.
>
> Changes v1->v2:
> - swapper pgtable updated in place on hot add, avoiding unnecessary copy:
> all changes are additive and non destructive.
>
> - stop_machine used to updated swapper on hot add, avoiding races
>
> - checking if pagealloc is under debug to stay coherent with mem_map
>
> Signed-off-by: Maciej Bielski
> Signed-off-by: Andrea Reale
> ---
> arch/arm64/Kconfig | 12 ++
> arch/arm64/configs/defconfig | 1 +
> arch/arm64/include/asm/mmu.h | 3 ++
> arch/arm64/mm/init.c | 87
>
> arch/arm64/mm/mmu.c | 39
> 5 files changed, 142 insertions(+)
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 0df64a6..c736bba 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -641,6 +641,14 @@ config HOTPLUG_CPU
> Say Y here to experiment with turning CPUs off and on. CPUs
> can be controlled through /sys/devices/system/cpu.
>
> +config ARCH_HAS_ADD_PAGES
> + def_bool y
> + depends on ARCH_ENABLE_MEMORY_HOTPLUG
> +
> +config ARCH_ENABLE_MEMORY_HOTPLUG
> + def_bool y
> +depends on !NUMA
> +
> # Common NUMA Features
> config NUMA
> bool "Numa Memory Allocation and Scheduler Support"
> @@ -715,6 +723,10 @@ config ARCH_HAS_CACHE_LINE_SIZE
>
> source "mm/Kconfig"
>
> +config ARCH_MEMORY_PROBE
> + def_bool y
> + depends on MEMORY_HOTPLUG
> +
> config SECCOMP
> bool "Enable seccomp to safely compute untrusted bytecode"
> ---help---
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 34480e9..5fc5656 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -80,6 +80,7 @@ CONFIG_ARM64_VA_BITS_48=y
> CONFIG_SCHED_MC=y
> CONFIG_NUMA=y
> CONFIG_PREEMPT=y
> +CONFIG_MEMORY_HOTPLUG=y
> CONFIG_KSM=y
> CONFIG_TRANSPARENT_HUGEPAGE=y
> CONFIG_CMA=y
> diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h
> index 0d34bf0..2b3fa4d 100644
> --- a/arch/arm64/include/asm/mmu.h
> +++ b/arch/arm64/include/asm/mmu.h
> @@ -40,5 +40,8 @@ extern void create_pgd_mapping(struct mm_struct *mm,
> phys_addr_t phys,
>pgprot_t prot, bool page_mappings_only);
> extern void *fixmap_remap_fdt(phys_addr_t dt_phys);
> extern void mark_linear_text_alias_ro(void);
> +#ifdef CONFIG_MEMORY_HOTPLUG
> +extern void hotplug_paging(phys_addr_t start, phys_addr_t size);
> +#endif
>
> #endif
> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> index 5960bef..e96e7d3 100644
> --- a/arch/arm64/mm/init.c
> +++ b/arch/arm64/mm/init.c
> @@ -722,3 +722,90 @@ static int __init register_mem_limit_dumper(void)
> return 0;
> }
> __initcall(register_mem_limit_dumper);
> +
> +#ifdef CONFIG_MEMORY_HOTPLUG
> +int add_pages(int nid, unsigned long start_pfn,
> + unsigned long nr_pages, bool want_memblock)
> +{
> + int ret;
> + u64 start_addr = start_pfn << PAGE_SHIFT;
> + /*
> +* Mark the first page in the range as unusable. This is needed
> +* because __add_section (within __add_pages) wants pfn_valid
> +* of it to be false, and in arm64 pfn falid is implemented by
> +* just checking at the nomap flag for existing blocks.
> +*
> +* A small trick here is that __add_section() requires only
> +* phys_start_pfn (that is the first pfn of a section) to be
> +* invalid. Regardless of whether it was assumed (by the function
> +* author) that all pfns within a section are either all valid
> +* or all invalid, it allows to avoid looping twice (once here,
> +* second when memblock_clear_nomap() is called) through all
> +* pfns of the section and modify only one pfn. Thanks to that,
> +* further, in __add_zone() only this very first pfn is skipped
> +* and corresponding page is not flagged reserved. Therefore it
> +* is enough to correct this setup only for it.
> +*
> +* When arch_add_memory() returns the walk_memory_range() function
> +* is called and passed with online_memory_block() callback,
> +* which execution finally reaches the memory_block_action()
> +* function, where also only the first pfn of a memory block is
> +* checked to be reserved. Above, it was first pfn of a section,
> +* here it is a block but
> +* (drivers/base/memory.c):
> +* sections_per_block = block_sz / MIN_MEMORY_BLOCK_SIZE;
> +* (include/linux/memory.h):
> +* #define MIN_MEMORY_BLOCK_SIZE (1UL << SECTION_SIZE_BITS)
> +* so we can consider block and section equivalently
> +*/
> + memblock_mark_nomap(start_addr, 1< + ret = __add_pages(nid, start_pfn, nr_pages, want_memblock
Re: [PATCH] crypto: arm64/aes - do not call crypto_unregister_skcipher twice on error
On Wed, Nov 22, 2017 at 08:55:14AM +, Ard Biesheuvel wrote: > Hello Corentin, > > On 22 November 2017 at 08:08, Corentin Labbe wrote: > > When a cipher fail > > fails > > > to register in aes_init(), the error path go thought > > goes through > > > aes_exit() then crypto_unregister_skciphers(). > > Since aes_exit calls also crypto_unregister_skcipher, this trigger a > > triggers > > > refcount_t: underflow; use-after-free. > > > > Signed-off-by: Corentin Labbe > > --- > > arch/arm64/crypto/aes-glue.c | 5 - > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/crypto/aes-glue.c b/arch/arm64/crypto/aes-glue.c > > index 998ba519a026..9e42ec96243e 100644 > > --- a/arch/arm64/crypto/aes-glue.c > > +++ b/arch/arm64/crypto/aes-glue.c > > @@ -664,7 +664,10 @@ static int __init aes_init(void) > > return 0; > > > > unregister_simds: > > - aes_exit(); > > + for (i = 0; i < ARRAY_SIZE(aes_simd_algs); i++) > > + if (aes_simd_algs[i]) > > + simd_skcipher_free(aes_simd_algs[i]); > > + crypto_unregister_shashes(mac_algs, ARRAY_SIZE(mac_algs)); > > unregister_ciphers: > > crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs)); > > return err; > > -- > > 2.13.6 > > > > > > > Would this also fix it? > > diff --git a/arch/arm64/crypto/aes-glue.c b/arch/arm64/crypto/aes-glue.c > index 998ba519a026..2fa850e86aa8 100644 > --- a/arch/arm64/crypto/aes-glue.c > +++ b/arch/arm64/crypto/aes-glue.c > @@ -665,6 +665,7 @@ static int __init aes_init(void) > > unregister_simds: > aes_exit(); > + return err; > unregister_ciphers: > crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs)); > return err; Yes it is better. I will send a v2 today. Regards
[PATCH 1/2] dt-bindings: clocksource: Add Spreadtrum SC9860 timer
This patch adds documentation of device tree bindings for the timers
found on Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang
---
.../bindings/timer/spreadtrum,sprd-timer.txt | 20
1 file changed, 20 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt
b/Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt
new file mode 100644
index 000..f9d5eb9
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/spreadtrum,sprd-timer.txt
@@ -0,0 +1,20 @@
+Spreadtrum timers
+
+The Spreadtrum SC9860 platform provides 3 general-purpose timers.
+These timers can support 32bit or 64bit counter, as well as supporting
+period mode or one-shot mode, and they are can be wakeup source
+during deep sleep.
+
+Required properties:
+- compatible: should be "sprd,sc9860-timer" for SC9860 platform.
+- reg: The register address of the timer device.
+- interrupts: Should contain the interrupt for the timer device.
+- clock-frequency: The frequency of the clock that drives the counter, in Hz.
+
+Example:
+ timer@4005 {
+ compatible = "sprd,sc9860-timer";
+ reg = <0 0x4005 0 0x20>;
+ interrupts = ;
+ clock-frequency = <32768>;
+ };
--
1.7.9.5
[PATCH 2/2] clocksource: sprd: Add timer driver for Spreadtrum SC9860 platform
The Spreadtrum SC9860 platform will use the architected timers as local
clock events, but we also need a broadcast timer device to wakeup the
cpus when the cpus are in sleep mode.
Thus this patch registers the timer0 to be a broadcast timer supporting
periodic and oneshot events.
Signed-off-by: Baolin Wang
---
drivers/clocksource/Kconfig |8 ++
drivers/clocksource/Makefile |1 +
drivers/clocksource/sprd-timer.c | 213 ++
3 files changed, 222 insertions(+)
create mode 100644 drivers/clocksource/sprd-timer.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index cc60620..aa05132 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -467,6 +467,14 @@ config MTK_TIMER
help
Support for Mediatek timer driver.
+config SPRD_TIMER
+ bool "Spreadtrum timer driver"
+ depends on GENERIC_CLOCKEVENTS
+ depends on ARCH_SPRD || COMPILE_TEST
+ select TIMER_OF
+ help
+ Enables the support for the Spreadtrum timer driver.
+
config SYS_SUPPORTS_SH_MTU2
bool
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index dbc1ad1..c657d3d 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o
obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o
obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o
obj-$(CONFIG_OWL_TIMER)+= owl-timer.o
+obj-$(CONFIG_SPRD_TIMER) += sprd-timer.o
obj-$(CONFIG_ARC_TIMERS) += arc_timer.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
diff --git a/drivers/clocksource/sprd-timer.c b/drivers/clocksource/sprd-timer.c
new file mode 100644
index 000..6fec0c5
--- /dev/null
+++ b/drivers/clocksource/sprd-timer.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2017 Spreadtrum Communications Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define TIMER_NAME "sprd_timer"
+
+#define TIMER_LOAD_LO 0x0
+#define TIMER_LOAD_HI 0x4
+#define TIMER_VALUE_LO 0x8
+#define TIMER_VALUE_HI 0xc
+
+#define TIMER_CTL 0x10
+#define TIMER_CTL_PERIOD_MODE BIT(0)
+#define TIMER_CTL_ENABLE BIT(1)
+#define TIMER_CTL_64BIT_WIDTH BIT(16)
+
+#define TIMER_INT 0x14
+#define TIMER_INT_EN BIT(0)
+#define TIMER_INT_RAW_STS BIT(1)
+#define TIMER_INT_MASK_STS BIT(2)
+#define TIMER_INT_CLR BIT(3)
+
+#define TIMER_VALUE_SHDW_LO0x18
+#define TIMER_VALUE_SHDW_HI0x1c
+
+#define TIMER_VALUE_LO_MASKGENMASK(31, 0)
+#define TIMER_VALUE_HI_SHIFT 32
+
+struct sprd_timer_device {
+ struct clock_event_device ce;
+ void __iomem *base;
+ u32 freq;
+ int irq;
+};
+
+static inline struct sprd_timer_device *
+to_sprd_timer(struct clock_event_device *c)
+{
+ return container_of(c, struct sprd_timer_device, ce);
+}
+
+static void sprd_timer_enable(struct sprd_timer_device *timer, u32 flag)
+{
+ u32 val = readl_relaxed(timer->base + TIMER_CTL);
+
+ val |= TIMER_CTL_ENABLE;
+ if (flag & TIMER_CTL_64BIT_WIDTH)
+ val |= TIMER_CTL_64BIT_WIDTH;
+ else
+ val &= ~TIMER_CTL_64BIT_WIDTH;
+
+ if (flag & TIMER_CTL_PERIOD_MODE)
+ val |= TIMER_CTL_PERIOD_MODE;
+ else
+ val &= ~TIMER_CTL_PERIOD_MODE;
+
+ writel_relaxed(val, timer->base + TIMER_CTL);
+}
+
+static void sprd_timer_disable(struct sprd_timer_device *timer)
+{
+ u32 val = readl_relaxed(timer->base + TIMER_CTL);
+
+ val &= ~TIMER_CTL_ENABLE;
+ writel_relaxed(val, timer->base + TIMER_CTL);
+}
+
+static void sprd_timer_update_counter(struct sprd_timer_device *timer,
+ unsigned long cycles)
+{
+ writel_relaxed(cycles & TIMER_VALUE_LO_MASK,
+ timer->base + TIMER_LOAD_LO);
+ writel_relaxed(cycles >> TIMER_VALUE_HI_SHIFT,
+ timer->base + TIMER_LOAD_HI);
+}
+
+static void sprd_timer_enable_interrupt(struct sprd_timer_device *timer)
+{
+ writel_relaxed(TIMER_INT_EN, timer->base + TIMER_INT);
+}
+
+static void sprd_timer_clear_interrupt(struct sprd_timer_device *timer)
+{
+ u32 val = readl_relaxed(timer->base + TIMER_INT);
+
+ val |= TIMER_INT_CLR;
+ writel_relaxed(val, timer->base + TIMER_INT);
+}
+
+static int sprd_timer_set_next_event(unsigned long cycles,
+struct clock_event_device *ce)
+{
+ struct sprd_timer_device *timer = to_sprd_timer(ce);
+
+ sprd_timer_disable(timer);
+ sprd_timer_update_counter(timer, cycles);
+ sprd_timer_enable(timer, TIMER_CTL_64BIT_WIDTH);
+
+ return 0;
+}
+
+static int sprd_timer_set_periodic(struct clock_event_device *ce)
+{
+
Re: [PATCH] ASoC: amd: added error checks in dma driver
On Thursday 23 November 2017 10:59 PM, Mark Brown wrote: On Thu, Nov 23, 2017 at 08:59:43AM -0800, Guenter Roeck wrote: On Thu, Nov 23, 2017 at 8:30 AM, Vijendar Mukunda wrote: added error checks in acp dma driver Signed-off-by: Vijendar Mukunda Signed-off-by: Akshu Agrawal Signed-off-by: Guenter Roeck This is inappropriate. Specifically: if Guenter wasn't involved in writing or forwarding the patch he shouldn't have a signoff in there, and if you're the one sending the mail you should be the last person in the chain of signoffs. Please see SubmittingPatches for details of what a signoff means and why they're important. This patch was implemented on top of changes implemented by Guenter. There is a separate thread - RE: [PATCH] ASoC: amd: Add error checking to probe function in which Guenter posted changes. Got it, apologies will post changes as v2 version.
Re: [PATCH v2 1/2] s390/virtio: remove the old KVM virtio headers
On 24.11.2017 06:21, Michael S. Tsirkin wrote:
> commit 7fb2b2d51 ("s390/virtio: remove the old KVM virtio transport")
> dropped the transport support. We don't need to keep the header around.
>
> Cc: Thomas Huth
> Cc: Cornelia Huck
> Cc: Halil Pasic
> Cc: Heiko Carstens
> Cc: Martin Schwidefsky
> Signed-off-by: Michael S. Tsirkin
> ---
> arch/s390/include/uapi/asm/kvm_virtio.h | 65
> -
> 1 file changed, 65 deletions(-)
> delete mode 100644 arch/s390/include/uapi/asm/kvm_virtio.h
>
> diff --git a/arch/s390/include/uapi/asm/kvm_virtio.h
> b/arch/s390/include/uapi/asm/kvm_virtio.h
> deleted file mode 100644
> index 7328367..000
> --- a/arch/s390/include/uapi/asm/kvm_virtio.h
> +++ /dev/null
This seems to be already upstream? See:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a401917bc3e2d251ce521
Thomas
[PATCH v2 3/4] platform/x86: intel_telemetry: Improve S0ix logs
Suspend with shallow wakes is not a useful parameter since the phenomena
does not exist on deployed devices and is only a parameter of use during
device power-on phase. The field always reads zero. Additionally there
are other easier methods to detect it, e.g., if the S0ix counter
increments by more than one during suspend. Hence the field is superfluous
and can be removed.
This patch also slightly renames the S0ix total field for better
viewability.
Signed-off-by: Souvik Kumar Chakravarty
---
drivers/platform/x86/intel_telemetry_debugfs.c | 45 --
1 file changed, 7 insertions(+), 38 deletions(-)
Changes since v1:
* Remove alignment changes from this patch
diff --git a/drivers/platform/x86/intel_telemetry_debugfs.c
b/drivers/platform/x86/intel_telemetry_debugfs.c
index 5bc4f20..97aae98 100644
--- a/drivers/platform/x86/intel_telemetry_debugfs.c
+++ b/drivers/platform/x86/intel_telemetry_debugfs.c
@@ -98,10 +98,6 @@ static u32 suspend_shlw_ctr_temp, suspend_deep_ctr_temp;
static u64 suspend_shlw_res_temp, suspend_deep_res_temp;
struct telemetry_susp_stats {
- u32 shlw_swake_ctr;
- u32 deep_swake_ctr;
- u64 shlw_swake_res;
- u64 deep_swake_res;
u32 shlw_ctr;
u32 deep_ctr;
u64 shlw_res;
@@ -598,19 +594,15 @@ static int telem_soc_states_show(struct seq_file *s, void
*unused)
seq_printf(s, "S0IX Shallow\t\t\t %10u\t %10llu\n",
s0ix_shlw_ctr -
- conf->suspend_stats.shlw_ctr -
- conf->suspend_stats.shlw_swake_ctr,
+ conf->suspend_stats.shlw_ctr,
(u64)((s0ix_shlw_res -
- conf->suspend_stats.shlw_res -
- conf->suspend_stats.shlw_swake_res)*10/192));
+ conf->suspend_stats.shlw_res)*10/192));
seq_printf(s, "S0IX Deep\t\t\t %10u\t %10llu\n",
s0ix_deep_ctr -
- conf->suspend_stats.deep_ctr -
- conf->suspend_stats.deep_swake_ctr,
+ conf->suspend_stats.deep_ctr,
(u64)((s0ix_deep_res -
- conf->suspend_stats.deep_res -
- conf->suspend_stats.deep_swake_res)*10/192));
+ conf->suspend_stats.deep_res)*10/192));
seq_printf(s, "Suspend(With S0ixShallow)\t %10u\t %10llu\n",
conf->suspend_stats.shlw_ctr,
@@ -620,13 +612,7 @@ static int telem_soc_states_show(struct seq_file *s, void
*unused)
conf->suspend_stats.deep_ctr,
(u64)(conf->suspend_stats.deep_res*10)/192);
- seq_printf(s, "Suspend(With Shallow-Wakes)\t %10u\t %10llu\n",
- conf->suspend_stats.shlw_swake_ctr +
- conf->suspend_stats.deep_swake_ctr,
- (u64)((conf->suspend_stats.shlw_swake_res +
- conf->suspend_stats.deep_swake_res)*10/192));
-
- seq_printf(s, "S0IX+Suspend Total\t\t %10u\t %10llu\n", s0ix_total_ctr,
+ seq_printf(s, "TOTAL S0IX\t\t\t %10u\t %10llu\n", s0ix_total_ctr,
(u64)(s0ix_total_res*10/192));
seq_puts(s, "\n-\n");
seq_puts(s, "\t\tDEVICE STATES\n");
@@ -920,23 +906,15 @@ static int pm_suspend_exit_cb(void)
suspend_shlw_res_exit -= suspend_shlw_res_temp;
suspend_deep_res_exit -= suspend_deep_res_temp;
- if (suspend_shlw_ctr_exit == 1) {
+ if (suspend_shlw_ctr_exit != 0) {
conf->suspend_stats.shlw_ctr +=
suspend_shlw_ctr_exit;
conf->suspend_stats.shlw_res +=
suspend_shlw_res_exit;
}
- /* Shallow Wakes Case */
- else if (suspend_shlw_ctr_exit > 1) {
- conf->suspend_stats.shlw_swake_ctr +=
- suspend_shlw_ctr_exit;
-
- conf->suspend_stats.shlw_swake_res +=
- suspend_shlw_res_exit;
- }
- if (suspend_deep_ctr_exit == 1) {
+ if (suspend_deep_ctr_exit != 0) {
conf->suspend_stats.deep_ctr +=
suspend_deep_ctr_exit;
@@ -944,15 +922,6 @@ static int pm_suspend_exit_cb(void)
suspend_deep_res_exit;
}
- /* Shallow Wakes Case */
- else if (suspend_deep_ctr_exit > 1) {
- conf->suspend_stats.deep_swake_ctr +=
- suspend_deep_ctr_exit;
-
- conf->suspend_stats.deep_swake_res +=
- suspend_deep_res_exit;
- }
-
out:
suspend_prep_ok = 0;
return NOTIFY_OK;
--
2.7.4
[PATCH v3 2/4] platform/x86: intel_telemetry: Fix suspend stats
Suspend stats are not reported consistently due to a limitation in the PMC
firmware. This limitation causes a delay in updating the s0ix counters and
residencies in the telemetry log upon s0ix exit. As a consequence, reading
these counters from the suspend-exit notifier may result in zero read.
This patch fixes this issue by cross-verifying the s0ix residencies from
the GCR TELEM registers in case the counters are not incremented in the
telemetry log after suspend.
This fixes https://bugzilla.kernel.org/show_bug.cgi?id=197833
Reported-and-tested-by: Rajneesh Bhardwaj
Signed-off-by: Souvik Kumar Chakravarty
---
drivers/platform/x86/intel_telemetry_debugfs.c | 25 +
1 file changed, 25 insertions(+)
Changes since v2:
* Use pmc_ipc_gcr_read64() API to read 64-bits at a time
* Re-introduce the static qualifier to handle the case where the telemetry
suspend/resume log does not contain the s0ix residencies. In that case,
we would like to retain the values from the previous/initial cycle.
Changes since v1:
* Use pmc_ipc_gcr_readq API to read 64-bits at a time
diff --git a/drivers/platform/x86/intel_telemetry_debugfs.c
b/drivers/platform/x86/intel_telemetry_debugfs.c
index 4249e826..5bc4f20 100644
--- a/drivers/platform/x86/intel_telemetry_debugfs.c
+++ b/drivers/platform/x86/intel_telemetry_debugfs.c
@@ -890,6 +890,31 @@ static int pm_suspend_exit_cb(void)
goto out;
}
+ /*
+* Due to some design limitations in the firmware, sometimes the
+* counters do not get updated by the time we reach here. As a
+* workaround, we try to see if this was a genuine case of sleep
+* failure or not by cross-checking from PMC GCR registers directly.
+*/
+ if (suspend_shlw_ctr_exit == suspend_shlw_ctr_temp &&
+ suspend_deep_ctr_exit == suspend_deep_ctr_temp) {
+ ret = intel_pmc_gcr_read64(PMC_GCR_TELEM_SHLW_S0IX_REG,
+ &suspend_shlw_res_exit);
+ if (ret < 0)
+ goto out;
+
+ ret = intel_pmc_gcr_read64(PMC_GCR_TELEM_DEEP_S0IX_REG,
+ &suspend_deep_res_exit);
+ if (ret < 0)
+ goto out;
+
+ if (suspend_shlw_res_exit > suspend_shlw_res_temp)
+ suspend_shlw_ctr_exit++;
+
+ if (suspend_deep_res_exit > suspend_deep_res_temp)
+ suspend_deep_ctr_exit++;
+ }
+
suspend_shlw_ctr_exit -= suspend_shlw_ctr_temp;
suspend_deep_ctr_exit -= suspend_deep_ctr_temp;
suspend_shlw_res_exit -= suspend_shlw_res_temp;
--
2.7.4
[PATCH v1 1/4] platform/x86: intel_pmc_ipc: Add read64 API
Add intel_pmc_gcr_read64() API for reading from 64-bit GCR registers.
This API will be called from intel_telemetry. Update description of
intel_pmc_gcr_read().
Signed-off-by: Souvik Kumar Chakravarty
---
arch/x86/include/asm/intel_pmc_ipc.h | 6 ++
drivers/platform/x86/intel_pmc_ipc.c | 33 +++--
2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/intel_pmc_ipc.h
b/arch/x86/include/asm/intel_pmc_ipc.h
index fac89eb..19c9369 100644
--- a/arch/x86/include/asm/intel_pmc_ipc.h
+++ b/arch/x86/include/asm/intel_pmc_ipc.h
@@ -37,6 +37,7 @@ int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
u32 *out, u32 outlen);
int intel_pmc_s0ix_counter_read(u64 *data);
int intel_pmc_gcr_read(u32 offset, u32 *data);
+int intel_pmc_gcr_read64(u32 offset, u64 *data);
int intel_pmc_gcr_write(u32 offset, u32 data);
int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);
@@ -69,6 +70,11 @@ static inline int intel_pmc_gcr_read(u32 offset, u32 *data)
return -EINVAL;
}
+static inline int intel_pmc_gcr_read64(u32 offset, u64 *data)
+{
+ return -EINVAL;
+}
+
static inline int intel_pmc_gcr_write(u32 offset, u32 data)
{
return -EINVAL;
diff --git a/drivers/platform/x86/intel_pmc_ipc.c
b/drivers/platform/x86/intel_pmc_ipc.c
index e03fa314..e7edc8c 100644
--- a/drivers/platform/x86/intel_pmc_ipc.c
+++ b/drivers/platform/x86/intel_pmc_ipc.c
@@ -215,11 +215,11 @@ static inline int is_gcr_valid(u32 offset)
}
/**
- * intel_pmc_gcr_read() - Read PMC GCR register
+ * intel_pmc_gcr_read() - Read a 32-bit PMC GCR register
* @offset:offset of GCR register from GCR address base
* @data: data pointer for storing the register output
*
- * Reads the PMC GCR register of given offset.
+ * Reads the 32-bit PMC GCR register at given offset.
*
* Return: negative value on error or 0 on success.
*/
@@ -244,6 +244,35 @@ int intel_pmc_gcr_read(u32 offset, u32 *data)
EXPORT_SYMBOL_GPL(intel_pmc_gcr_read);
/**
+ * intel_pmc_gcr_read64() - Read a 64-bit PMC GCR register
+ * @offset:offset of GCR register from GCR address base
+ * @data: data pointer for storing the register output
+ *
+ * Reads the 64-bit PMC GCR register at given offset.
+ *
+ * Return: negative value on error or 0 on success.
+ */
+int intel_pmc_gcr_read64(u32 offset, u64 *data)
+{
+ int ret;
+
+ spin_lock(&ipcdev.gcr_lock);
+
+ ret = is_gcr_valid(offset);
+ if (ret < 0) {
+ spin_unlock(&ipcdev.gcr_lock);
+ return ret;
+ }
+
+ *data = readq(ipcdev.gcr_mem_base + offset);
+
+ spin_unlock(&ipcdev.gcr_lock);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pmc_gcr_read64);
+
+/**
* intel_pmc_gcr_write() - Write PMC GCR register
* @offset:offset of GCR register from GCR address base
* @data: register update value
--
2.7.4
[PATCH v2 4/4] platform/x86: intel_telemetry: Remove redundancies
This patch removes unnecessary header files and newlines.
It also fixes some alignment issues.
Signed-off-by: Souvik Kumar Chakravarty
---
drivers/platform/x86/intel_telemetry_debugfs.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
Changes since v1:
* Consolidated alignment changes into this patch
diff --git a/drivers/platform/x86/intel_telemetry_debugfs.c
b/drivers/platform/x86/intel_telemetry_debugfs.c
index 97aae98..ffd0474 100644
--- a/drivers/platform/x86/intel_telemetry_debugfs.c
+++ b/drivers/platform/x86/intel_telemetry_debugfs.c
@@ -23,7 +23,6 @@
*/
#include
#include
-#include
#include
#include
#include
@@ -32,11 +31,10 @@
#include
#include
#include
-#include
#include
-#define DRIVER_NAME"telemetry_soc_debugfs"
-#define DRIVER_VERSION "1.0.0"
+#define DRIVER_NAME"telemetry_soc_debugfs"
+#define DRIVER_VERSION "1.0.0"
/* ApolloLake SoC Event-IDs */
#define TELEM_APL_PSS_PSTATES_ID 0x2802
@@ -246,7 +244,6 @@ static struct telem_ioss_pg_info telem_apl_ioss_pg_data[] =
{
{"PRTC",25},
};
-
struct telemetry_debugfs_conf {
struct telemetry_susp_stats suspend_stats;
struct dentry *telemetry_dbg_dir;
@@ -381,7 +378,6 @@ static int telem_pss_states_show(struct seq_file *s, void
*unused)
TELEM_APL_MASK_PCS_STATE;
}
-
TELEM_CHECK_AND_PARSE_EVTS(conf->pss_idle_id,
conf->pss_idle_evts - 1,
pss_idle, evtlog[index].telem_evtlog,
@@ -401,7 +397,6 @@ static int telem_pss_states_show(struct seq_file *s, void
*unused)
conf->pcs_s0ix_blkd_data,
TELEM_MASK_BYTE);
-
TELEM_CHECK_AND_PARSE_EVTS(conf->pss_wakeup_id,
conf->pss_wakeup_evts,
pss_s0ix_wakeup,
@@ -494,7 +489,6 @@ static const struct file_operations telem_pss_ops = {
.release= single_release,
};
-
static int telem_ioss_states_show(struct seq_file *s, void *unused)
{
struct telemetry_evtlog evtlog[TELEM_MAX_OS_ALLOCATED_EVENTS];
@@ -613,7 +607,7 @@ static int telem_soc_states_show(struct seq_file *s, void
*unused)
(u64)(conf->suspend_stats.deep_res*10)/192);
seq_printf(s, "TOTAL S0IX\t\t\t %10u\t %10llu\n", s0ix_total_ctr,
- (u64)(s0ix_total_res*10/192));
+ (u64)(s0ix_total_res*10/192));
seq_puts(s, "\n-\n");
seq_puts(s, "\t\tDEVICE STATES\n");
seq_puts(s, "-\n");
@@ -758,7 +752,6 @@ static const struct file_operations telem_pss_trc_verb_ops
= {
.release= single_release,
};
-
static int telem_ioss_trc_verb_show(struct seq_file *s, void *unused)
{
u32 verbosity;
--
2.7.4
[PATCH v3 0/4] platform/x86: intel_telemetry: Fix logs and formatting
This patchset fixes https://bugzilla.kernel.org/show_bug.cgi?id=197833, and other issues related to telemetry counters. It also cleans up formatting and removes redundant code. It is rebased on top of the TESTING branch. Changes since v2: * Changes in GCR read API name and adding back static qualifier to account for case of missing logs during suspend/resume Changes since v1: * Code-Review comments have been incorporated. Souvik Kumar Chakravarty (4): platform/x86: intel_pmc_ipc: Add read64 API platform/x86: intel_telemetry: Fix suspend stats platform/x86: intel_telemetry: Improve S0ix logs platform/x86: intel_telemetry: Remove redundancies arch/x86/include/asm/intel_pmc_ipc.h | 6 ++ drivers/platform/x86/intel_pmc_ipc.c | 33 +- drivers/platform/x86/intel_telemetry_debugfs.c | 83 +++--- 3 files changed, 72 insertions(+), 50 deletions(-) -- 2.7.4
[PATCH v2 1/2] s390/virtio: remove the old KVM virtio headers
commit 7fb2b2d51 ("s390/virtio: remove the old KVM virtio transport")
dropped the transport support. We don't need to keep the header around.
Cc: Thomas Huth
Cc: Cornelia Huck
Cc: Halil Pasic
Cc: Heiko Carstens
Cc: Martin Schwidefsky
Signed-off-by: Michael S. Tsirkin
---
arch/s390/include/uapi/asm/kvm_virtio.h | 65 -
1 file changed, 65 deletions(-)
delete mode 100644 arch/s390/include/uapi/asm/kvm_virtio.h
diff --git a/arch/s390/include/uapi/asm/kvm_virtio.h
b/arch/s390/include/uapi/asm/kvm_virtio.h
deleted file mode 100644
index 7328367..000
--- a/arch/s390/include/uapi/asm/kvm_virtio.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-/*
- * definition for virtio for kvm on s390
- *
- * Copyright IBM Corp. 2008
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License (version 2 only)
- * as published by the Free Software Foundation.
- *
- *Author(s): Christian Borntraeger
- */
-
-#ifndef __KVM_S390_VIRTIO_H
-#define __KVM_S390_VIRTIO_H
-
-#include
-
-struct kvm_device_desc {
- /* The device type: console, network, disk etc. Type 0 terminates. */
- __u8 type;
- /* The number of virtqueues (first in config array) */
- __u8 num_vq;
- /*
-* The number of bytes of feature bits. Multiply by 2: one for host
-* features and one for guest acknowledgements.
-*/
- __u8 feature_len;
- /* The number of bytes of the config array after virtqueues. */
- __u8 config_len;
- /* A status byte, written by the Guest. */
- __u8 status;
- __u8 config[0];
-};
-
-/*
- * This is how we expect the device configuration field for a virtqueue
- * to be laid out in config space.
- */
-struct kvm_vqconfig {
- /* The token returned with an interrupt. Set by the guest */
- __u64 token;
- /* The address of the virtio ring */
- __u64 address;
- /* The number of entries in the virtio_ring */
- __u16 num;
-
-};
-
-#define KVM_S390_VIRTIO_NOTIFY 0
-#define KVM_S390_VIRTIO_RESET 1
-#define KVM_S390_VIRTIO_SET_STATUS 2
-
-/* The alignment to use between consumer and producer parts of vring.
- * This is pagesize for historical reasons. */
-#define KVM_S390_VIRTIO_RING_ALIGN 4096
-
-
-/* These values are supposed to be in ext_params on an interrupt */
-#define VIRTIO_PARAM_MASK 0xff
-#define VIRTIO_PARAM_VRING_INTERRUPT 0x0
-#define VIRTIO_PARAM_CONFIG_CHANGED0x1
-#define VIRTIO_PARAM_DEV_ADD 0x2
-
-#endif
--
MST
[PATCH v2 2/2] s390/virtio: add BSD license to virtio-ccw
The original intent of the virtio header relicensing from 2008 was to make sure anyone can implement compatible devices/drivers. The virtio-ccw was omitted by mistake. We have an ack from the only contributor as well as the maintainer from IBM, so it's not too late to fix that. Make it dual-licensed with GPLv2, as the whole kernel is GPL2. Acked-by: Christian Borntraeger Acked-by: Cornelia Huck Signed-off-by: Michael S. Tsirkin --- arch/s390/include/uapi/asm/virtio-ccw.h | 32 +++- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/arch/s390/include/uapi/asm/virtio-ccw.h b/arch/s390/include/uapi/asm/virtio-ccw.h index 967aad3..41c267e 100644 --- a/arch/s390/include/uapi/asm/virtio-ccw.h +++ b/arch/s390/include/uapi/asm/virtio-ccw.h @@ -1,14 +1,36 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note or BSD-3-Clause */ /* * Definitions for virtio-ccw devices. * * Copyright IBM Corp. 2013 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * * Author(s): Cornelia Huck + * + * This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * 3. Neither the name of IBM nor the names of its contributors + *may be used to endorse or promote products derived from this software + *without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. */ #ifndef __KVM_VIRTIO_CCW_H #define __KVM_VIRTIO_CCW_H -- MST
Re: [PATCH] net-sysfs: export gso_max_size attribute
On Wed, 22 Nov 2017 16:30:41 -0800 Solio Sarabia wrote: > The netdevice gso_max_size is exposed to allow users fine-control on > systems with multiple NICs with different GSO buffer sizes, and where > the virtual devices like bridge and veth, need to be aware of the GSO > size of the underlying devices. > > In a virtualized environment, setting the right GSO sizes for physical > and virtual devices makes all TSO work to be on physical NIC, improving > throughput and reducing CPU util. If virtual devices send buffers > greater than what NIC supports, it forces host to do TSO for buffers > exceeding the limit, increasing CPU utilization in host. > > Suggested-by: Shiny Sebastian > Signed-off-by: Solio Sarabia > --- > In one test scenario with Hyper-V host, Ubuntu 16.04 VM, with Docker > inside VM, and NTttcp sending 40 Gbps from one container, setting the > right gso_max_size values for all network devices in the chain, reduces > CPU overhead about 3x (for the sender), since all TSO work is done by > physical NIC. > > net/core/net-sysfs.c | 30 ++ > 1 file changed, 30 insertions(+) You probably should expose gso_max_segs as well.
Re: [PATCH] frv: fix build failure
Hi Sudip, On Thu, 2017-11-23 at 23:01 +, Sudip Mukherjee wrote: > Hi Alexey, > > On Thu, Nov 23, 2017 at 05:17:19PM +, Alexey Brodkin wrote: > > > > Hi Sudip, > > > > On Tue, 2017-11-21 at 22:10 +, Sudip Mukherjee wrote: > > > > > > The frv defconfig build is failing with the error: > > > lib/mpi/mpih-div.o: In function `mpihelp_divrem': > > > mpih-div.c:(.text+0x30c): undefined reference to `abort' > > > > > > The function 'abort' was never defined for the frv architecture. > > > Create 'abort' as is done in other arch like 'arm' and 'unicore32'. > > > > > > Signed-off-by: Sudip Mukherjee > > > --- > > > > I'm seeing the same issue building for ARC from today's Linus' tree. > > Maybe it worth implementing abort() as a weak function for every > > arch/platform > > that doesn't have it explicitly defined? Otherwise we'll end-up with > > useless code duplication. > > Do you mean define it for every arch or define it in a common place so > that all arch can use it? Essentially I'd prefer to have just 1 instance of this function. In fact I'd even remove existing implementations in ARM, Unicore32 and M32R and have a generic implementation as this function obviously has nothing arch-specific. > I did a quick try with the attached patch on two different arch, one of > them (m32r) has the 'abort' defined and the other (frv) was failing due > to lack of abort, and they both built without any warnings or errors. Well maybe add call to panic() there as well as it is done for ARM, unicore32 and M32R? > But I am not sure if 'kernel/exit.c' is the right place for it. > Any suggestion? I guess it should be indeed something in "kernel/" and maybe your existing choice of "kernel/exit.c" is not bad. Just send a patch to LKML and you'll get much better guidance on that I guess :) Anyways thanks for looking at this one. -Alexey
Re: [PATCH] crypto: arm64/aes - do not call crypto_unregister_skcipher twice on error
On Wed, Nov 22, 2017 at 08:55:14AM +, Ard Biesheuvel wrote: > > Would this also fix it? Looks good. Could you resubmit with a sign-off? Thanks, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Re: [PATCH 1/3] scsi: arcmsr: Add driver module parameter msi_enable
Hello Dan,
On Thu, 2017-11-23 at 13:44 +0300, Dan Carpenter wrote:
> On Thu, Nov 23, 2017 at 09:27:19AM +0800, Ching Huang wrote:
> > From: Ching Huang
> >
> > Add module parameter msi_enable to has a chance to disable msi interrupt if
> > it does not work properly.
> >
> > Signed-off-by: Ching Huang
> > ---
> >
> > diff -uprN a/drivers/scsi/arcmsr/arcmsr_hba.c
> > b/drivers/scsi/arcmsr/arcmsr_hba.c
> > --- a/drivers/scsi/arcmsr/arcmsr_hba.c 2017-11-23 14:29:26.0
> > +0800
> > +++ b/drivers/scsi/arcmsr/arcmsr_hba.c 2017-11-23 16:02:28.0
> > +0800
> > @@ -75,6 +75,10 @@ MODULE_DESCRIPTION("Areca ARC11xx/12xx/1
> > MODULE_LICENSE("Dual BSD/GPL");
> > MODULE_VERSION(ARCMSR_DRIVER_VERSION);
> >
> > +static int msi_enable = 1;
> > +module_param(msi_enable, int, S_IRUGO);
> ^^^
> checkpatch.pl will complain that this should be 0444
S_IRUGO value is 00444, defined in -> .
A. It will be not a issue.
>
> > +MODULE_PARM_DESC(msi_enable, " Enable MSI interrupt(0 ~ 1),
> > msi_enable=1(enable), =0(disable)");
> ^
> Remove the extra space
OK
>
> > +
> > static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
> > module_param(host_can_queue, int, S_IRUGO);
> > MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default
> > is 128");
> > @@ -831,11 +835,15 @@ arcmsr_request_irq(struct pci_dev *pdev,
> > pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
> > flags = 0;
> > } else {
> > - nvec = pci_alloc_irq_vectors(pdev, 1, 1,
> > - PCI_IRQ_MSI | PCI_IRQ_LEGACY);
> > + if (msi_enable == 1)
> > + nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
> > + else
> > + nvec = pci_alloc_irq_vectors(pdev, 1, 1,
> > PCI_IRQ_LEGACY);
> > if (nvec < 1)
> > return FAILED;
>
> I feel like we should try PCI_IRQ_MSI then if it fails we could fall
> back to PCI_IRQ_LEGACY. Originally, it worked like this and now it just
> fails unless you toggle the module param. It's a regression.
update as below
---
unsigned int irq_flag;
irq_flag = PCI_IRQ_LEGACY;
if (msi_enable == 1)
irq_flag |= PCI_IRQ_MSI;
nvec = pci_alloc_irq_vectors(pdev, 1, 1, irq_flag);
> >
> > + if (msi_enable == 1)
> > + pr_info("arcmsr%d: msi enabled\n", acb->host->host_no);
>
> This printk could be improved. Use dev_info(&pdev->dev, for a start.
> I know that the other prints don't use this, but we could use it one
> time then slowly add more users until more are using dev_info() than
> pr_info() and then someone will decide to clean up the old users.
update as below
---
if (msi_enable == 1)
dev_info(&pdev->dev, "msi enabled\n");
>
> regards,
> dan carpenter
>
[PATCH v3 01/19] x86/asm/64: Allocate and enable the SYSENTER stack
This will simplify future changes that want scratch variables early in
the SYSENTER handler -- they'll be able to spill registers to the
stack. It also lets us get rid of a SWAPGS_UNSAFE_STACK user.
This does not depend on CONFIG_IA32_EMULATION because we'll want the
stack space even without IA32 emulation.
As far as I can tell, the reason that this wasn't done from day 1 is
that we use IST for #DB and #BP, which is IMO rather nasty and causes
a lot more problems than it solves. But, since #DB uses IST, we don't
actually need a real stack for SYSENTER (because SYSENTER with TF set
will invoke #DB on the IST stack rather than the SYSENTER stack).
I want to remove IST usage from these vectors some day, and this patch
is a prerequisite for that as well.
Reviewed-by: Thomas Gleixner
Reviewed-by: Borislav Petkov
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_64_compat.S | 2 +-
arch/x86/include/asm/processor.h | 3 ---
arch/x86/kernel/asm-offsets.c| 5 +
arch/x86/kernel/asm-offsets_32.c | 5 -
arch/x86/kernel/cpu/common.c | 4 +++-
arch/x86/kernel/process.c| 2 --
arch/x86/kernel/traps.c | 3 +--
7 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index 568e130d932c..dcc6987f9bae 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -48,7 +48,7 @@
*/
ENTRY(entry_SYSENTER_compat)
/* Interrupts are off on entry. */
- SWAPGS_UNSAFE_STACK
+ SWAPGS
movqPER_CPU_VAR(cpu_current_top_of_stack), %rsp
/*
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index cc16fa882e3e..504a3bb4d5f0 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -340,14 +340,11 @@ struct tss_struct {
*/
unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
-#ifdef CONFIG_X86_32
/*
* Space for the temporary SYSENTER stack.
*/
unsigned long SYSENTER_stack_canary;
unsigned long SYSENTER_stack[64];
-#endif
-
} cacheline_aligned;
DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss);
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index 8ea78275480d..b275863128eb 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -93,4 +93,9 @@ void common(void) {
BLANK();
DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
+
+ /* Offset from cpu_tss to SYSENTER_stack */
+ OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
+ /* Size of SYSENTER_stack */
+ DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct
*)0)->SYSENTER_stack));
}
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index dedf428b20b6..52ce4ea16e53 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -50,11 +50,6 @@ void foo(void)
DEFINE(TSS_sysenter_sp0, offsetof(struct tss_struct, x86_tss.sp0) -
offsetofend(struct tss_struct, SYSENTER_stack));
- /* Offset from cpu_tss to SYSENTER_stack */
- OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
- /* Size of SYSENTER_stack */
- DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct
*)0)->SYSENTER_stack));
-
#ifdef CONFIG_CC_STACKPROTECTOR
BLANK();
OFFSET(stack_canary_offset, stack_canary, canary);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index fa998ca8aa5a..ccb5f66c4e5b 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1386,7 +1386,9 @@ void syscall_init(void)
* AMD doesn't allow SYSENTER in long mode (either 32- or 64-bit).
*/
wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
- wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
+ wrmsrl_safe(MSR_IA32_SYSENTER_ESP,
+ (unsigned long)this_cpu_ptr(&cpu_tss) +
+ offsetofend(struct tss_struct, SYSENTER_stack));
wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);
#else
wrmsrl(MSR_CSTAR, (unsigned long)ignore_sysret);
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 97fb3e5737f5..35d674157fda 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -71,9 +71,7 @@ __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct,
cpu_tss) = {
*/
.io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 },
#endif
-#ifdef CONFIG_X86_32
.SYSENTER_stack_canary = STACK_END_MAGIC,
-#endif
};
EXPORT_PER_CPU_SYMBOL(cpu_tss);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b7b0f74a2150..2008dd0f8ccb 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -800,14 +800,13 @@ dotraplinkage void do_debug(struct pt_regs *regs, long
error_code)
debug_
[PATCH v3 03/19] x86/gdt: Put per-cpu GDT remaps in ascending order
We currently have CPU 0's GDT at the top of the GDT range and
higher-numbered CPUs at lower addresses. This happens because the
fixmap is upside down (index 0 is the top of the fixmap).
Flip it so that GDTs are in ascending order by virtual address.
This will simplify a future patch that will generalize the GDT
remap to contain multiple pages.
Reviewed-by: Borislav Petkov
Reviewed-by: Thomas Gleixner
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/desc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index 4011cb03ef08..95cd95eb7285 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -63,7 +63,7 @@ static inline struct desc_struct *get_current_gdt_rw(void)
/* Get the fixmap index for a specific processor */
static inline unsigned int get_cpu_gdt_ro_index(int cpu)
{
- return FIX_GDT_REMAP_BEGIN + cpu;
+ return FIX_GDT_REMAP_END - cpu;
}
/* Provide the fixmap address of the remapped GDT */
--
2.13.6
[PATCH v3 05/19] x86/kasan/64: Teach KASAN about the cpu_entry_area
The cpu_entry_area will contain stacks. Make sure that KASAN has
appropriate shadow mappings for them.
Cc: Andrey Ryabinin
Cc: Alexander Potapenko
Cc: Dmitry Vyukov
Cc: kasan-...@googlegroups.com
Signed-off-by: Andy Lutomirski
---
arch/x86/mm/kasan_init_64.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/x86/mm/kasan_init_64.c b/arch/x86/mm/kasan_init_64.c
index 99dfed6dfef8..54561dce742e 100644
--- a/arch/x86/mm/kasan_init_64.c
+++ b/arch/x86/mm/kasan_init_64.c
@@ -277,6 +277,7 @@ void __init kasan_early_init(void)
void __init kasan_init(void)
{
int i;
+ void *cpu_entry_area_begin, *cpu_entry_area_end;
#ifdef CONFIG_KASAN_INLINE
register_die_notifier(&kasan_die_notifier);
@@ -329,8 +330,18 @@ void __init kasan_init(void)
(unsigned long)kasan_mem_to_shadow(_end),
early_pfn_to_nid(__pa(_stext)));
+ cpu_entry_area_begin = (void
*)(__fix_to_virt(FIX_CPU_ENTRY_AREA_BOTTOM));
+ cpu_entry_area_end = (void *)(__fix_to_virt(FIX_CPU_ENTRY_AREA_TOP) +
PAGE_SIZE);
+
kasan_populate_zero_shadow(kasan_mem_to_shadow((void *)MODULES_END),
- (void *)KASAN_SHADOW_END);
+ kasan_mem_to_shadow(cpu_entry_area_begin));
+
+ kasan_populate_shadow((unsigned
long)kasan_mem_to_shadow(cpu_entry_area_begin),
+ (unsigned
long)kasan_mem_to_shadow(cpu_entry_area_end),
+ 0);
+
+ kasan_populate_zero_shadow(kasan_mem_to_shadow(cpu_entry_area_end),
+ (void *)KASAN_SHADOW_END);
load_cr3(init_top_pgt);
__flush_tlb_all();
--
2.13.6
[PATCH v3 02/19] x86/dumpstack: Add get_stack_info() support for the SYSENTER stack
get_stack_info() doesn't currently know about the SYSENTER stack, so
unwinding will fail if we entered the kernel on the SYSENTER stack
and haven't fully switched off. Teach get_stack_info() about the
SYSENTER stack.
With future patches applied that run part of the entry code on the
SYSENTER stack and introduce an intentional BUG(), I would get:
PANIC: double fault, error_code: 0x0
...
RIP: 0010:do_error_trap+0x33/0x1c0
...
Call Trace:
Code: ...
With this patch, I get:
PANIC: double fault, error_code: 0x0
...
Call Trace:
? async_page_fault+0x36/0x60
? invalid_op+0x22/0x40
? async_page_fault+0x36/0x60
? sync_regs+0x3c/0x40
? sync_regs+0x2e/0x40
? error_entry+0x6c/0xd0
? async_page_fault+0x36/0x60
Code: ...
Reviewed-by: Borislav Petkov
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/stacktrace.h | 3 +++
arch/x86/kernel/dumpstack.c | 19 +++
arch/x86/kernel/dumpstack_32.c| 6 ++
arch/x86/kernel/dumpstack_64.c| 6 ++
4 files changed, 34 insertions(+)
diff --git a/arch/x86/include/asm/stacktrace.h
b/arch/x86/include/asm/stacktrace.h
index 8da111b3c342..f8062bfd43a0 100644
--- a/arch/x86/include/asm/stacktrace.h
+++ b/arch/x86/include/asm/stacktrace.h
@@ -16,6 +16,7 @@ enum stack_type {
STACK_TYPE_TASK,
STACK_TYPE_IRQ,
STACK_TYPE_SOFTIRQ,
+ STACK_TYPE_SYSENTER,
STACK_TYPE_EXCEPTION,
STACK_TYPE_EXCEPTION_LAST = STACK_TYPE_EXCEPTION + N_EXCEPTION_STACKS-1,
};
@@ -28,6 +29,8 @@ struct stack_info {
bool in_task_stack(unsigned long *stack, struct task_struct *task,
struct stack_info *info);
+bool in_sysenter_stack(unsigned long *stack, struct stack_info *info);
+
int get_stack_info(unsigned long *stack, struct task_struct *task,
struct stack_info *info, unsigned long *visit_mask);
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index f13b4c00a5de..5e7d10e8ca25 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -43,6 +43,25 @@ bool in_task_stack(unsigned long *stack, struct task_struct
*task,
return true;
}
+bool in_sysenter_stack(unsigned long *stack, struct stack_info *info)
+{
+ struct tss_struct *tss = this_cpu_ptr(&cpu_tss);
+
+ /* Treat the canary as part of the stack for unwinding purposes. */
+ void *begin = &tss->SYSENTER_stack_canary;
+ void *end = (void *)&tss->SYSENTER_stack + sizeof(tss->SYSENTER_stack);
+
+ if ((void *)stack < begin || (void *)stack >= end)
+ return false;
+
+ info->type = STACK_TYPE_SYSENTER;
+ info->begin = begin;
+ info->end = end;
+ info->next_sp = NULL;
+
+ return true;
+}
+
static void printk_stack_address(unsigned long address, int reliable,
char *log_lvl)
{
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index daefae83a3aa..5ff13a6b3680 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -26,6 +26,9 @@ const char *stack_type_name(enum stack_type type)
if (type == STACK_TYPE_SOFTIRQ)
return "SOFTIRQ";
+ if (type == STACK_TYPE_SYSENTER)
+ return "SYSENTER";
+
return NULL;
}
@@ -93,6 +96,9 @@ int get_stack_info(unsigned long *stack, struct task_struct
*task,
if (task != current)
goto unknown;
+ if (in_sysenter_stack(stack, info))
+ goto recursion_check;
+
if (in_hardirq_stack(stack, info))
goto recursion_check;
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 88ce2ffdb110..abc828f8c297 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -37,6 +37,9 @@ const char *stack_type_name(enum stack_type type)
if (type == STACK_TYPE_IRQ)
return "IRQ";
+ if (type == STACK_TYPE_SYSENTER)
+ return "SYSENTER";
+
if (type >= STACK_TYPE_EXCEPTION && type <= STACK_TYPE_EXCEPTION_LAST)
return exception_stack_names[type - STACK_TYPE_EXCEPTION];
@@ -115,6 +118,9 @@ int get_stack_info(unsigned long *stack, struct task_struct
*task,
if (in_irq_stack(stack, info))
goto recursion_check;
+ if (in_sysenter_stack(stack, info))
+ goto recursion_check;
+
goto unknown;
recursion_check:
--
2.13.6
[PATCH v3 07/19] x86/dumpstack: Handle stack overflow on all stacks
We currently special-case stack overflow on the task stack. We're
going to start putting special stacks in the fixmap with a custom
layout, so they'll have guard pages, too. Teach the unwinder to be
able to unwind an overflow of any of the stacks.
Reviewed-by: Borislav Petkov
Signed-off-by: Andy Lutomirski
---
arch/x86/kernel/dumpstack.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 5e7d10e8ca25..a8aa70c05489 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -90,24 +90,28 @@ void show_trace_log_lvl(struct task_struct *task, struct
pt_regs *regs,
* - task stack
* - interrupt stack
* - HW exception stacks (double fault, nmi, debug, mce)
+* - SYSENTER stack
*
-* x86-32 can have up to three stacks:
+* x86-32 can have up to four stacks:
* - task stack
* - softirq stack
* - hardirq stack
+* - SYSENTER stack
*/
for (regs = NULL; stack; stack = PTR_ALIGN(stack_info.next_sp,
sizeof(long))) {
const char *stack_name;
- /*
-* If we overflowed the task stack into a guard page, jump back
-* to the bottom of the usable stack.
-*/
- if (task_stack_page(task) - (void *)stack < PAGE_SIZE)
- stack = task_stack_page(task);
-
- if (get_stack_info(stack, task, &stack_info, &visit_mask))
- break;
+ if (get_stack_info(stack, task, &stack_info, &visit_mask)) {
+ /*
+* We weren't on a valid stack. It's possible that
+* we overflowed a valid stack into a guard page.
+* See if the next page up is valid so that we can
+* generate some kind of backtrace if this happens.
+*/
+ stack = (unsigned long *)PAGE_ALIGN((unsigned
long)stack);
+ if (get_stack_info(stack, task, &stack_info,
&visit_mask))
+ break;
+ }
stack_name = stack_type_name(stack_info.type);
if (stack_name)
--
2.13.6
[PATCH v3 10/19] x86/asm/64: Separate cpu_current_top_of_stack from TSS.sp0
On 64-bit kernels, we used to assume that TSS.sp0 was the current
top of stack. With the addition of an entry trampoline, this will
no longer be the case. Store the current top of stack in TSS.sp1,
which is otherwise unused but shares the same cacheline.
Reviewed-by: Thomas Gleixner
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/processor.h | 18 +-
arch/x86/include/asm/thread_info.h | 2 +-
arch/x86/kernel/asm-offsets_64.c | 1 +
arch/x86/kernel/process.c | 10 ++
arch/x86/kernel/process_64.c | 1 +
5 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 48d44fae3d27..3a09e5571a92 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -305,7 +305,13 @@ struct x86_hw_tss {
struct x86_hw_tss {
u32 reserved1;
u64 sp0;
+
+ /*
+* We store cpu_current_top_of_stack in sp1 so it's always accessible.
+* Linux does not use ring 1, so sp1 is not otherwise needed.
+*/
u64 sp1;
+
u64 sp2;
u64 reserved2;
u64 ist[7];
@@ -364,6 +370,8 @@ DECLARE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss);
#ifdef CONFIG_X86_32
DECLARE_PER_CPU(unsigned long, cpu_current_top_of_stack);
+#else
+#define cpu_current_top_of_stack cpu_tss.x86_tss.sp1
#endif
/*
@@ -535,12 +543,12 @@ static inline void native_swapgs(void)
static inline unsigned long current_top_of_stack(void)
{
-#ifdef CONFIG_X86_64
- return this_cpu_read_stable(cpu_tss.x86_tss.sp0);
-#else
- /* sp0 on x86_32 is special in and around vm86 mode. */
+ /*
+* We can't read directly from tss.sp0: sp0 on x86_32 is special in
+* and around vm86 mode and sp0 on x86_64 is special because of the
+* entry trampoline.
+*/
return this_cpu_read_stable(cpu_current_top_of_stack);
-#endif
}
static inline bool on_thread_stack(void)
diff --git a/arch/x86/include/asm/thread_info.h
b/arch/x86/include/asm/thread_info.h
index 70f425947dc5..44a04999791e 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -207,7 +207,7 @@ static inline int arch_within_stack_frames(const void *
const stack,
#else /* !__ASSEMBLY__ */
#ifdef CONFIG_X86_64
-# define cpu_current_top_of_stack (cpu_tss + TSS_sp0)
+# define cpu_current_top_of_stack (cpu_tss + TSS_sp1)
#endif
#endif
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index 630212fa9b9d..ad649a8a74a0 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -63,6 +63,7 @@ int main(void)
OFFSET(TSS_ist, tss_struct, x86_tss.ist);
OFFSET(TSS_sp0, tss_struct, x86_tss.sp0);
+ OFFSET(TSS_sp1, tss_struct, x86_tss.sp1);
BLANK();
#ifdef CONFIG_CC_STACKPROTECTOR
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 35d674157fda..86e83762e3b3 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -56,6 +56,16 @@ __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct,
cpu_tss) = {
* Poison it.
*/
.sp0 = (1UL << (BITS_PER_LONG-1)) + 1,
+
+#ifdef CONFIG_X86_64
+ /*
+* .sp1 is cpu_current_top_of_stack. The init task never
+* runs user code, but cpu_current_top_of_stack should still
+* be well defined before the first context switch.
+*/
+ .sp1 = TOP_OF_INIT_STACK,
+#endif
+
#ifdef CONFIG_X86_32
.ss0 = __KERNEL_DS,
.ss1 = __KERNEL_CS,
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index eeeb34f85c25..bafe65b08697 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -462,6 +462,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct
*next_p)
* Switch the PDA and FPU contexts.
*/
this_cpu_write(current_task, next_p);
+ this_cpu_write(cpu_current_top_of_stack, task_top_of_stack(next_p));
/* Reload sp0. */
update_sp0(next_p);
--
2.13.6
[PATCH v3 09/19] x86/asm: Remap the TSS into the cpu entry area
This has a secondary purpose: it puts the entry stack into a region
with a well-controlled layout. A subsequent patch will take
advantage of this to streamline the SYSCALL entry code to be able to
find it more easily.
Reviewed-by: Thomas Gleixner
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_32.S | 6 --
arch/x86/include/asm/fixmap.h | 7 +++
arch/x86/kernel/asm-offsets.c | 3 +++
arch/x86/kernel/cpu/common.c | 38 --
arch/x86/kernel/dumpstack.c | 3 ++-
arch/x86/power/cpu.c | 11 ++-
6 files changed, 54 insertions(+), 14 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index 4838037f97f6..0ab316c46806 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -941,7 +941,8 @@ ENTRY(debug)
movl%esp, %eax # pt_regs pointer
/* Are we currently on the SYSENTER stack? */
- PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
+ movlPER_CPU_VAR(cpu_entry_area), %ecx
+ addl$CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack +
SIZEOF_SYSENTER_stack, %ecx
subl%eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
cmpl$SIZEOF_SYSENTER_stack, %ecx
jb .Ldebug_from_sysenter_stack
@@ -984,7 +985,8 @@ ENTRY(nmi)
movl%esp, %eax # pt_regs pointer
/* Are we currently on the SYSENTER stack? */
- PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
+ movlPER_CPU_VAR(cpu_entry_area), %ecx
+ addl$CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack +
SIZEOF_SYSENTER_stack, %ecx
subl%eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
cmpl$SIZEOF_SYSENTER_stack, %ecx
jb .Lnmi_from_sysenter_stack
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 0f4c92f02968..3a42da14c2cb 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -51,6 +51,13 @@ extern unsigned long __FIXADDR_TOP;
*/
struct cpu_entry_area {
char gdt[PAGE_SIZE];
+
+ /*
+* The GDT is just below cpu_tss and thus serves (on x86_64) as a
+* a read-only guard page for the SYSENTER stack at the bottom
+* of the TSS region.
+*/
+ struct tss_struct tss;
};
#define CPU_ENTRY_AREA_PAGES (sizeof(struct cpu_entry_area) / PAGE_SIZE)
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index b275863128eb..55858b277cf6 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -98,4 +98,7 @@ void common(void) {
OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
/* Size of SYSENTER_stack */
DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct
*)0)->SYSENTER_stack));
+
+ /* Layout info for cpu_entry_area */
+ OFFSET(CPU_ENTRY_AREA_tss, cpu_entry_area, tss);
}
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d173f6013467..c67742df569a 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -490,6 +490,19 @@ void load_percpu_segment(int cpu)
load_stack_canary_segment();
}
+static void set_percpu_fixmap_pages(int fixmap_index, void *ptr, int pages,
pgprot_t prot)
+{
+ int i;
+
+ for (i = 0; i < pages; i++)
+ __set_fixmap(fixmap_index - i, per_cpu_ptr_to_phys(ptr +
i*PAGE_SIZE), prot);
+}
+
+#ifdef CONFIG_X86_32
+/* The 32-bit entry code needs to find cpu_entry_area. */
+DEFINE_PER_CPU(struct cpu_entry_area *, cpu_entry_area);
+#endif
+
/* Setup the fixmap mappings only once per-processor */
static inline void setup_cpu_entry_area(int cpu)
{
@@ -531,7 +544,15 @@ static inline void setup_cpu_entry_area(int cpu)
*/
BUILD_BUG_ON((offsetof(struct tss_struct, x86_tss) ^
offsetofend(struct tss_struct, x86_tss)) & PAGE_MASK);
+ BUILD_BUG_ON(sizeof(struct tss_struct) % PAGE_SIZE != 0);
+ set_percpu_fixmap_pages(get_cpu_entry_area_index(cpu, tss),
+ &per_cpu(cpu_tss, cpu),
+ sizeof(struct tss_struct) / PAGE_SIZE,
+ PAGE_KERNEL);
+#ifdef CONFIG_X86_32
+ this_cpu_write(cpu_entry_area, get_cpu_entry_area(cpu));
+#endif
}
/* Load the original GDT from the per-cpu structure */
@@ -1282,7 +1303,8 @@ void enable_sep_cpu(void)
wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
wrmsr(MSR_IA32_SYSENTER_ESP,
- (unsigned long)tss + offsetofend(struct tss_struct,
SYSENTER_stack),
+ (unsigned long)&get_cpu_entry_area(cpu)->tss +
+ offsetofend(struct tss_struct, SYSENTER_stack),
0);
wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
@@ -1395,6 +1417,8 @@ static DEFINE_PER_CPU_PAGE_ALIGNED(char, e
[PATCH v3 08/19] x86/asm: Move SYSENTER_stack to the beginning of struct tss_struct
SYSENTER_stack should have reliable overflow detection, which
means that it needs to be at the bottom of a page, not the top.
Move it to the beginning of struct tss_struct and page-align it.
Also add an assertion to make sure that the fixed hardware TSS
doesn't cross a page boundary.
Reviewed-by: Thomas Gleixner
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/processor.h | 21 -
arch/x86/kernel/cpu/common.c | 21 +
2 files changed, 33 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index c24456429c7d..48d44fae3d27 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -328,7 +328,16 @@ struct x86_hw_tss {
struct tss_struct {
/*
-* The hardware state:
+* Space for the temporary SYSENTER stack, used for SYSENTER
+* and the entry trampoline as well.
+*/
+ unsigned long SYSENTER_stack_canary;
+ unsigned long SYSENTER_stack[64];
+
+ /*
+* The fixed hardware portion. This must not cross a page boundary
+* at risk of violating the SDM's advice and potentially triggering
+* errata.
*/
struct x86_hw_tss x86_tss;
@@ -339,15 +348,9 @@ struct tss_struct {
* be within the limit.
*/
unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
+} __aligned(PAGE_SIZE);
- /*
-* Space for the temporary SYSENTER stack.
-*/
- unsigned long SYSENTER_stack_canary;
- unsigned long SYSENTER_stack[64];
-} cacheline_aligned;
-
-DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss);
+DECLARE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss);
/*
* sizeof(unsigned long) coming from an extra "long" at the end
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 62cdc10a7d94..d173f6013467 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -511,6 +511,27 @@ static inline void setup_cpu_entry_area(int cpu)
#endif
__set_fixmap(get_cpu_entry_area_index(cpu, gdt),
get_cpu_gdt_paddr(cpu), gdt_prot);
+
+ /*
+* The Intel SDM says (Volume 3, 7.2.1):
+*
+* Avoid placing a page boundary in the part of the TSS that the
+* processor reads during a task switch (the first 104 bytes). The
+* processor may not correctly perform address translations if a
+* boundary occurs in this area. During a task switch, the processor
+* reads and writes into the first 104 bytes of each TSS (using
+* contiguous physical addresses beginning with the physical address
+* of the first byte of the TSS). So, after TSS access begins, if
+* part of the 104 bytes is not physically contiguous, the processor
+* will access incorrect information without generating a page-fault
+* exception.
+*
+* There are also a lot of errata involving the TSS spanning a page
+* boundary. Assert that we're not doing that.
+*/
+ BUILD_BUG_ON((offsetof(struct tss_struct, x86_tss) ^
+ offsetofend(struct tss_struct, x86_tss)) & PAGE_MASK);
+
}
/* Load the original GDT from the per-cpu structure */
--
2.13.6
[PATCH v3 14/19] x86/entry/64: Create a percpu SYSCALL entry trampoline
Handling SYSCALL is tricky: the SYSCALL handler is entered with every
single register (except FLAGS), including RSP, live. It somehow needs
to set RSP to point to a valid stack, which means it needs to save the
user RSP somewhere and find its own stack pointer. The canonical way
to do this is with SWAPGS, which lets us access percpu data using the
%gs prefix.
With KAISER-like pagetable switching, this is problematic. Without a
scratch register, switching CR3 is impossible, so %gs-based percpu
memory would need to be mapped in the user pagetables. Doing that
without information leaks is difficult or impossible.
Instead, use a different sneaky trick. Map a copy of the first part
of the SYSCALL asm at a different address for each CPU. Now RIP
varies depending on the CPU, so we can use RIP-relative memory access
to access percpu memory. By putting the relevant information (one
scratch slot and the stack address) at a constant offset relative to
RIP, we can make SYSCALL work without relying on %gs.
A nice thing about this approach is that we can easily switch it on
and off if we want pagetable switching to be configurable.
The compat variant of SYSCALL doesn't have this problem in the first
place -- there are plenty of scratch registers, since we don't care
about preserving r8-r15. This patch therefore doesn't touch SYSCALL32
at all.
XXX: Whenever we settle how KAISER gets turned on and off, we should do
the same to this.
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_64.S | 48 +++
arch/x86/include/asm/fixmap.h | 2 ++
arch/x86/kernel/asm-offsets.c | 1 +
arch/x86/kernel/cpu/common.c | 12 ++-
arch/x86/kernel/vmlinux.lds.S | 10 +
5 files changed, 72 insertions(+), 1 deletion(-)
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 426b8c669d6a..0cde243b7542 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -140,6 +140,54 @@ END(native_usergs_sysret64)
* with them due to bugs in both AMD and Intel CPUs.
*/
+ .pushsection .entry_trampoline, "ax"
+
+/*
+ * The code in here gets remapped into cpu_entry_area's trampoline. This means
+ * that the assembler and linker have the wrong idea as to where this code
+ * lives (and, in fact, it's mapped more than once, so it's not even at a
+ * fixed address). So we can't reference any symbols outside the entry
+ * trampoline and expect it to work.
+ *
+ * Instead, we carefully abuse %rip-relative addressing.
+ * .Lentry_trampoline(%rip) refers to the start of the remapped) entry
+ * trampoline. We can thus find cpu_entry_area with this macro:
+ */
+
+#define CPU_ENTRY_AREA \
+ _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
+
+/* The top word of the SYSENTER stack is hot and is usable as scratch space. */
+#define RSP_SCRATCH CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack + \
+ SIZEOF_SYSENTER_stack - 8 + CPU_ENTRY_AREA
+
+ENTRY(entry_SYSCALL_64_trampoline)
+ UNWIND_HINT_EMPTY
+ swapgs
+
+ /* Stash the user RSP. */
+ movq%rsp, RSP_SCRATCH
+
+ /* Load the top of the task stack into RSP */
+ movqCPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp
+
+ /* Start building the simulated IRET frame. */
+ pushq $__USER_DS /* pt_regs->ss */
+ pushq RSP_SCRATCH /* pt_regs->sp */
+ pushq %r11/* pt_regs->flags */
+ pushq $__USER_CS /* pt_regs->cs */
+ pushq %rcx/* pt_regs->ip */
+
+ /*
+* x86 lacks a near absolute jump, and we can't jump to the real
+* entry text with a relative jump, so we fake it using retq.
+*/
+ pushq $entry_SYSCALL_64_after_hwframe
+ retq
+END(entry_SYSCALL_64_trampoline)
+
+ .popsection
+
ENTRY(entry_SYSCALL_64)
UNWIND_HINT_EMPTY
/*
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 3a42da14c2cb..7eb1b5490395 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -58,6 +58,8 @@ struct cpu_entry_area {
* of the TSS region.
*/
struct tss_struct tss;
+
+ char entry_trampoline[PAGE_SIZE];
};
#define CPU_ENTRY_AREA_PAGES (sizeof(struct cpu_entry_area) / PAGE_SIZE)
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index 55858b277cf6..61b1af88ac07 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -101,4 +101,5 @@ void common(void) {
/* Layout info for cpu_entry_area */
OFFSET(CPU_ENTRY_AREA_tss, cpu_entry_area, tss);
+ OFFSET(CPU_ENTRY_AREA_entry_trampoline, cpu_entry_area,
entry_trampoline);
}
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 7c82a8a8bfda..5a05db084659 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu
[PATCH v3 16/19] x86/irq/64: In the stack overflow warning, print the offending IP
In case something goes wrong with unwind (not unlikely in case of
overflow), print the offending IP where we detected the overflow.
Signed-off-by: Andy Lutomirski
---
arch/x86/kernel/irq_64.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 020efbf5786b..d86e344f5b3d 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -57,10 +57,10 @@ static inline void stack_overflow_check(struct pt_regs
*regs)
if (regs->sp >= estack_top && regs->sp <= estack_bottom)
return;
- WARN_ONCE(1, "do_IRQ(): %s has overflown the kernel stack
(cur:%Lx,sp:%lx,irq stk top-bottom:%Lx-%Lx,exception stk top-bottom:%Lx-%Lx)\n",
+ WARN_ONCE(1, "do_IRQ(): %s has overflown the kernel stack
(cur:%Lx,sp:%lx,irq stk top-bottom:%Lx-%Lx,exception stk
top-bottom:%Lx-%Lx,ip:%pF)\n",
current->comm, curbase, regs->sp,
irq_stack_top, irq_stack_bottom,
- estack_top, estack_bottom);
+ estack_top, estack_bottom, (void *)regs->ip);
if (sysctl_panic_on_stackoverflow)
panic("low stack detected by irq handler - check messages\n");
--
2.13.6
[PATCH v3 13/19] x86/asm/64: Return to userspace from the trampoline stack
By itself, this is useless. It gives us the ability to run some final code before exit that cannnot run on the kernel stack. This could include a CR3 switch a la KAISER or some kernel stack erasing, for example. (Or even weird things like *changing* which kernel stack gets used as an ASLR-strengthening mechanism.) The SYSRET32 path is not covered yet. It could be in the future or we could just ignore it and force the slow path if needed. Signed-off-by: Andy Lutomirski --- arch/x86/entry/entry_64.S | 55 +++ 1 file changed, 51 insertions(+), 4 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 7d47199f405f..426b8c669d6a 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -330,8 +330,24 @@ syscall_return_via_sysret: popq%rsi/* skip rcx */ popq%rdx popq%rsi + + /* +* Now all regs are restored except RSP and RDI. +* Save old stack pointer and switch to trampoline stack. +*/ + movq%rsp, %rdi + movqPER_CPU_VAR(cpu_tss + TSS_sp0), %rsp + + pushq RSP-RDI(%rdi) /* RSP */ + pushq (%rdi) /* RDI */ + + /* +* We are on the trampoline stack. All regs except RDI are live. +* We can do future final exit work right here. +*/ + popq%rdi - movqRSP-ORIG_RAX(%rsp), %rsp + popq%rsp USERGS_SYSRET64 END(entry_SYSCALL_64) @@ -633,10 +649,41 @@ GLOBAL(swapgs_restore_regs_and_return_to_usermode) ud2 1: #endif - SWAPGS POP_EXTRA_REGS - POP_C_REGS - addq$8, %rsp/* skip regs->orig_ax */ + popq%r11 + popq%r10 + popq%r9 + popq%r8 + popq%rax + popq%rcx + popq%rdx + popq%rsi + + /* +* The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS. +* Save old stack pointer and switch to trampoline stack. +*/ + movq%rsp, %rdi + movqPER_CPU_VAR(cpu_tss + TSS_sp0), %rsp + + /* Copy the IRET frame to the trampoline stack. */ + pushq 6*8(%rdi) /* SS */ + pushq 5*8(%rdi) /* RSP */ + pushq 4*8(%rdi) /* EFLAGS */ + pushq 3*8(%rdi) /* CS */ + pushq 2*8(%rdi) /* RIP */ + + /* Push user RDI on the trampoline stack. */ + pushq (%rdi) + + /* +* We are on the trampoline stack. All regs except RDI are live. +* We can do future final exit work right here. +*/ + + /* Restore RDI. */ + popq%rdi + SWAPGS INTERRUPT_RETURN -- 2.13.6
[PATCH v3 18/19] x86/entry/64: Remove the SYSENTER stack canary
Now that the SYSENTER stack has a guard page, there's no need for a
canary to detect overflow after the fact.
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/processor.h | 1 -
arch/x86/kernel/dumpstack.c | 3 +--
arch/x86/kernel/process.c| 1 -
arch/x86/kernel/traps.c | 7 ---
4 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 3a09e5571a92..7743aedb82ea 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -337,7 +337,6 @@ struct tss_struct {
* Space for the temporary SYSENTER stack, used for SYSENTER
* and the entry trampoline as well.
*/
- unsigned long SYSENTER_stack_canary;
unsigned long SYSENTER_stack[64];
/*
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index bb61919c9335..9ce5fcf7d14d 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -48,8 +48,7 @@ bool in_sysenter_stack(unsigned long *stack, struct
stack_info *info)
int cpu = smp_processor_id();
struct tss_struct *tss = &get_cpu_entry_area(cpu)->tss;
- /* Treat the canary as part of the stack for unwinding purposes. */
- void *begin = &tss->SYSENTER_stack_canary;
+ void *begin = &tss->SYSENTER_stack;
void *end = (void *)&tss->SYSENTER_stack + sizeof(tss->SYSENTER_stack);
if ((void *)stack < begin || (void *)stack >= end)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 86e83762e3b3..6a04287f222b 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -81,7 +81,6 @@ __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct,
cpu_tss) = {
*/
.io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 },
#endif
- .SYSENTER_stack_canary = STACK_END_MAGIC,
};
EXPORT_PER_CPU_SYMBOL(cpu_tss);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index cbc4272bb9dd..19475dbff068 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -801,13 +801,6 @@ dotraplinkage void do_debug(struct pt_regs *regs, long
error_code)
debug_stack_usage_dec();
exit:
- /*
-* This is the most likely code path that involves non-trivial use
-* of the SYSENTER stack. Check that we haven't overrun it.
-*/
- WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
-"Overran or corrupted SYSENTER stack\n");
-
ist_exit(regs);
}
NOKPROBE_SYMBOL(do_debug);
--
2.13.6
[PATCH v3 12/19] x86/asm/64: Use a percpu trampoline stack for IDT entries
Historically, IDT entries from usermode have always gone directly to the running task's kernel stack. Rearrange it so that we enter on a percpu trampoline stack and then manually switch to the task's stack. This touches a couple of extra cachelines, but it gives us a chance to run some code before we touch the kernel stack. The asm isn't exactly beautiful, but I think that fully refactoring it can wait. Signed-off-by: Andy Lutomirski --- arch/x86/entry/entry_64.S| 67 ++-- arch/x86/entry/entry_64_compat.S | 5 ++- arch/x86/include/asm/switch_to.h | 2 +- arch/x86/include/asm/traps.h | 1 - arch/x86/kernel/cpu/common.c | 6 ++-- arch/x86/kernel/traps.c | 18 +-- 6 files changed, 68 insertions(+), 31 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index f81d50d7ceac..7d47199f405f 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -563,6 +563,13 @@ END(irq_entries_start) /* 0(%rsp): ~(interrupt number) */ .macro interrupt func cld + + testb $3, CS-ORIG_RAX(%rsp) + jz 1f + SWAPGS + callswitch_to_thread_stack +1: + ALLOC_PT_GPREGS_ON_STACK SAVE_C_REGS SAVE_EXTRA_REGS @@ -572,12 +579,8 @@ END(irq_entries_start) jz 1f /* -* IRQ from user mode. Switch to kernel gsbase and inform context -* tracking that we're in kernel mode. -*/ - SWAPGS - - /* +* IRQ from user mode. +* * We need to tell lockdep that IRQs are off. We can't do this until * we fix gsbase, and we should do it before enter_from_user_mode * (which can take locks). Since TRACE_IRQS_OFF idempotent, @@ -831,6 +834,32 @@ apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt */ #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) +/* + * Switch to the thread stack. This is called with the IRET frame and + * orig_ax on the stack. (That is, RDI..R12 are not on the stack and + * space has not been allocated for them.) + */ +ENTRY(switch_to_thread_stack) + UNWIND_HINT_FUNC + + pushq %rdi + movq%rsp, %rdi + movqPER_CPU_VAR(cpu_current_top_of_stack), %rsp + UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI + + pushq 7*8(%rdi) /* regs->ss */ + pushq 6*8(%rdi) /* regs->rsp */ + pushq 5*8(%rdi) /* regs->eflags */ + pushq 4*8(%rdi) /* regs->cs */ + pushq 3*8(%rdi) /* regs->ip */ + pushq 2*8(%rdi) /* regs->orig_ax */ + pushq 8(%rdi) /* return address */ + UNWIND_HINT_FUNC + + movq(%rdi), %rdi + ret +END(switch_to_thread_stack) + .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 ENTRY(\sym) UNWIND_HINT_IRET_REGS offset=\has_error_code*8 @@ -848,11 +877,12 @@ ENTRY(\sym) ALLOC_PT_GPREGS_ON_STACK - .if \paranoid - .if \paranoid == 1 + .if \paranoid < 2 testb $3, CS(%rsp)/* If coming from userspace, switch stacks */ - jnz 1f + jnz .Lfrom_usermode_switch_stack_\@ .endif + + .if \paranoid callparanoid_entry .else callerror_entry @@ -894,20 +924,15 @@ ENTRY(\sym) jmp error_exit .endif - .if \paranoid == 1 + .if \paranoid < 2 /* -* Paranoid entry from userspace. Switch stacks and treat it +* Entry from userspace. Switch stacks and treat it * as a normal entry. This means that paranoid handlers * run in real process context if user_mode(regs). */ -1: +.Lfrom_usermode_switch_stack_\@: callerror_entry - - movq%rsp, %rdi /* pt_regs pointer */ - callsync_regs - movq%rax, %rsp /* switch stack */ - movq%rsp, %rdi /* pt_regs pointer */ .if \has_error_code @@ -1170,6 +1195,14 @@ ENTRY(error_entry) SWAPGS .Lerror_entry_from_usermode_after_swapgs: + /* Put us onto the real thread stack. */ + popq%r12/* save return addr in %12 */ + movq%rsp, %rdi /* arg0 = pt_regs pointer */ + callsync_regs + movq%rax, %rsp /* switch stack */ + ENCODE_FRAME_POINTER + pushq %r12 + /* * We need to tell lockdep that IRQs are off. We can't do this until * we fix gsbase, and we should do it before enter_from_user_mode diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S index dcc6987f9bae..95ad40eb7eff 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arc
[PATCH v3 15/19] x86/irq: Remove an old outdated comment about context tracking races
That race has been fixed and code cleaned up for a while now. Signed-off-by: Andy Lutomirski --- arch/x86/kernel/irq.c | 12 1 file changed, 12 deletions(-) diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c index 49cfd9fe7589..68e1867cca80 100644 --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c @@ -219,18 +219,6 @@ __visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs) /* high bit used in ret_from_ code */ unsigned vector = ~regs->orig_ax; - /* -* NB: Unlike exception entries, IRQ entries do not reliably -* handle context tracking in the low-level entry code. This is -* because syscall entries execute briefly with IRQs on before -* updating context tracking state, so we can take an IRQ from -* kernel mode with CONTEXT_USER. The low-level entry code only -* updates the context if we came from user mode, so we won't -* switch to CONTEXT_KERNEL. We'll fix that once the syscall -* code is cleaned up enough that we can cleanly defer enabling -* IRQs. -*/ - entering_irq(); /* entering_irq() tells RCU that we're not quiescent. Check it. */ -- 2.13.6
[PATCH v3 17/19] x86/entry/64: Move the IST stacks into cpu_entry_area
The IST stacks are needed when an IST exception occurs and are
accessed before any kernel code at all runs. Move them into
cpu_entry_area.
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/fixmap.h | 10 ++
arch/x86/kernel/cpu/common.c | 40 +---
2 files changed, 35 insertions(+), 15 deletions(-)
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 7eb1b5490395..15cf010225c9 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -60,6 +60,16 @@ struct cpu_entry_area {
struct tss_struct tss;
char entry_trampoline[PAGE_SIZE];
+
+#ifdef CONFIG_X86_64
+ /*
+* Exception stacks used for IST entries.
+*
+* In the future, this should have a separate slot for each stack
+* with guard pages between them.
+*/
+ char exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
DEBUG_STKSZ];
+#endif
};
#define CPU_ENTRY_AREA_PAGES (sizeof(struct cpu_entry_area) / PAGE_SIZE)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 5a05db084659..6b949e6ea0f9 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -503,6 +503,22 @@ static void set_percpu_fixmap_pages(int fixmap_index, void
*ptr, int pages, pgpr
DEFINE_PER_CPU(struct cpu_entry_area *, cpu_entry_area);
#endif
+#ifdef CONFIG_X86_64
+/*
+ * Special IST stacks which the CPU switches to when it calls
+ * an IST-marked descriptor entry. Up to 7 stacks (hardware
+ * limit), all of them are 4K, except the debug stack which
+ * is 8K.
+ */
+static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = {
+ [0 ... N_EXCEPTION_STACKS - 1]= EXCEPTION_STKSZ,
+ [DEBUG_STACK - 1] = DEBUG_STKSZ
+};
+
+static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
+ [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]);
+#endif
+
/* Setup the fixmap mappings only once per-processor */
static inline void setup_cpu_entry_area(int cpu)
{
@@ -557,6 +573,14 @@ static inline void setup_cpu_entry_area(int cpu)
#endif
#ifdef CONFIG_X86_64
+ BUILD_BUG_ON(sizeof(exception_stacks) % PAGE_SIZE != 0);
+ BUILD_BUG_ON(sizeof(exception_stacks) !=
+sizeof(((struct cpu_entry_area *)0)->exception_stacks));
+ set_percpu_fixmap_pages(get_cpu_entry_area_index(cpu, exception_stacks),
+ &per_cpu(exception_stacks, cpu),
+ sizeof(exception_stacks) / PAGE_SIZE,
+ PAGE_KERNEL);
+
__set_fixmap(get_cpu_entry_area_index(cpu, entry_trampoline),
__pa_symbol(_entry_trampoline), PAGE_KERNEL_RX);
#endif
@@ -1407,20 +1431,6 @@ DEFINE_PER_CPU(unsigned int, irq_count) __visible = -1;
DEFINE_PER_CPU(int, __preempt_count) = INIT_PREEMPT_COUNT;
EXPORT_PER_CPU_SYMBOL(__preempt_count);
-/*
- * Special IST stacks which the CPU switches to when it calls
- * an IST-marked descriptor entry. Up to 7 stacks (hardware
- * limit), all of them are 4K, except the debug stack which
- * is 8K.
- */
-static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = {
- [0 ... N_EXCEPTION_STACKS - 1]= EXCEPTION_STKSZ,
- [DEBUG_STACK - 1] = DEBUG_STKSZ
-};
-
-static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
- [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]);
-
/* May not be marked __init: used by software suspend */
void syscall_init(void)
{
@@ -1626,7 +1636,7 @@ void cpu_init(void)
* set up and load the per-CPU TSS
*/
if (!oist->ist[0]) {
- char *estacks = per_cpu(exception_stacks, cpu);
+ char *estacks = get_cpu_entry_area(cpu)->exception_stacks;
for (v = 0; v < N_EXCEPTION_STACKS; v++) {
estacks += exception_stack_sizes[v];
--
2.13.6
[PATCH v3 11/19] x86/espfix/64: Stop assuming that pt_regs is on the entry stack
When we start using an entry trampoline, a #GP from userspace will
be delivered on the entry stack, not on the task stack. Fix the
espfix64 #DF fixup to set up #GP according to TSS.SP0, rather than
assuming that pt_regs + 1 == SP0. This won't change anything
without an entry stack, but it will make the code continue to work
when an entry stack is added.
Reviewed-by: Thomas Gleixner
Signed-off-by: Andy Lutomirski
---
arch/x86/kernel/traps.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 2008dd0f8ccb..1bd43f044c62 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -359,7 +359,8 @@ dotraplinkage void do_double_fault(struct pt_regs *regs,
long error_code)
regs->cs == __KERNEL_CS &&
regs->ip == (unsigned long)native_irq_return_iret)
{
- struct pt_regs *normal_regs = task_pt_regs(current);
+ struct pt_regs *normal_regs =
+ (struct pt_regs *)this_cpu_read(cpu_tss.x86_tss.sp0) -
1;
/* Fake a #GP(0) from userspace. */
memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
@@ -390,7 +391,7 @@ dotraplinkage void do_double_fault(struct pt_regs *regs,
long error_code)
*
* Processors update CR2 whenever a page fault is detected. If a
* second page fault occurs while an earlier page fault is being
-* deliv- ered, the faulting linear address of the second fault will
+* delivered, the faulting linear address of the second fault will
* overwrite the contents of CR2 (replacing the previous
* address). These updates to CR2 occur even if the page fault
* results in a double fault or occurs during the delivery of a
--
2.13.6
[PATCH v3 00/19] Entry stack switching
This sets up stack switching, including for SYSCALL. I think it's in decent shape. I'm fiddling with a patch to make the TSS remap read-only on 64-bit. Known issues: - I think we're going to want a way to turn the stack switching on and off either at boot time or at runtime. It should be fairly straightforward to make it work. - I think the ORC unwinder isn't so good at dealing with stack overflows. It bails too early (I think), resulting in lots of ? entries. This isn't a regression with this series -- it's just something that could be improved. Changes from v2: - Tons of review comments - The IDT entry stack switching code is less messy - The last patch is new Changes from v1: - Fixed KASAN for real (as far as I can tell). - Compiler errors due to my old hackish KASAN fix are gone. - Context tracking lockdep errors are fixed (and maybe Changes from farther back: - This is quite massively changed from last time. - 32-bit seems to build and mostly work - KASAN is less broken now Andy Lutomirski (19): x86/asm/64: Allocate and enable the SYSENTER stack x86/dumpstack: Add get_stack_info() support for the SYSENTER stack x86/gdt: Put per-cpu GDT remaps in ascending order x86/fixmap: Generalize the GDT fixmap mechanism x86/kasan/64: Teach KASAN about the cpu_entry_area x86/asm: Fix assumptions that the HW TSS is at the beginning of cpu_tss x86/dumpstack: Handle stack overflow on all stacks x86/asm: Move SYSENTER_stack to the beginning of struct tss_struct x86/asm: Remap the TSS into the cpu entry area x86/asm/64: Separate cpu_current_top_of_stack from TSS.sp0 x86/espfix/64: Stop assuming that pt_regs is on the entry stack x86/asm/64: Use a percpu trampoline stack for IDT entries x86/asm/64: Return to userspace from the trampoline stack x86/entry/64: Create a percpu SYSCALL entry trampoline x86/irq: Remove an old outdated comment about context tracking races x86/irq/64: In the stack overflow warning, print the offending IP x86/entry/64: Move the IST stacks into cpu_entry_area x86/entry/64: Remove the SYSENTER stack canary x86/entry: Clean up SYSENTER_stack code arch/x86/entry/entry_32.S | 6 +- arch/x86/entry/entry_64.S | 170 - arch/x86/entry/entry_64_compat.S | 7 +- arch/x86/include/asm/desc.h| 11 +-- arch/x86/include/asm/fixmap.h | 58 - arch/x86/include/asm/processor.h | 49 ++- arch/x86/include/asm/stacktrace.h | 3 + arch/x86/include/asm/switch_to.h | 2 +- arch/x86/include/asm/thread_info.h | 2 +- arch/x86/include/asm/traps.h | 1 - arch/x86/kernel/asm-offsets.c | 7 ++ arch/x86/kernel/asm-offsets_32.c | 5 -- arch/x86/kernel/asm-offsets_64.c | 1 + arch/x86/kernel/cpu/common.c | 133 + arch/x86/kernel/doublefault.c | 36 arch/x86/kernel/dumpstack.c| 42 ++--- arch/x86/kernel/dumpstack_32.c | 6 ++ arch/x86/kernel/dumpstack_64.c | 6 ++ arch/x86/kernel/irq.c | 12 --- arch/x86/kernel/irq_64.c | 4 +- arch/x86/kernel/process.c | 13 ++- arch/x86/kernel/process_64.c | 1 + arch/x86/kernel/traps.c| 27 +++--- arch/x86/kernel/vmlinux.lds.S | 10 +++ arch/x86/mm/kasan_init_64.c| 13 ++- arch/x86/power/cpu.c | 16 ++-- arch/x86/xen/mmu_pv.c | 2 +- 27 files changed, 473 insertions(+), 170 deletions(-) -- 2.13.6
[PATCH v3 19/19] x86/entry: Clean up SYSENTER_stack code
The existing code was a mess, mainly because C arrays are nasty.
Turn SYSENTER_stack into a struct, add a helper to find it, and do
all the obvious cleanups this enables.
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_32.S| 4 ++--
arch/x86/entry/entry_64.S| 2 +-
arch/x86/include/asm/fixmap.h| 5 +
arch/x86/include/asm/processor.h | 6 +-
arch/x86/kernel/asm-offsets.c| 6 ++
arch/x86/kernel/cpu/common.c | 14 +++---
arch/x86/kernel/dumpstack.c | 7 +++
7 files changed, 21 insertions(+), 23 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index 0ab316c46806..3629bcbf85a2 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -942,7 +942,7 @@ ENTRY(debug)
/* Are we currently on the SYSENTER stack? */
movlPER_CPU_VAR(cpu_entry_area), %ecx
- addl$CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack +
SIZEOF_SYSENTER_stack, %ecx
+ addl$CPU_ENTRY_AREA_tss + TSS_STRUCT_SYSENTER_stack +
SIZEOF_SYSENTER_stack, %ecx
subl%eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
cmpl$SIZEOF_SYSENTER_stack, %ecx
jb .Ldebug_from_sysenter_stack
@@ -986,7 +986,7 @@ ENTRY(nmi)
/* Are we currently on the SYSENTER stack? */
movlPER_CPU_VAR(cpu_entry_area), %ecx
- addl$CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack +
SIZEOF_SYSENTER_stack, %ecx
+ addl$CPU_ENTRY_AREA_tss + TSS_STRUCT_SYSENTER_stack +
SIZEOF_SYSENTER_stack, %ecx
subl%eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
cmpl$SIZEOF_SYSENTER_stack, %ecx
jb .Lnmi_from_sysenter_stack
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 0cde243b7542..34e3110b0876 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -158,7 +158,7 @@ END(native_usergs_sysret64)
_entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
/* The top word of the SYSENTER stack is hot and is usable as scratch space. */
-#define RSP_SCRATCH CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack + \
+#define RSP_SCRATCH CPU_ENTRY_AREA_tss + TSS_STRUCT_SYSENTER_stack + \
SIZEOF_SYSENTER_stack - 8 + CPU_ENTRY_AREA
ENTRY(entry_SYSCALL_64_trampoline)
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 15cf010225c9..ceb04ab0a642 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -234,5 +234,10 @@ static inline struct cpu_entry_area
*get_cpu_entry_area(int cpu)
return (struct cpu_entry_area
*)__fix_to_virt(__get_cpu_entry_area_page_index(cpu, 0));
}
+static inline struct SYSENTER_stack *cpu_SYSENTER_stack(int cpu)
+{
+ return &get_cpu_entry_area((cpu))->tss.SYSENTER_stack;
+}
+
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_X86_FIXMAP_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 7743aedb82ea..54f3ee3bc8a0 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -332,12 +332,16 @@ struct x86_hw_tss {
#define IO_BITMAP_OFFSET (offsetof(struct tss_struct, io_bitmap)
- offsetof(struct tss_struct, x86_tss))
#define INVALID_IO_BITMAP_OFFSET 0x8000
+struct SYSENTER_stack {
+ unsigned long words[64];
+};
+
struct tss_struct {
/*
* Space for the temporary SYSENTER stack, used for SYSENTER
* and the entry trampoline as well.
*/
- unsigned long SYSENTER_stack[64];
+ struct SYSENTER_stack SYSENTER_stack;
/*
* The fixed hardware portion. This must not cross a page boundary
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index 61b1af88ac07..46c0995344aa 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -94,10 +94,8 @@ void common(void) {
BLANK();
DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
- /* Offset from cpu_tss to SYSENTER_stack */
- OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
- /* Size of SYSENTER_stack */
- DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct
*)0)->SYSENTER_stack));
+ OFFSET(TSS_STRUCT_SYSENTER_stack, tss_struct, SYSENTER_stack);
+ DEFINE(SIZEOF_SYSENTER_stack, sizeof(struct SYSENTER_stack));
/* Layout info for cpu_entry_area */
OFFSET(CPU_ENTRY_AREA_tss, cpu_entry_area, tss);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6b949e6ea0f9..f9c7e6852874 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1332,12 +1332,7 @@ void enable_sep_cpu(void)
tss->x86_tss.ss1 = __KERNEL_CS;
wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
-
- wrmsr(MSR_IA32_SYSENTER_ESP,
- (unsigned long)&get_cpu_entry_area(cpu)->tss +
- offsetofend(struct tss_struct,
[PATCH v3 04/19] x86/fixmap: Generalize the GDT fixmap mechanism
Currently, the GDT is an ad-hoc array of pages, one per CPU, in the
fixmap. Generalize it to be an array of a new struct cpu_entry_area
so that we can cleanly add new things to it.
Reviewed-by: Thomas Gleixner
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/desc.h | 9 +
arch/x86/include/asm/fixmap.h | 34 --
arch/x86/kernel/cpu/common.c | 14 +++---
arch/x86/xen/mmu_pv.c | 2 +-
4 files changed, 41 insertions(+), 18 deletions(-)
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index 95cd95eb7285..194ffab00ebe 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -60,17 +60,10 @@ static inline struct desc_struct *get_current_gdt_rw(void)
return this_cpu_ptr(&gdt_page)->gdt;
}
-/* Get the fixmap index for a specific processor */
-static inline unsigned int get_cpu_gdt_ro_index(int cpu)
-{
- return FIX_GDT_REMAP_END - cpu;
-}
-
/* Provide the fixmap address of the remapped GDT */
static inline struct desc_struct *get_cpu_gdt_ro(int cpu)
{
- unsigned int idx = get_cpu_gdt_ro_index(cpu);
- return (struct desc_struct *)__fix_to_virt(idx);
+ return (struct desc_struct *)&get_cpu_entry_area(cpu)->gdt;
}
/* Provide the current read-only GDT */
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index dcd9fb55e679..0f4c92f02968 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -44,6 +44,16 @@ extern unsigned long __FIXADDR_TOP;
PAGE_SIZE)
#endif
+/*
+ * cpu_entry_area is a percpu region in the fixmap that contains things
+ * needed by the CPU and early entry/exit code. Real types aren't used
+ * for all fields here to avoid circular header dependencies.
+ */
+struct cpu_entry_area {
+ char gdt[PAGE_SIZE];
+};
+
+#define CPU_ENTRY_AREA_PAGES (sizeof(struct cpu_entry_area) / PAGE_SIZE)
/*
* Here we define all the compile-time 'special' virtual
@@ -101,8 +111,8 @@ enum fixed_addresses {
FIX_LNW_VRTC,
#endif
/* Fixmap entries to remap the GDTs, one per processor. */
- FIX_GDT_REMAP_BEGIN,
- FIX_GDT_REMAP_END = FIX_GDT_REMAP_BEGIN + NR_CPUS - 1,
+ FIX_CPU_ENTRY_AREA_TOP,
+ FIX_CPU_ENTRY_AREA_BOTTOM = FIX_CPU_ENTRY_AREA_TOP +
(CPU_ENTRY_AREA_PAGES * NR_CPUS) - 1,
__end_of_permanent_fixed_addresses,
@@ -185,5 +195,25 @@ void __init *early_memremap_decrypted_wp(resource_size_t
phys_addr,
void __early_set_fixmap(enum fixed_addresses idx,
phys_addr_t phys, pgprot_t flags);
+static inline unsigned int __get_cpu_entry_area_page_index(int cpu, int page)
+{
+ BUILD_BUG_ON(sizeof(struct cpu_entry_area) % PAGE_SIZE != 0);
+
+ return FIX_CPU_ENTRY_AREA_BOTTOM - cpu*CPU_ENTRY_AREA_PAGES - page;
+}
+
+#define __get_cpu_entry_area_offset_index(cpu, offset) ({ \
+ BUILD_BUG_ON(offset % PAGE_SIZE != 0); \
+ __get_cpu_entry_area_page_index(cpu, offset / PAGE_SIZE); \
+ })
+
+#define get_cpu_entry_area_index(cpu, field) \
+ __get_cpu_entry_area_offset_index((cpu), offsetof(struct
cpu_entry_area, field))
+
+static inline struct cpu_entry_area *get_cpu_entry_area(int cpu)
+{
+ return (struct cpu_entry_area
*)__fix_to_virt(__get_cpu_entry_area_page_index(cpu, 0));
+}
+
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_X86_FIXMAP_H */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index ccb5f66c4e5b..c0fb3eb37ee0 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -490,12 +490,12 @@ void load_percpu_segment(int cpu)
load_stack_canary_segment();
}
-/* Setup the fixmap mapping only once per-processor */
-static inline void setup_fixmap_gdt(int cpu)
+/* Setup the fixmap mappings only once per-processor */
+static inline void setup_cpu_entry_area(int cpu)
{
#ifdef CONFIG_X86_64
/* On 64-bit systems, we use a read-only fixmap GDT. */
- pgprot_t prot = PAGE_KERNEL_RO;
+ pgprot_t gdt_prot = PAGE_KERNEL_RO;
#else
/*
* On native 32-bit systems, the GDT cannot be read-only because
@@ -506,11 +506,11 @@ static inline void setup_fixmap_gdt(int cpu)
* On Xen PV, the GDT must be read-only because the hypervisor requires
* it.
*/
- pgprot_t prot = boot_cpu_has(X86_FEATURE_XENPV) ?
+ pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
PAGE_KERNEL_RO : PAGE_KERNEL;
#endif
- __set_fixmap(get_cpu_gdt_ro_index(cpu), get_cpu_gdt_paddr(cpu), prot);
+ __set_fixmap(get_cpu_entry_area_index(cpu, gdt),
get_cpu_gdt_paddr(cpu), gdt_prot);
}
/* Load the original GDT from the per-cpu structure */
@@ -1614,7 +1614,7 @@ void cpu_init(void)
if (is_uv_system())
uv_cpu_init();
- setup_fixmap_gdt(cpu);
+ setup_cpu_entry_ar
[PATCH v3 06/19] x86/asm: Fix assumptions that the HW TSS is at the beginning of cpu_tss
A future patch will move SYSENTER_stack to the beginning of cpu_tss
to help detect overflow. Before this can happen, fix several code
paths that hardcode assumptions about the old layout
Reviewed-by: Borislav Petkov
Reviewed-by: Thomas Gleixner
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/desc.h | 2 +-
arch/x86/include/asm/processor.h | 4 ++--
arch/x86/kernel/cpu/common.c | 8
arch/x86/kernel/doublefault.c| 36 +---
arch/x86/power/cpu.c | 13 +++--
5 files changed, 31 insertions(+), 32 deletions(-)
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index 194ffab00ebe..aab4fe9f49f8 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -178,7 +178,7 @@ static inline void set_tssldt_descriptor(void *d, unsigned
long addr,
#endif
}
-static inline void __set_tss_desc(unsigned cpu, unsigned int entry, void *addr)
+static inline void __set_tss_desc(unsigned cpu, unsigned int entry, struct
x86_hw_tss *addr)
{
struct desc_struct *d = get_cpu_gdt_rw(cpu);
tss_desc tss;
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 504a3bb4d5f0..c24456429c7d 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -163,7 +163,7 @@ enum cpuid_regs_idx {
extern struct cpuinfo_x86 boot_cpu_data;
extern struct cpuinfo_x86 new_cpu_data;
-extern struct tss_struct doublefault_tss;
+extern struct x86_hw_tss doublefault_tss;
extern __u32 cpu_caps_cleared[NCAPINTS];
extern __u32 cpu_caps_set[NCAPINTS];
@@ -323,7 +323,7 @@ struct x86_hw_tss {
#define IO_BITMAP_BITS 65536
#define IO_BITMAP_BYTES(IO_BITMAP_BITS/8)
#define IO_BITMAP_LONGS(IO_BITMAP_BYTES/sizeof(long))
-#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
+#define IO_BITMAP_OFFSET (offsetof(struct tss_struct, io_bitmap)
- offsetof(struct tss_struct, x86_tss))
#define INVALID_IO_BITMAP_OFFSET 0x8000
struct tss_struct {
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c0fb3eb37ee0..62cdc10a7d94 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1582,7 +1582,7 @@ void cpu_init(void)
}
}
- t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
+ t->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
/*
* <= is required because the CPU will access up to
@@ -1601,7 +1601,7 @@ void cpu_init(void)
* Initialize the TSS. Don't bother initializing sp0, as the initial
* task never enters user mode.
*/
- set_tss_desc(cpu, t);
+ set_tss_desc(cpu, &t->x86_tss);
load_TR_desc();
load_mm_ldt(&init_mm);
@@ -1659,12 +1659,12 @@ void cpu_init(void)
* Initialize the TSS. Don't bother initializing sp0, as the initial
* task never enters user mode.
*/
- set_tss_desc(cpu, t);
+ set_tss_desc(cpu, &t->x86_tss);
load_TR_desc();
load_mm_ldt(&init_mm);
- t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
+ t->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
#ifdef CONFIG_DOUBLEFAULT
/* Set up doublefault TSS pointer in the GDT */
diff --git a/arch/x86/kernel/doublefault.c b/arch/x86/kernel/doublefault.c
index 0e662c55ae90..0b8cedb20d6d 100644
--- a/arch/x86/kernel/doublefault.c
+++ b/arch/x86/kernel/doublefault.c
@@ -50,25 +50,23 @@ static void doublefault_fn(void)
cpu_relax();
}
-struct tss_struct doublefault_tss __cacheline_aligned = {
- .x86_tss = {
- .sp0= STACK_START,
- .ss0= __KERNEL_DS,
- .ldt= 0,
- .io_bitmap_base = INVALID_IO_BITMAP_OFFSET,
-
- .ip = (unsigned long) doublefault_fn,
- /* 0x2 bit is always set */
- .flags = X86_EFLAGS_SF | 0x2,
- .sp = STACK_START,
- .es = __USER_DS,
- .cs = __KERNEL_CS,
- .ss = __KERNEL_DS,
- .ds = __USER_DS,
- .fs = __KERNEL_PERCPU,
-
- .__cr3 = __pa_nodebug(swapper_pg_dir),
- }
+struct x86_hw_tss doublefault_tss __cacheline_aligned = {
+ .sp0= STACK_START,
+ .ss0= __KERNEL_DS,
+ .ldt= 0,
+ .io_bitmap_base = INVALID_IO_BITMAP_OFFSET,
+
+ .ip = (unsigned long) doublefault_fn,
+ /* 0x2 bit is always set */
+ .flags = X86_EFLAGS_SF | 0x2,
+ .sp = STACK_START,
+ .es = __USER_DS,
+ .cs =
Re: XArray documentation
On Nov 23, 2017, at 6:16 PM, Matthew Wilcox wrote: > > Here's the current state of the documentation for the XArray. Suggestions > for improvement gratefully received. > > == > XArray > == > > Overview > > > The XArray is an array of ULONG_MAX entries. Each entry can be either > a pointer, or an encoded value between 0 and LONG_MAX. It is efficient > when the indices used are densely clustered; hashing the object and > using the hash as the index will not perform well. A freshly-initialised > XArray contains a NULL pointer at every index. There is no difference > between an entry which has never been stored to and an entry which has most > recently had NULL stored to it. > > Pointers to be stored in the XArray must have the bottom two bits clear > (ie must point to something which is 4-byte aligned). This includes all > objects allocated by calling :c:func:`kmalloc` and :c:func:`alloc_page`, > but you cannot store pointers to arbitrary offsets within an object. > The XArray does not support storing :c:func:`IS_ERR` pointers; some > conflict with data values and others conflict with entries the XArray > uses for its own purposes. If you need to store special values which > cannot be confused with real kernel pointers, the values 4, 8, ... 4092 > are available. Thought - if storing error values into the XArray in addition to regular pointers is important for some use case, it would be easy to make "ERR_PTR_XA()", "PTR_ERR_XA()", and "IS_ERR_XA()" macros that just shift the error values up and down by two bits to avoid the conflict. That would still allow error values up (down) to -1023 to be stored without any chance of a pointer conflict, which should be enough. > Each non-NULL entry in the array has three bits associated with it called > tags. Each tag may be flipped on or off independently of the others. > You can search for entries with a given tag set. How can it be 3 tag bits, if the pointers only need to be 4-byte aligned? > An unusual feature of the XArray is the ability to tie multiple entries > together. Once stored to, looking up any entry in the range will give > the same result as looking up any other entry in the range. Setting a > tag on one entry will set it on all of them. Multiple entries can be > explicitly split into smaller entries, or storing NULL into any entry > will cause the XArray to forget about the tie. > > Normal API > == > > Start by initialising an XArray, either with :c:func:`DEFINE_XARRAY` > for statically allocated XArrays or :c:func:`xa_init` for dynamically > allocated ones. > > You can then set entries using :c:func:`xa_store` and get entries using > :c:func:`xa_load`. xa_store will overwrite a non-NULL entry with the > new entry. It returns the previous entry stored at that index. You can > conditionally replace an entry at an index by using :c:func:`xa_cmpxchg`. > Like :c:func:`cmpxchg`, it will only succeed if the entry at that > index has the 'old' value. It also returns the entry which was at > that index; if it returns the same entry which was passed as 'old', > then :c:func:`xa_cmpxchg` succeeded. > > If you want to store a pointer, you can do that directly. If you want > to store an integer between 0 and LONG_MAX, you must first encode it > using :c:func:`xa_mk_value`. When you retrieve an entry from the XArray, > you can check whether it is a data value by calling :c:func:`xa_is_value`, > and convert it back to an integer by calling :c:func:`xa_to_value`. > > You can enquire whether a tag is set on an entry by using > :c:func:`xa_get_tag`. If the entry is not NULL, you can set a tag on > it by using :c:func:`xa_set_tag` and remove the tag from an entry by > calling :c:func:`xa_clear_tag`. You can ask whether any entry in the > XArray has a particular tag set by calling :c:func:`xa_tagged`. > > You can copy entries out of the XArray into a plain array by > calling :c:func:`xa_get_entries` and copy tagged entries by calling > :c:func:`xa_get_tagged`. Or you can iterate over the non-NULL entries > in place in the XArray by calling :c:func:`xa_for_each`. You may prefer > to use :c:func:`xa_find` or :c:func:`xa_next` to move to the next present > entry in the XArray. > > Finally, you can remove all entries from an XArray by calling > :c:func:`xa_destroy`. If the XArray entries are pointers, you may wish > to free the entries first. You can do this by iterating over all non-NULL > entries in ... the XArray using xa_for_each() ? > When using the Normal API, you do not have to worry about locking. > The XArray uses RCU and an irq-safe spinlock to synchronise access to > the XArray: > > No lock needed: > * :c:func:`xa_empty` > * :c:func:`xa_tagged` > > Takes RCU read lock: > * :c:func:`xa_load` > * :c:func:`xa_for_each` > * :c:func:`xa_find` > * :c:func:`xa_next` > * :c:func:`xa_get_entries` > * :c:func:`xa_get_tagged` > * :c:func:`xa_get_tag` > > Takes xa_lock internally: > * :c:func:`xa_store` > * :
Re: [PATCH v8 4/5] crash: export paddr_vmcoreinfo_note()
On Thu, Nov 23, 2017 at 06:36:57AM -0800, Christoph Hellwig wrote: > On Thu, Nov 23, 2017 at 03:02:05PM +0100, Marc-André Lureau wrote: > > The following patch is going to use the symbol from the fw_cfg module, > > to call the function and write the note location details in the > > vmcoreinfo entry, so qemu can produce dumps with the vmcoreinfo note. > > Sounds like fw_cfg should be moved to be built in only instead of > exporting such a symbol address. Point is, all fw cfg does is export it on to the hypervisor, so it will have to be supported forever. If it's safe to export it to the hypervisor then for sure it's also safe to export it to modules. -- MST
Re: [PATCH v2 10/18] x86/asm: Remap the TSS into the cpu entry area
On Thu, Nov 23, 2017 at 6:40 PM, Andy Lutomirski wrote:
> On Thu, Nov 23, 2017 at 12:37 PM, Borislav Petkov wrote:
>> On Thu, Nov 23, 2017 at 12:15:14PM -0800, Andy Lutomirski wrote:
>>> >> diff --git a/arch/x86/kernel/asm-offsets.c
>>> >> b/arch/x86/kernel/asm-offsets.c
>>> >> index b275863128eb..55858b277cf6 100644
>>> >> --- a/arch/x86/kernel/asm-offsets.c
>>> >> +++ b/arch/x86/kernel/asm-offsets.c
>>> >> @@ -98,4 +98,7 @@ void common(void) {
>>> >> OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
>>> >> /* Size of SYSENTER_stack */
>>> >> DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct
>>> >> *)0)->SYSENTER_stack));
>>> >> +
>>> >> + /* Layout info for cpu_entry_area */
>>> >> + OFFSET(CPU_ENTRY_AREA_tss, cpu_entry_area, tss);
>>> >
>>> > The naming convention of those looks really strange. The beginning is in
>>> > all caps and then small. Can we choose a convention pls.
>>>
>>> This is actually consistent with the rest of the offsets. The
>>> convention is STRUCT_field.
>>
>> Except CPU_TSS_SYSENTER_stack. TSS_STRUCT_SYSENTER_stack I guess.
>
> Hmm, that name predates this series. I'll clean it up in a new patch
> at the end of the series.
I'm also going to leave the end-of-line comment alone for now. We can
maybe make that change to a bunch of comments later on.
Re: [PATCH v2 13/18] x86/asm/64: Use a percpu trampoline stack for IDT entries
On Thu, Nov 23, 2017 at 3:44 PM, Thomas Gleixner wrote: > On Tue, 21 Nov 2017, Andy Lutomirski wrote: >> The asm isn't exactly beautiful, > > Delightful euphemism :) > >> but I think that fully refactoring >> it can wait. > >> @@ -560,6 +560,14 @@ END(irq_entries_start) >> .macro interrupt func >> cld >> ALLOC_PT_GPREGS_ON_STACK >> + >> + testb $3, CS(%rsp) >> + jz 1f >> + SWAPGS >> + callswitch_to_thread_stack >> + SWAPGS > > I'm surely missing something subtle, but the register saving does really > not care on which GS it is. This swapgs orgy looks odd. You're mostly right. switch_to_thread_stack uses PER_CPU_VAR(cpu_current_top_of_stack), which definitely cares about which GS it's on, but there's still no legitimate reason for the SWAPGS orgy. I'll fix it. > >> +1: >> + >> SAVE_C_REGS >> SAVE_EXTRA_REGS >> ENCODE_FRAME_POINTER >> @@ -827,6 +835,33 @@ apicinterrupt IRQ_WORK_VECTOR >> irq_work_interrupt smp_irq_work_interrupt >> */ >> #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) >> >> +/* >> + * Switch to the thread stack. This is called with the IRET frame and >> + * orig_ax in pt_regs and the rest of pt_regs allocated, but with all GPRs >> + * in the CPU registers. > > That took several attempts to grok why you left ALLOC_PT_GPRES_ON_STACK in > place in the interrupts macro above. > > In theory it would be sufficient to push %rdi on the entry stack and > operate from there, but it spares only the 'addq %rsp'. Not worth the > trouble of dealing with different register offsets. Hrm. There wasn't actually a good reason for that. I got rid of it.
RE: [PATCH 1/3] dt-bindings: Add vendor prefix for Allo.com
Acked-by : sudeep -Original Message- From: Andreas Färber [mailto:afaer...@suse.de] Sent: Tuesday, November 14, 2017 11:31 PM To: linux-arm-ker...@lists.infradead.org Cc: Thomas Liau ; Jeff Chen ; 张东风 ; 刘炜 ; 张天益 ; 梅利 ; Ioan B ; Sudeep Kumar ; linux-kernel@vger.kernel.org; Andreas Färber ; Rob Herring ; Mark Rutland ; devicet...@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: Add vendor prefix for Allo.com ALLO is a Canadian-Indian manufacturer of telecommunications hardware. Cc: Ioan B. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 0994bdd82cd3..9bce76f3118d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -15,6 +15,7 @@ adi Analog Devices, Inc. advantech Advantech Corporation aeroflexgaislerAeroflex Gaisler AB al Annapurna Labs +allo Allo.com allwinner Allwinner Technology Co., Ltd. alphascale AlphaScale Integrated Circuits Systems, Inc. altr Altera Corp. -- 2.13.6
RE: [PATCH 2/3] dt-bindings: arm: actions: Add Sparky
Acked-by : sudeep -Original Message- From: Andreas Färber [mailto:afaer...@suse.de] Sent: Tuesday, November 14, 2017 11:31 PM To: linux-arm-ker...@lists.infradead.org Cc: Thomas Liau ; Jeff Chen ; 张东风 ; 刘炜 ; 张天益 ; 梅利 ; Ioan B ; Sudeep Kumar ; linux-kernel@vger.kernel.org; Andreas Färber ; Rob Herring ; Mark Rutland ; devicet...@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: arm: actions: Add Sparky Define a binding for Allo.com Sparky SBC. Cc: Ioan B. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/arm/actions.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/actions.txt b/Documentation/devicetree/bindings/arm/actions.txt index 544a8855fad5..d54f33c4e0da 100644 --- a/Documentation/devicetree/bindings/arm/actions.txt +++ b/Documentation/devicetree/bindings/arm/actions.txt @@ -21,6 +21,7 @@ Boards: Root node property compatible must contain, depending on board: + - Allo.com Sparky: "allo,sparky" - Cubietech CubieBoard6: "cubietech,cubieboard6" - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar" -- 2.13.6
[git pull] drm for 4.15 part 2 (updated)
Hi Linus, This is an incremental pull on top of yesterdays, it contains all of that, Summary from first pull: This is just some bits and pieces for the second half of the merge window, 1. Remove the MSM dt-bindings file Rob managed to push in the previous pull. 2. Add a property/edid quirk to denote HMD devices, I had these hanging around for a few weeks and Keith had done some work on them, they are fairly self contained and small, and only affect people using HTC Vive VR headsets so far. 3. amdgpu, tegra, tilcdc, fsl fixes 4. some imx-drm cleanups I missed, these seemed pretty small, and no reason to hold off. Extras: TTM regression fix for running on bochs vga (Fedora reported) Some i915 fixes headed for stable One vc4 fix One EDID fix One new uapi fix. Dave. The following changes since commit f150891fd9878ef0d9197c4e8451ce67c3bdd014: Merge tag 'exynos-drm-next-for-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next (2017-11-14 14:12:43 +1000) are available in the git repository at: git://people.freedesktop.org/~airlied/linux tags/drm-for-v4.15-part2-fixes for you to fetch changes up to c209101fc1c91a318422733a3721ff6a9ff7899f: Merge tag 'drm-misc-fixes-2017-11-20' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2017-11-24 11:33:29 +1000) previous part 2 tag + ttm regression fix, i915,vc4,core,uapi fixes Alex Deucher (2): Revert "drm/radeon: dont switch vt on suspend" drm/amdgpu: don't skip attributes when powerplay is enabled Chris Wilson (2): drm/i915: Clear breadcrumb node when cancelling signaling drm/i915: Mark the userptr invalidate workqueue as WQ_MEM_RECLAIM Christian König (2): drm/amdgpu: make AMDGPU_VA_RESERVED_SIZE 64bit drm/amdgpu: set f_mapping on exported DMA-bufs Cihangir Akturk (1): drm/imx: switch to drm_*_get(), drm_*_put() helpers Colin Ian King (2): drm/amd/powerplay: fix copy-n-paste error on vddci_buf index drm/i915/gvt: ensure -ve return value is handled correctly Dave Airlie (13): Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next Merge tag 'drm-fsl-dcu-fixes-for-v4.15' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next Merge tag 'drm/tegra/for-4.15-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux into drm-next Merge tag 'imx-drm-next-2017-10-18' of git://git.pengutronix.de/git/pza/linux into drm-next Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next Merge tag 'tilcdc-4.15-fixes' of https://github.com/jsarha/linux into drm-next drm: add connector info/property for non-desktop displays [v2] drm/fb: add support for not enabling fbcon on non-desktop displays [v2] drm/edid: quirk HTC vive headset as non-desktop. [v2] drm/ttm: don't attempt to use hugepages if dma32 requested (v2) Merge tag 'drm-misc-next-fixes-2017-11-23' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Merge tag 'drm-intel-next-fixes-2017-11-23' of git://anongit.freedesktop.org/drm/drm-intel into drm-next Merge tag 'drm-misc-fixes-2017-11-20' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Emily Deng (1): drm/amdgpu: Fix null pointer issue in amdgpu_cs_wait_any_fence Eric Huang (1): drm/amd/powerplay: fix unfreeze level smc message for smu7 Fabio Estevam (1): gpu: ipu-v3: ipu-dc: Remove unused 'di' variable Hans de Goede (2): drm/i915: Fix false-positive assert_rpm_wakelock_held in i915_pmic_bus_access_notifier v2 drm/i915: Re-register PMIC bus access notifier on runtime resume Jyri Sarha (1): drm/tilcdc: Remove obsolete "ti,tilcdc,slave" dts binding support Ken Wang (2): drm/amdgpu: Remove check which is not valid for certain VBIOS drm/amdgpu: Add common golden settings for GFX9 Laurent Pinchart (1): drm/fsl-dcu: Don't set connector DPMS property Lucas Stach (1): drm/imx: parallel-display: use correct connector enum Maarten Lankhorst (1): drm/vblank: Pass crtc_id to page_flip_ioctl. Marco Franchi (1): dt-bindings: fsl-imx-drm: Remove incorrect "@di0" usage Monk Liu (2): drm/amdgpu:fix memleak in takedown drm/amdgpu:fix memleak Nicolai Hähnle (1): drm/amdgpu/gfx9: implement wave VGPR reading Rex Zhu (2): drm/amd/pp: fix dpm randomly failed on Vega10 drm/amd/pp: fix typecast error in powerplay. Rob Clark (1): dt-bindings: remove file that was added accidentally Roger He (2): drm/amd/amdgpu: if visible VRAM allocation fail, fall back to invisible try again drm/amd/amdgpu: fix over-bound accessing in amdgpu_cs_wait_any_fence Stefan Agner (2): drm/fsl-dcu: avoid disabling pixel clock twice on suspend drm/fsl-dcu: enable IRQ before dr
Re: [GIT PULL] Second batch of KVM changes for Linux 4.15
On Mon, Nov 20, 2017 at 2:06 PM, Paolo Bonzini wrote: > > I am not including the host side of AMD SEV, because it wouldn't have gotten > enough time in linux-next even with a "regular-length" merge window. It > will be in 4.16. So I pulled it, but then checked, None of this was in linux-next 20171117 either, So I unpulled it, Linus
Re: [PATCH] r8152: disable rx checksum offload on Dell TB dock
> On 23 Nov 2017, at 5:24 PM, Greg KH wrote: > > On Thu, Nov 23, 2017 at 04:53:41PM +0800, Kai Heng Feng wrote: >> >> What I want to do here is to finding this connection: >> Realtek r8153 <-> SMSC hub (USD ID: 0424:5537) <-> >> ASMedia XHCI controller (PCI ID: 1b21:1142). >> >> Is there a safer way to do this? > > Nope! You can't do that at all from within a USB driver, sorry. As you > really should not care at all :) Got it :) The r8153 in Dell TB dock has version information, RTL_VER_05. We can use it to check for workaround, but many working RTL_VER_05 devices will also be affected. Do you think it’s an acceptable compromise? >> I have a r8153 <-> USB 3.0 dongle which work just fine. I can’t find any >> information to differentiate them. Hence I want to use the connection to >> identify if r8153 is on a Dell TB dock. > > Are you sure there is nothing different in the version or release number > of the device? 'lsusb -v' shows the exact same information for both > devices? Yes. I attached `lsusb -v` for r8153 on Dell TB dock, on a RJ45 <-> USB 3.0 dongle, and on a RJ45 <-> USB Type-C dongle. >> Yes. From what I know, ASMedia is working on it, but not sure how long it >> will take. In the meantime, I’d like to workaround this issue for the users. > > Again, it's a host controller bug, it should be fixed there, don't try > to paper over the real issue in different individual drivers. > > I think I've seen various patches on the linux-usb list for this > controller already, have you tried them? Yes. These patches are all in mainline Linux now. >> Actually no. >> I just plugged r8153 dongle into the same hub, surprisingly the issue >> doesn’t happen in this scenario. > > Then something seems to be wrong with the device itself, as that would > be the same exact electrical/logical path, right? I have no idea why externally plugged one doesn’t have this issue. Maybe it’s related how it’s wired inside the Dell TB dock... Kai-Heng lsusb-a Description: Binary data lsusb-c Description: Binary data lsusb-dock Description: Binary data > thanks, > > greg k-h
Re: [GIT PULL] UBI/UBIFS updates for 4.15-rc1
On Thu, Nov 23, 2017 at 4:37 AM, Richard Weinberger wrote: > > git://git.infradead.org/linux-ubifs.git tags/upstream-4.15-rc1 Similarly to the arch/um case, none of this seems to have been in linux-next, and is sent late in the merge window, so I'm skipping it. Linus
Re: [GIT PULL] UML updates for 4.15-rc1
On Thu, Nov 23, 2017 at 4:36 AM, Richard Weinberger wrote: > > git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml.git for-linus-4.15-rc1 I asked people to send me their pull requests early before I was traveling, and this second week I'm only taking fixes, or things that were in linux-next. I _should_ do that every release, just to make sure people actually do put things in linux-next, but this release I'm doing it because I want to know it's independently gone through the build tests etc and isn't some random last-minute stuff. As far as I can tell, none of this was in linux-next 20171117. Linus
Re: [PATCH 0/3] scsi: arcmsr: add driver module parameter - msi_enable, msix_enable
On Thu, 2017-11-23 at 04:57 -0800, Christoph Hellwig wrote: > On Thu, Nov 23, 2017 at 09:22:03AM +0800, Ching Huang wrote: > > From: Ching Huang > > > > Hi all, > > > > The following patches apply to Martin's 4.16/scsi-queue. > > > > Patch 1: Add module parameter msi_enable to has a chance to disable msi > > interrupt if it does not work properly. > > > > Patch 2: Add module parameter msix_enable to has a chance to disable msix > > interrupt if it does not work properly. > > Why would it not work properly? This patch is apply to https://git.kernel.org/pub/scm/linux/kernel/git/mkp/scsi.git/tree/?h=4.16/scsi-queue
Re: [PATCH 2/3] scsi: arcmsr: Add driver module parameter msix_enable
On Thu, 2017-11-23 at 14:43 +0300, Dan Carpenter wrote: > On Thu, Nov 23, 2017 at 09:31:14AM +0800, Ching Huang wrote: > > @@ -829,12 +833,15 @@ arcmsr_request_irq(struct pci_dev *pdev, > > unsigned long flags; > > int nvec, i; > > > > + if (msix_enable == 0) > > + goto msi_int0; > > I feel like this goto is not very beautiful, but I can't actually apply > this patch? Which tree is this written against? I'm using linux-next. > This patch is apply to https://git.kernel.org/pub/scm/linux/kernel/git/mkp/scsi.git/tree/?h=4.16/scsi-queue > regards, > dan carpenter > >
Re: [PATCH 1/3] lockdep: Apply crossrelease to PG_locked locks
On Thu, Nov 16, 2017 at 02:07:46PM +0100, Michal Hocko wrote: > On Thu 16-11-17 21:48:05, Byungchul Park wrote: > > On 11/16/2017 9:02 PM, Michal Hocko wrote: > > > for each struct page. So you are doubling the size. Who is going to > > > enable this config option? You are moving this to page_ext in a later > > > patch which is a good step but it doesn't go far enough because this > > > still consumes those resources. Is there any problem to make this > > > kernel command line controllable? Something we do for page_owner for > > > example? > > > > Sure. I will add it. > > > > > Also it would be really great if you could give us some measures about > > > the runtime overhead. I do not expect it to be very large but this is > > > > The major overhead would come from the amount of additional memory > > consumption for 'lockdep_map's. > > yes > > > Do you want me to measure the overhead by the additional memory > > consumption? > > > > Or do you expect another overhead? > > I would be also interested how much impact this has on performance. I do > not expect it would be too large but having some numbers for cache cold > parallel kbuild or other heavy page lock workloads. Hello Michal, I measured 'cache cold parallel kbuild' on my qemu machine. The result varies much so I cannot confirm, but I think there's no meaningful difference between before and after applying crossrelease to page locks. Actually, I expect little overhead in lock_page() and unlock_page() even after applying crossreleas to page locks, but only expect a bit overhead by additional memory consumption for 'lockdep_map's per page. I run the following instructions within "QEMU x86_64 4GB memory 4 cpus": make clean echo 3 > drop_caches time make -j4 The results are: # w/o page lock tracking At the 1st try, real 5m28.105s user 17m52.716s sys 3m8.871s At the 2nd try, real 5m27.023s user 17m50.134s sys 3m9.289s At the 3rd try, real 5m22.837s user 17m34.514s sys 3m8.097s # w/ page lock tracking At the 1st try, real 5m18.158s user 17m18.200s sys 3m8.639s At the 2nd try, real 5m19.329s user 17m19.982s sys 3m8.345s At the 3rd try, real 5m19.626s user 17m21.363s sys 3m9.869s I think thers's no meaningful difference on my small machine. -- Thanks, Byungchul
[tip:WIP.x86/mm 37/50] arch/x86/events/intel/ds.c:296:2: note: in expansion of macro 'if'
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/mm
head: 7d2da250f83856bbf697d58a3c10c5673e8146bc
commit: 93e8b1bed0d21ad5a5bf0e1151a9163a72f89072 [37/50] x86/mm/kaiser: Map
virtually-addressed performance monitoring buffers
config: i386-randconfig-x019-201747 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
git checkout 93e8b1bed0d21ad5a5bf0e1151a9163a72f89072
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
In file included from arch/x86/include/asm/bitops.h:16:0,
from include/linux/bitops.h:38,
from arch/x86/events/intel/ds.c:2:
arch/x86/events/intel/ds.c: In function 'dsalloc':
arch/x86/events/intel/ds.c:296:6: error: implicit declaration of function
'kaiser_add_mapping' [-Werror=implicit-function-declaration]
if (kaiser_add_mapping(addr, size, __PAGE_KERNEL | _PAGE_GLOBAL) < 0) {
^
include/linux/compiler.h:58:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~~~
>> arch/x86/events/intel/ds.c:296:2: note: in expansion of macro 'if'
if (kaiser_add_mapping(addr, size, __PAGE_KERNEL | _PAGE_GLOBAL) < 0) {
^~
arch/x86/events/intel/ds.c: In function 'dsfree':
arch/x86/events/intel/ds.c:307:2: error: implicit declaration of function
'kaiser_remove_mapping' [-Werror=implicit-function-declaration]
kaiser_remove_mapping((unsigned long)buffer, size);
^
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:constant_test_bit
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:variable_test_bit
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls
Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32
Cyclomatic Complexity 1 include/linux/percpu-defs.h:__this_cpu_preempt_check
Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order
Cyclomatic Complexity 1 arch/x86/include/asm/paravirt.h:paravirt_read_msr
Cyclomatic Complexity 1 arch/x86/include/asm/paravirt.h:paravirt_write_msr
Cyclomatic Complexity 1 arch/x86/include/asm/paravirt.h:wrmsrl
Cyclomatic Complexity 1 arch/x86/include/asm/msr.h:wrmsr_on_cpu
Cyclomatic Complexity 3 arch/x86/include/asm/processor.h:get_debugctlmsr
Cyclomatic Complexity 3 arch/x86/include/asm/processor.h:update_debugctlmsr
Cyclomatic Complexity 1 include/linux/nodemask.h:node_state
Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_lock_acquire
Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_lock_release
Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_read_lock
Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_read_unlock
Cyclomatic Complexity 1 include/linux/gfp.h:__alloc_pages
Cyclomatic Complexity 2 include/linux/gfp.h:__alloc_pages_node
Cyclomatic Complexity 1 include/linux/slab.h:__kmalloc_node
Cyclomatic Complexity 1 include/linux/slab.h:kmalloc_node
Cyclomatic Complexity 1 include/linux/slab.h:kzalloc_node
Cyclomatic Complexity 1 include/linux/cpu.h:cpus_read_lock
Cyclomatic Complexity 1 include/linux/cpu.h:cpus_read_unlock
Cyclomatic Complexity 1 include/linux/cpu.h:get_online_cpus
Cyclomatic Complexity 1 include/linux/cpu.h:put_online_cpus
Cyclomatic Complexity 1 include/linux/perf_event.h:perf_sample_data_init
Cyclomatic Complexity 1 include/linux/perf_event.h:has_branch_stack
Cyclomatic Complexity 1 arch/x86/events/intel/../perf_event.h:kernel_ip
Cyclomatic Complexity 4 arch/x86/events/intel/../perf_event.h:set_linear_ip
Cyclomatic Complexity 1
arch/x86/events/intel/ds.c:intel_pmu_drain_pebs_buffer
Cyclomatic Complexity 3 arch/x86/events/intel/ds.c:pebs_needs_sched_cb
Cyclomatic Complexity 3 arch/x86/events/intel/ds.c:pebs_update_threshold
Cyclomatic Complexity 3 arch/x86/events/intel/ds.c:intel_hsw_weight
Cyclomatic Complexity 9 arch/x86/events/intel/ds.c:intel_hsw_transaction
Cyclomatic Complexity 14
arch/x86/events/intel/ds.c:get_next_pebs_record_by_bit
Cyclomatic Complexity 3 arch/x86/events/intel/ds.c:release_ds_buffer
Cyclomatic Complexity 7 arch/x86/events/intel/ds.c:load_latency_data
Cyclomatic Complexity 9 arch/x86/events/intel/ds.c:precise_datala_hsw
Cyclomatic Complexity 7 arch/x86/events/intel/ds.c:precise_store_data
Cyclomatic Complexity 69 arch/x86/events/intel/ds.c:dsfree
Cyclomatic Complexity 9 arch/x86/events/intel/ds.c:release_pebs_buffer
Cyclomatic Complexity 9 arch/x86/events/intel/ds.c:release_bts_buffer
Cyclomatic Complexity 1 arch/x86/events/intel/ds.c:alloc_ds_buffer
Cyclomatic Complexity 70 arch/x86/events/intel/ds.c:dsalloc
Cyclomatic Complexity 10 arch/x86/events/intel/ds.c:alloc_bts_buffer
Cyclomatic Complexity 8 arch/x86/events/intel/ds.c:alloc_pebs_buffer
Cyclomatic Complexity 6 arch/x86/events/intel/ds.c:pebs_update_state
Cyclomat
RE: [PATCH v2 2/4] platform/x86: intel_telemetry: Fix suspend stats
On Fri, November 24, 2017 at 2:55 AM, Andy Shevchenko
wrote:
> On Tue, Nov 21, 2017 at 4:36 PM, Souvik Kumar Chakravarty
> wrote:
> > Suspend stats are not reported consistently due to a limitation in the
> > PMC firmware. This limitation causes a delay in updating the s0ix
> > counters and residencies in the telemetry log upon s0ix exit. As a
> > consequence, reading these counters from the suspend-exit notifier may
> > result
> in zero read.
> >
> > This patch fixes this issue by cross-verifying the s0ix residencies
> > from the GCR TELEM registers in case the counters are not incremented
> > in the telemetry log after suspend.
> >
> > This fixes https://bugzilla.kernel.org/show_bug.cgi?id=197833
> >
> > We also remove unnecessary 'static' qualifiers from local variables.
> >
> > Reported-and-tested-by: Rajneesh Bhardwaj
> >
> > Signed-off-by: Souvik Kumar Chakravarty
> >
>
> > - static u32 suspend_shlw_ctr_exit, suspend_deep_ctr_exit;
> > - static u64 suspend_shlw_res_exit, suspend_deep_res_exit;
> > struct telemetry_debugfs_conf *conf = debugfs_conf;
> > + u32 suspend_shlw_ctr_exit, suspend_deep_ctr_exit;
> > + u64 suspend_shlw_res_exit, suspend_deep_res_exit;
> > int ret, index;
>
> > + if (suspend_shlw_ctr_exit == suspend_shlw_ctr_temp &&
> > + suspend_deep_ctr_exit == suspend_deep_ctr_temp) {
>
> kbuildbot is absolutely right. How this code is supposed to work? It's flaky.
suspend_shlw_ctr_exit & suspend_deep_ctr_exit have already been initialized
before this comparison (comparing the counters before and after sleep).
I will explicitly initialize them so that kbuildbot does not complain.
>
> Please, redesign this approach.
>
> --
> With Best Regards,
> Andy Shevchenko
[PATCH v2 04/11] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
From: Jacob Chen
This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver.
The phy driver is kind of independent compare to the other parts, but i'd like
to keep it in rkisp1 driver, unless people want to generalize it
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/Makefile | 1 +
.../media/platform/rockchip/isp1/mipi_dphy_sy.c| 806 +
2 files changed, 807 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
diff --git a/drivers/media/platform/rockchip/isp1/Makefile
b/drivers/media/platform/rockchip/isp1/Makefile
index 8f52f959398e..18af64853734 100644
--- a/drivers/media/platform/rockchip/isp1/Makefile
+++ b/drivers/media/platform/rockchip/isp1/Makefile
@@ -4,4 +4,5 @@ video_rkisp1-objs += rkisp1.o \
regs.o \
isp_stats.o \
isp_params.o \
+ mipi_dphy_sy.o \
capture.o
diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
new file mode 100644
index ..a2df34b931e7
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -0,0 +1,806 @@
+/*
+ * Rockchip MIPI Synopsys DPHY driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RK3288_GRF_SOC_CON60x025c
+#define RK3288_GRF_SOC_CON80x0264
+#define RK3288_GRF_SOC_CON90x0268
+#define RK3288_GRF_SOC_CON10 0x026c
+#define RK3288_GRF_SOC_CON14 0x027c
+#define RK3288_GRF_SOC_STATUS210x02d4
+#define RK3288_GRF_IO_VSEL 0x0380
+#define RK3288_GRF_SOC_CON15 0x03a4
+
+#define RK3399_GRF_SOC_CON90x6224
+#define RK3399_GRF_SOC_CON21 0x6254
+#define RK3399_GRF_SOC_CON22 0x6258
+#define RK3399_GRF_SOC_CON23 0x625c
+#define RK3399_GRF_SOC_CON24 0x6260
+#define RK3399_GRF_SOC_CON25 0x6264
+#define RK3399_GRF_SOC_STATUS1 0xe2a4
+
+#define CLOCK_LANE_HS_RX_CONTROL 0x34
+#define LANE0_HS_RX_CONTROL0x44
+#define LANE1_HS_RX_CONTROL0x54
+#define LANE2_HS_RX_CONTROL0x84
+#define LANE3_HS_RX_CONTROL0x94
+#define HS_RX_DATA_LANES_THS_SETTLE__CONTROL 0x75
+
+#define HIWORD_UPDATE(val, mask, shift) \
+ ((val) << (shift) | (mask) << ((shift) + 16))
+
+enum mipi_dphy_sy_pads {
+ MIPI_DPHY_SY_PAD_SINK = 0,
+ MIPI_DPHY_SY_PAD_SOURCE,
+ MIPI_DPHY_SY_PADS_NUM,
+};
+
+enum dphy_reg_id {
+ GRF_DPHY_RX0_TURNDISABLE = 0,
+ GRF_DPHY_RX0_FORCERXMODE,
+ GRF_DPHY_RX0_FORCETXSTOPMODE,
+ GRF_DPHY_RX0_ENABLE,
+ GRF_DPHY_RX0_TESTCLR,
+ GRF_DPHY_RX0_TESTCLK,
+ GRF_DPHY_RX0_TESTEN,
+ GRF_DPHY_RX0_TESTDIN,
+ GRF_DPHY_RX0_TURNREQUEST,
+ GRF_DPHY_RX0_TESTDOUT,
+ GRF_DPHY_TX0_TURNDISABLE,
+ GRF_DPHY_TX0_FORCERXMODE,
+ GRF_DPHY_TX0_FORCETXSTOPMODE,
+ GRF_DPHY_TX0_TURNREQUEST,
+ GRF_DPHY_TX1RX1_TURNDISABLE,
+ GRF_DPHY_TX1RX1_FORCERXMODE,
+ GRF_DPHY_TX1RX1_FORCETXSTOPMODE,
+ GRF_DPHY_TX1RX1_ENABLE,
+ GRF_DPHY_TX1RX1_MASTERSLAVEZ,
+ GRF_DPHY_TX1RX1_BASEDIR,
+ GRF_DPHY_TX1RX1_ENABLECLK,
+ GRF_DPHY_TX1RX1_TURNREQUEST,
+ GRF_DPHY_RX1_SRC_SEL,
+ /* rk3288 only *
linux-next: Tree for Nov 24
Hi all, Please do not add any v4.16 material to your linux-next included trees until v4.15-rc1 has been released. Changes since 20171123: The drm tree gained a conflict against Linus' tree. Non-merge commits (relative to Linus' tree): 766 849 files changed, 17680 insertions(+), 8497 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig. And finally, a simple boot test of the powerpc pseries_le_defconfig kernel in qemu (with and without kvm enabled). Below is a summary of the state of the merge. I am currently merging 246 trees (counting Linus' and 40 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (5a787756b809 Merge tag 'pwm/for-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm) Merging fixes/master (820bf5c419e4 Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi) Merging kbuild-current/fixes (bb3f38c3c5b7 kbuild: clang: fix build failures with sparse check) Merging arc-current/for-curr (82385732b1c9 ARC: perf: avoid vmalloc backed mmap) Merging arm-current/fixes (400eeffaffc7 ARM: 8722/1: mm: make STRICT_KERNEL_RWX effective for LPAE) Merging m68k-current/for-linus (5e387199c17c m68k/defconfig: Update defconfigs for v4.14-rc7) Merging metag-fixes/fixes (b884a190afce metag/usercopy: Add missing fixups) Merging powerpc-fixes/fixes (4d6c51b107cc powerpc/64s: Fix Power9 DD2.1 logic in DT CPU features) Merging sparc/master (0c86a6bd85ff Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net) Merging fscrypt-current/for-stable (42d97eb0ade3 fscrypt: fix renaming and linking special files) Merging net/master (9ed33805cdf8 Merge branch 'ipvlan-Fix-insufficient-skb-linear-check') Merging ipsec/master (94802151894d Revert "xfrm: Fix stack-out-of-bounds read in xfrm_state_find.") Merging netfilter/master (fbcd253d2448 netfilter: conntrack: lower timeout to RETRANS seconds if window is 0) Merging ipvs/master (f7fb77fc1235 netfilter: nft_compat: check extension hook mask only if set) Merging wireless-drivers/master (ed59b7d53c95 Merge ath-current from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git) Merging mac80211/master (a13e8d418f3c Merge tag 'mac80211-for-davem-2017-11-20' of git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211) Merging sound-current/for-linus (9ceace3c9c18 ALSA: hda: Add Raven PCI ID) Merging pci-current/for-linus (1b6115fbe3b3 Merge tag 'pci-v4.15-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci) Merging driver-core.current/driver-core-linus (cf9b0772f2e4 Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc) Merging tty.current/tty-linus (894025f24bd0 Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb) Merging usb.current/usb-linus (894025f24bd0 Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb) Merging usb-gadget-fixes/fixes (7c80f9e4a588 usb: usbtest: fix NULL pointer dereference) Merging usb-serial-fixes/usb-linus (0b07194bb55e Linux 4.14-rc7) Merging usb-chipidea-fixes/ci-for-usb-stable (cbb22ebcfb99 usb: chipidea: core: check before accessing ci_role in ci_role_show) Merging phy/fixes (2fb850092fd9 phy: rockchip-typec: Check for errors from tcphy_phy_init()) Merging staging.current/staging-linus (894025f24bd
Re: [PATCH v2 10/18] x86/asm: Remap the TSS into the cpu entry area
On Thu, Nov 23, 2017 at 12:37 PM, Borislav Petkov wrote:
> On Thu, Nov 23, 2017 at 12:15:14PM -0800, Andy Lutomirski wrote:
>> >> diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
>> >> index b275863128eb..55858b277cf6 100644
>> >> --- a/arch/x86/kernel/asm-offsets.c
>> >> +++ b/arch/x86/kernel/asm-offsets.c
>> >> @@ -98,4 +98,7 @@ void common(void) {
>> >> OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
>> >> /* Size of SYSENTER_stack */
>> >> DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct
>> >> *)0)->SYSENTER_stack));
>> >> +
>> >> + /* Layout info for cpu_entry_area */
>> >> + OFFSET(CPU_ENTRY_AREA_tss, cpu_entry_area, tss);
>> >
>> > The naming convention of those looks really strange. The beginning is in
>> > all caps and then small. Can we choose a convention pls.
>>
>> This is actually consistent with the rest of the offsets. The
>> convention is STRUCT_field.
>
> Except CPU_TSS_SYSENTER_stack. TSS_STRUCT_SYSENTER_stack I guess.
Hmm, that name predates this series. I'll clean it up in a new patch
at the end of the series.
