[linux-sunxi] Re: [PATCH 3/3] ARM: dts: sun7i: Add support for the Ainol AW1 tablet
Le mardi 10 avril 2018 à 23:31 +0200, Paul Kocialkowski a écrit : > This adds support for the Ainol AW1, an A20-based 7" tablet from > Ainol. This version didn't use the dedicated binding for the panel and will be fixed in v2 and onwards. > The following board-specific features are supported: > * LCD panel > * Backlight > * USB OTG > * Buttons > * Touchscreen (doesn't work without non-free firmware) > * Accelerometer > * Battery > > The following are untested: > * Audio output > * Audio speakers > * USB via SPCI connector > > The following are not supported: > * Wi-Fi > * Bluetooth > * NAND > * Audio via SPCI connector > > Signed-off-by: Paul Kocialkowski> --- > arch/arm/boot/dts/Makefile| 1 + > arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts | 358 > ++ > 2 files changed, 359 insertions(+) > create mode 100644 arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 9f7133b6fba0..03bfacebfdbd 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -929,6 +929,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ > sun6i-a31s-sinovoip-bpi-m2.dtb \ > sun6i-a31s-yones-toptech-bs1078-v2.dtb > dtb-$(CONFIG_MACH_SUN7I) += \ > + sun7i-a20-ainol-aw1.dtb \ > sun7i-a20-bananapi.dtb \ > sun7i-a20-bananapi-m1-plus.dtb \ > sun7i-a20-bananapro.dtb \ > diff --git a/arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts > b/arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts > new file mode 100644 > index ..697586991aea > --- /dev/null > +++ b/arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts > @@ -0,0 +1,358 @@ > +/* > + * Copyright 2018 Paul Kocialkowski > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > the > + * License, or (at your option) any later version. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the > Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY > KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE > WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +/dts-v1/; > +#include "sun7i-a20.dtsi" > +#include "sunxi-common-regulators.dtsi" > + > +#include > +#include > +#include > +#include > + > +/ { > + model = "Ainol AW1"; > + compatible = "ainol,ainol-aw1", "allwinner,sun7i-a20"; > + > + aliases { > + serial0 = > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + backlight: backlight { > + compatible = "pwm-backlight"; > + pinctrl-names = "default"; > + pinctrl-0 = <_enable_pin>; > + pwms = < 0 5 PWM_POLARITY_INVERTED>; > + brightness-levels = <0 10 20 30 40 50 60 70 80 90 > 100>; > + default-brightness-level = <5>; > + enable-gpios = < 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ > + }; > + > + panel: panel { > + compatible = "innolux,at070tn92"; > + #address-cells = <1>; > + #size-cells = <0>; > + power-supply = <_power>; > + backlight = <>; > + > + port@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + >
[linux-sunxi] [PATCH 3/3] ARM: dts: sun7i: Add support for the Ainol AW1 tablet
This adds support for the Ainol AW1, an A20-based 7" tablet from Ainol. The following board-specific features are supported: * LCD panel * Backlight * USB OTG * Buttons * Touchscreen (doesn't work without non-free firmware) * Accelerometer * Battery The following are untested: * Audio output * Audio speakers * USB via SPCI connector The following are not supported: * Wi-Fi * Bluetooth * NAND * Audio via SPCI connector Signed-off-by: Paul Kocialkowski--- arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts | 358 ++ 2 files changed, 359 insertions(+) create mode 100644 arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9f7133b6fba0..03bfacebfdbd 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -929,6 +929,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31s-sinovoip-bpi-m2.dtb \ sun6i-a31s-yones-toptech-bs1078-v2.dtb dtb-$(CONFIG_MACH_SUN7I) += \ + sun7i-a20-ainol-aw1.dtb \ sun7i-a20-bananapi.dtb \ sun7i-a20-bananapi-m1-plus.dtb \ sun7i-a20-bananapro.dtb \ diff --git a/arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts b/arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts new file mode 100644 index ..697586991aea --- /dev/null +++ b/arch/arm/boot/dts/sun7i-a20-ainol-aw1.dts @@ -0,0 +1,358 @@ +/* + * Copyright 2018 Paul Kocialkowski + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include +#include + +/ { + model = "Ainol AW1"; + compatible = "ainol,ainol-aw1", "allwinner,sun7i-a20"; + + aliases { + serial0 = + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <_enable_pin>; + pwms = < 0 5 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <5>; + enable-gpios = < 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + }; + + panel: panel { + compatible = "innolux,at070tn92"; + #address-cells = <1>; + #size-cells = <0>; + power-supply = <_power>; + backlight = <>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + panel_input: endpoint@0 { + reg = <0>; + remote-endpoint = <_out_panel>; + }; + }; + }; + + panel_power: panel_power { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 =
[linux-sunxi] [PATCH 2/3] ARM: dts: sun7i: Add RGB666 pins definition
This adds the pins definition for RGB666 LCD panels on the A20. It was imported from the A33 definition, that concernes the same set of pins. Signed-off-by: Paul Kocialkowski--- arch/arm/boot/dts/sun7i-a20.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index e529e4ff2174..f46af8675cfa 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -781,6 +781,14 @@ function = "ir1"; }; + lcd_rgb666_pins: lcd_rgb666@0 { + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", + "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", + "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + function = "lcd0"; + }; + mmc0_pins_a: mmc0@0 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; -- 2.16.3 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH 1/3] drm/panel: Add RGB666 variant of Innolux AT070TN92
This adds timings for the RGB666 variant of the Innolux AT070TN92 panel, as found on the Ainol AW1 tablet. Signed-off-by: Paul Kocialkowski--- drivers/gpu/drm/panel/panel-simple.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 5591984a392b..efeb2f2162bc 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1063,6 +1063,29 @@ static const struct panel_desc innolux_at070tn92 = { .bus_format = MEDIA_BUS_FMT_RGB888_1X24, }; +static const struct drm_display_mode innolux_at070tn92_rgb666_mode = { + .clock = 4, + .hdisplay = 800, + .hsync_start = 800 + 112, + .hsync_end = 800 + 112 + 1, + .htotal = 800 + 112 + 1 + 87, + .vdisplay = 480, + .vsync_start = 480 + 141, + .vsync_end = 480 + 141 + 1, + .vtotal = 480 + 141 + 1 + 38, + .vrefresh = 60, +}; + +static const struct panel_desc innolux_at070tn92_rgb666 = { + .modes = _at070tn92_rgb666_mode, + .num_modes = 1, + .size = { + .width = 154, + .height = 86, + }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, +}; + static const struct display_timing innolux_g101ice_l01_timing = { .pixelclock = { 6040, 7110, 7470 }, .hactive = { 1280, 1280, 1280 }, @@ -2105,6 +2128,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "innolux,at070tn92", .data = _at070tn92, + }, { + .compatible = "innolux,at070tn92-rgb666", + .data = _at070tn92_rgb666, }, { .compatible ="innolux,g101ice-l01", .data = _g101ice_l01 -- 2.16.3 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: Strange behavior with missing H3 interrupts
On 04/10/2018 06:54 AM, Maxime Ripard wrote: On Fri, Apr 06, 2018 at 02:52:35PM +0100, Andre Przywara wrote: On 05/04/18 20:48, Martin Kelly wrote: On 04/05/2018 06:07 AM, Maxime Ripard wrote: On Wed, Apr 04, 2018 at 02:50:25PM -0700, Martin Kelly wrote: Hi, I've noticed strange behavior on my H3 (nanopi neo air) and am wondering if anyone has suggestions for further debugging it, as I'm getting stumped. Specifically, I have configured a device (Invensense MPU9250) to deliver interrupts at 10Hz to PG_EINT11. For some reason, though, the interrupt handler is being called at only about 6 Hz. Looking at a logic analyzer, I see the hardware is interrupting at 10 Hz as it should, but sometimes the interrupts are just missed from the kernel side. So you might see a 200 ms gap between calls to the IRQ handler, but 100 ms between hardware IRQ events. This really looks like you're just missing the edge. Interrupts handlers in Linux run with the interrupts disabled, so if you happen to have another interrupt running at the time where your device is emmiting its own, you'll miss it. But the software/kernel shouldn't matter in that case, should it? It is actually the port controller hardware registering the interrupt cause, and then forwarding this to the GIC, and that to the CPU. So once the Allwinner port controller has sampled the IRQ, it sets the pending bit in the PG_EINT_STATUS_REG, from then on the interrupt cannot be lost anymore. Unless it's configured as a line level IRQ on the pin controller side, where a lowered line (the end of the pulse) would mean the pending state is cleared again. So it should really be edge on the pinctrl side. Or am I missing something? That's what I would think a proper controller would behave yeah, but I've never experienced one behaving like that. It should be pretty easy to test, you just need to read the pending register once the interrupts are re-enabled. Would this be in the arm-gic code or in the sunxi-pinctrl code? When I instrument the sunxi-pinctrl code, I see lots of calls to sunxi_pinctrl_irq_ack but no calls to sunxi_pinctrl_irq_mask, so the controller is not seeing the interrupts at all. If it can use level interrupts, you probably should use that instead. Well, it's always level between the pinctrl and the GIC, and even if it would be edge, the GIC would store this state until the CPU acknowledges it. PSTATE.I=0 shouldn't have an effect. I would actually expect it to be the other way around: configuring as *level* on the pinctrl side allows for IRQ *pulses* to be lost. The behaviour I've seen on some controllers is that it's actually following the input pin state, which means that if the input pin goes low, the line between the pin controller and the GIC will also go low. And since it's level based, you will not notice it. Could it be that the pinctrl is clocked too slowly, so it can't sample the pins quickly enough and misses the rather short pulse? By default it's clocked at 32kHz, which means a period of around 30us. That's indeed not enough if the pulse is around 50us. I guess you could try to play with the input-debounce property and see if it makes things better. Could you expand on that? Since 30us is shorter than the pulse time, I'm unclear on why the interrupts would still be missed. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] "BUG: Bad page state in process ..." on Olimex A64-OLinuXino
Hi, On Thursday, 05.04.2018 at 15:54, Andre Przywara wrote: > >> So can you please replace the last line in the olinuxino.dts: > >> > >> - usb0_vbus-supply = <_usb0_vbus>; > >> + usb0_vbus_power-supply = <_usb0_vbus>; > >> > >> Then you should not need the regulator-always-on hack above. > > > > This does not work, I still see the same "disabling" message in dmesg and > > Mmh, too bad. I was hoping to have found our culprit. > Maybe it's an initialization ordering issue, because the pinctrl driver > - which virtually everyone depends on - gets actually initialized quite > late, so many drivers bail out with -EPROBE_DEFER on their first try. I > I need to check if the USB PHY and the regulator drivers can cope with > that properly. > With that change, can you dump the output of: > /sys/kernel/debug/regulator/regulator_summary > Ideally even without that change. Would be curious to know what's > actually going on with those regulators. Actually, it looks like I messed up and did not notice another change that has an effect on whether or not the USB-A port works. While going to get the above dumps I noticed that the USB-A port was working with a DT I thought it should not work with, so I retraced my steps only to narrow things down to the following change I made during later tests: _otg { status = "okay"; -dr_mode = "otg"; +dr_mode = "host"; }; With a "dr_mode" of "otg", I get "usb0-vbus: disabling" at boot and the USB-A port has no power. With a "dr_mode" of "host" I do NOT get that message, and the USB-A port both has power and works correctly. Just to be clear, in both cases: - I'm using kernel 4.16.0, with your DT changes from the "olinuxino" branch on Github, - this is *without* the change to "usb0_vbus_power-supply" we're discussing here, - the micro-B port has power, since the ATF change you supplied earlier is orthogonal to this(?). Dumping /sys/kernel/debug/regulator/regulator_summary in the non-working case ("dr_mode" = "otg"): regulator use open bypass voltage current min max --- regulator-dummy 0 22 0 0mV 0mA 0mV 0mV usb_phy_generic.0.auto 0mV 0mV vcc-3v3 01 0 3300mV 0mA 3300mV 3300mV 1c0f000.mmc 3300mV 3400mV vdd-cpux 00 0 1100mV 0mA 1040mV 1300mV dcdc4 00 0 1100mV 0mA 0mV 0mV vcc-ddr3 00 0 1360mV 0mA 1360mV 1360mV vdd-sys 00 0 1100mV 0mA 1100mV 1100mV dc1sw 00 0 0mV 0mA 0mV 0mV vcc-pe00 0 2800mV 0mA 2800mV 2800mV vcc-pl01 0 3300mV 0mA 3300mV 3300mV 1c1.mmc 3300mV 3400mV vcc-pll-avcc 00 0 3000mV 0mA 3000mV 3000mV vcc-hdmi 00 0 3300mV 0mA 3300mV 3300mV vcc-mipi 00 0 3300mV 0mA 3300mV 3300mV vcc-avdd-csi 00 0 2800mV 0mA 2800mV 2800mV vcc-wifi-io 11 0 3300mV 0mA 3300mV 3300mV 1c1.mmc 3300mV 3600mV cpvdd 00 0 1800mV 0mA 1800mV 1800mV vcc-dvdd-csi 00 0 1800mV 0mA 1800mV 1800mV eldo3 00 0 700mV 0mA 0mV 0mV vcc-1v2-hsic 00 0 1200mV 0mA 1200mV 1200mV vdd-cpus 00 0 1100mV 0mA 1100mV 1100mV vcc-rtc 00 0 3000mV 0mA 3000mV 3000mV ldo-io0 00 0 3300mV 0mA 0mV 0mV ldo-io1 00 0 3300mV 0mA 0mV 0mV usb0-vbus01 0 5000mV 0mA 5000mV 5000mV 1c19400.phy 0mV 0mV In the working case ("dr_mode" = "host"), the difference from the above is: vcc-rtc 00 0 3000mV 0mA 3000mV 3000mV ldo-io0 00 0 3300mV 0mA 0mV 0mV ldo-io1 00 0 3300mV 0mA 0mV 0mV - usb0-vbus01 0 5000mV 0mA 5000mV 5000mV + usb0-vbus11 0 5000mV 0mA 5000mV 5000mV 1c19400.phy 0mV
Re: [linux-sunxi] messages from bootlin addresses don't show up on the sunxi list
On Tue, Apr 10, 2018 at 01:32:13AM -0700, Mike Valk wrote: > > Op dinsdag 10 april 2018 10:23:41 UTC+2 schreef Luc Verhaegen: > https://groups.google.com/forum/#!topic/linux-sunxi/s0_rAFP8xx4 > https://lists.denx.de/pipermail/u-boot/2018-April/thread.html#324966 > > I'm not a recipient of either mailing lists. I just use the google > groups/ml archives to keep informed. So full headers will be little > difficult to get for me. But I hope the above example might help. There are > more. > > I guess it happened since Maxime switched to the bootlin.com domain. This seems like something maxime specific. Mylene seems to manage to post to the sunxi ml just fine. Quentin schulz is also in the members list and allowed to post. Same for paulk's bootlin account. There are no pending messages, there is no maxime.rip...@bootlin.com in the banned posters (which is where initial post == spam goes). You will have to go ask maxime. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] messages from bootlin addresses don't show up on the sunxi list
Op dinsdag 10 april 2018 10:23:41 UTC+2 schreef Luc Verhaegen: > > On Tue, Apr 10, 2018 at 01:20:23AM -0700, Mike Valk wrote: > > Maxime's messages don't seem to come through though. > > Please point out such a message on another ml, or forward an example to > me with full mail header info. > https://groups.google.com/forum/#!topic/linux-sunxi/s0_rAFP8xx4 https://lists.denx.de/pipermail/u-boot/2018-April/thread.html#324966 I'm not a recipient of either mailing lists. I just use the google groups/ml archives to keep informed. So full headers will be little difficult to get for me. But I hope the above example might help. There are more. I guess it happened since Maxime switched to the bootlin.com domain. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] messages from bootlin addresses don't show up on the sunxi list
On Tue, Apr 10, 2018 at 01:20:23AM -0700, Mike Valk wrote: > > > Op dinsdag 10 april 2018 10:17:20 UTC+2 schreef Luc Verhaegen > Hi Luc > > As usual, ml admins will review and whitelist as mails come in and get > > caught. Those admins get sent an email when a mail gets caught. > > > > Fair enough. Maxime's messages don't seem to come through though. Please point out such a message on another ml, or forward an example to me with full mail header info. I think something else is going on here that has nothing to do with the settings or the members list of the linux-sunxi mailing list. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] messages from bootlin addresses don't show up on the sunxi list
Op dinsdag 10 april 2018 10:17:20 UTC+2 schreef Luc Verhaegen Hi Luc As usual, ml admins will review and whitelist as mails come in and get > caught. Those admins get sent an email when a mail gets caught. > Fair enough. Maxime's messages don't seem to come through though. Thanks anyway -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH] ARM: sun8i: h2+: add support for Banana Pi M2 Zero board
lol , very helpfull ! Em quarta-feira, 1 de novembro de 2017 07:39:09 UTC-2, Icenowy Zheng escreveu: > > Banana Pi M2 Zero board is a H2+-based board by Sinovoip, with a form > factor and GPIO holes similar to Raspberry Pi Zero. > > It features: > - Allwinner H2+ SoC > - Single-chip (16-bit) 512MiB DDR3 DRAM > - Ampak AP6212 Wi-Fi/Bluetooth module > - MicroSD slot > - Two MicroUSB Type-B ports (one can only be used to power the board and > the other features OTG functionality) > - Two keys, a reset and a GPIO-connected key. > - HDMI Type-C (miniHDMI) connector connected to the HDMI part of H2+. > - CSI connector to connect the camera sensor provided by Sinovoip. > > Signed-off-by: Icenowy Zheng> --- > arch/arm/boot/dts/Makefile | 1 + > .../boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts| 156 > + > 2 files changed, 157 insertions(+) > create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 3a5b79fd8198..803dbdf03916 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -930,6 +930,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ > sun8i-a83t-bananapi-m3.dtb \ > sun8i-a83t-cubietruck-plus.dtb \ > sun8i-a83t-tbs-a711.dtb \ > +sun8i-h2-plus-bananapi-m2-zero.dtb \ > sun8i-h2-plus-orangepi-zero.dtb \ > sun8i-h3-bananapi-m2-plus.dtb \ > sun8i-h3-beelink-x2.dtb \ > diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts > b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts > new file mode 100644 > index ..414258da4308 > --- /dev/null > +++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts > @@ -0,0 +1,156 @@ > +/* > + * Copyright (C) 2017 Icenowy Zheng > + * > + * Based on sun8i-h3-bananapi-m2-plus.dts, which is: > + * Copyright (C) 2016 Chen-Yu Tsai > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of the > + * License, or (at your option) any later version. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +/dts-v1/; > +#include "sun8i-h3.dtsi" > +#include "sunxi-common-regulators.dtsi" > + > +#include > +#include > + > +/ { > +model = "Banana Pi BPI-M2-Zero"; > +compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus"; > + > +aliases { > +serial0 = > +serial1 = > +}; > + > +chosen { > +stdout-path = "serial0:115200n8"; > +}; > + > +leds { > +compatible = "gpio-leds"; > +pinctrl-names = "default"; > + > +pwr_led { > +label = "bananapi-m2-zero:red:pwr"; > +gpios = <_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 > */ > +default-state = "on"; > +}; > +}; > + > +gpio_keys { > +
Re: [linux-sunxi] messages from bootlin addresses don't show up on the sunxi list
On Tue, Apr 10, 2018 at 12:35:21AM -0700, Mike Valk wrote: > L.S. > > Can someone whitelist bootlin addresses on the sunxi mailinglist? > > Kr, Mike As usual, ml admins will review and whitelist as mails come in and get caught. Those admins get sent an email when a mail gets caught. There is no point in proactively doing this before mails actually hit the ml, or before accounts have had their addresses updated. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] messages from bootlin addresses don't show up on the sunxi list
L.S. Can someone whitelist bootlin addresses on the sunxi mailinglist? Kr, Mike -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.