CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Mon Jan 11 17:00:19 UTC 2021 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c Log Message: Tidy up more error handling confusion To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.24 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.25 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.24 Sun Apr 5 20:59:38 2020 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Mon Jan 11 17:00:18 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.24 2020/04/05 20:59:38 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.25 2021/01/11 17:00:18 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.24 2020/04/05 20:59:38 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.25 2021/01/11 17:00:18 skrll Exp $"); #include #include @@ -2391,10 +2391,10 @@ int dwc2_hcd_init(struct dwc2_hsotg *hso */ hsotg->status_buf = NULL; if (hsotg->core_params->dma_enable > 0) { - retval = usb_allocmem(&hsotg->hsotg_sc->sc_bus, + int error = usb_allocmem(&hsotg->hsotg_sc->sc_bus, DWC2_HCD_STATUS_BUF_SIZE, 0, USBMALLOC_COHERENT, &hsotg->status_buf_usbdma); - if (!retval) { + if (!error) { hsotg->status_buf = KERNADDR(&hsotg->status_buf_usbdma, 0); hsotg->status_buf_dma = DMAADDR(&hsotg->status_buf_usbdma, 0); } @@ -2402,6 +2402,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hso hsotg->status_buf = kmem_zalloc(DWC2_HCD_STATUS_BUF_SIZE, KM_SLEEP); + /* retval is already -ENOMEM */ if (!hsotg->status_buf) goto error3;
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sun Aug 12 09:59:30 UTC 2018 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcdintr.c Log Message: Fixup previous to not break ping protocol. My bad. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.14 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.15 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.14 Wed Aug 8 07:20:44 2018 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Sun Aug 12 09:59:30 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdintr.c,v 1.14 2018/08/08 07:20:44 simonb Exp $ */ +/* $NetBSD: dwc2_hcdintr.c,v 1.15 2018/08/12 09:59:30 skrll Exp $ */ /* * hcd_intr.c - DesignWare HS OTG Controller host-mode interrupt handling @@ -40,7 +40,7 @@ * This file contains the interrupt handlers for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.14 2018/08/08 07:20:44 simonb Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.15 2018/08/12 09:59:30 skrll Exp $"); #include #include @@ -67,6 +67,9 @@ __KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr #define DWC2_NAKS_BEFORE_DELAY 3 int dwc2_naks_before_delay = DWC2_NAKS_BEFORE_DELAY; +#define DWC2_OUT_NAKS_BEFORE_DELAY 1 +int dwc2_out_naks_before_delay = DWC2_OUT_NAKS_BEFORE_DELAY; + /* This function is for debug only */ static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg) { @@ -1320,8 +1323,10 @@ static void dwc2_hc_nak_intr(struct dwc2 /* * Avoid interrupt storms. */ - qtd->qh->want_wait = 1; - } else if (!chan->qh->ping_state) { + qtd->num_naks++; + qtd->qh->want_wait = qtd->num_naks >= dwc2_out_naks_before_delay; + } + if (!chan->qh->ping_state) { dwc2_update_urb_state_abn(hsotg, chan, chnum, qtd->urb, qtd, DWC2_HC_XFER_NAK); dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd);
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: simonb Date: Wed Aug 8 07:20:44 UTC 2018 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.h dwc2_hcd.c dwc2_hcd.h dwc2_hcdintr.c dwc2_hcdqueue.c Log Message: Merge https://github.com/torvalds/linux/commit/38d2b5fb75c15923fb89c32134516a623515bce4 to mitigate USB NAK interrupt storms, with an extra change from skrll@ to also mitigate interrupt storms on the non-split case with older DWC2 cores. Fixes woeful USB disk performance on an ERLITE. Much thanks to skrll@ for pointer to the above patch, handling the non-split case and testing. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/external/bsd/dwc2/dist/dwc2_core.h cvs rdiff -u -r1.20 -r1.21 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.14 -r1.15 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h \ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c cvs rdiff -u -r1.13 -r1.14 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.h diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.h:1.8 src/sys/external/bsd/dwc2/dist/dwc2_core.h:1.9 --- src/sys/external/bsd/dwc2/dist/dwc2_core.h:1.8 Wed Feb 24 22:17:54 2016 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.h Wed Aug 8 07:20:44 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.h,v 1.8 2016/02/24 22:17:54 skrll Exp $ */ +/* $NetBSD: dwc2_core.h,v 1.9 2018/08/08 07:20:44 simonb Exp $ */ /* * core.h - DesignWare HS OTG Controller common declarations @@ -756,6 +756,7 @@ struct dwc2_hsotg { } flags; struct list_head non_periodic_sched_inactive; + struct list_head non_periodic_sched_waiting; struct list_head non_periodic_sched_active; struct list_head *non_periodic_qh_ptr; struct list_head periodic_sched_inactive; Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.20 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.21 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.20 Wed Aug 1 16:44:14 2018 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Wed Aug 8 07:20:44 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.20 2018/08/01 16:44:14 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.21 2018/08/08 07:20:44 simonb Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.20 2018/08/01 16:44:14 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.21 2018/08/08 07:20:44 simonb Exp $"); #include #include @@ -117,6 +117,10 @@ static void dwc2_dump_channel_info(struc list_for_each_entry(qh, &hsotg->non_periodic_sched_inactive, qh_list_entry) dev_dbg(hsotg->dev, "%p\n", qh); + dev_dbg(hsotg->dev, " NP waiting sched:\n"); + list_for_each_entry(qh, &hsotg->non_periodic_sched_waiting, + qh_list_entry) + dev_dbg(hsotg->dev, "%p\n", qh); dev_dbg(hsotg->dev, " NP active sched:\n"); list_for_each_entry(qh, &hsotg->non_periodic_sched_active, qh_list_entry) @@ -194,6 +198,7 @@ static void dwc2_qh_list_free(struct dwc static void dwc2_kill_all_urbs(struct dwc2_hsotg *hsotg) { dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_inactive); + dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_waiting); dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_active); dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->periodic_sched_inactive); dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->periodic_sched_ready); @@ -2215,6 +2220,7 @@ static void dwc2_hcd_free(struct dwc2_hs /* Free memory for QH/QTD lists */ dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_inactive); + dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_waiting); dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_active); dwc2_qh_list_free(hsotg, &hsotg->periodic_sched_inactive); dwc2_qh_list_free(hsotg, &hsotg->periodic_sched_ready); @@ -2337,6 +2343,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hso /* Initialize the non-periodic schedule */ INIT_LIST_HEAD(&hsotg->non_periodic_sched_inactive); + INIT_LIST_HEAD(&hsotg->non_periodic_sched_waiting); INIT_LIST_HEAD(&hsotg->non_periodic_sched_active); /* Initialize the periodic schedule */ Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.h diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.14 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.15 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.14 Sat Apr 23 10:15:30 2016 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.h Wed Aug 8 07:20:44 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.h,v 1.14 2016/04/23 10:15:30 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.h,v 1.15 2018/08/08 07:20:44 simonb Exp $ */ /* * hcd.h - DesignWare HS OTG Controller host-mode declarations @@ -222,6 +222,7 @@ enum dwc2_transaction_type { /** * struct dwc2_qh - Software queue head structure * + * @hsotg: T
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Wed Aug 1 16:44:14 UTC 2018 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c Log Message: Fix the alignment argument to usb_allocmem in dwc2_hc_setup_align_buf To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.19 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.20 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.19 Wed Feb 24 22:17:54 2016 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Wed Aug 1 16:44:14 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.19 2016/02/24 22:17:54 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.20 2018/08/01 16:44:14 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.19 2016/02/24 22:17:54 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.20 2018/08/01 16:44:14 skrll Exp $"); #include #include @@ -727,7 +727,7 @@ static int dwc2_hc_setup_align_buf(struc qh->dw_align_buf = NULL; qh->dw_align_buf_dma = 0; - err = usb_allocmem(&hsotg->hsotg_sc->sc_bus, buf_size, buf_size, + err = usb_allocmem(&hsotg->hsotg_sc->sc_bus, buf_size, 0, &qh->dw_align_buf_usbdma); if (!err) { usb_dma_t *ud = &qh->dw_align_buf_usbdma;
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Wed Feb 24 22:14:39 UTC 2016 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c dwc2_hcdddma.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/external/bsd/dwc2/dist/dwc2_core.c cvs rdiff -u -r1.7 -r1.8 src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.11 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.12 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.11 Sun Feb 14 10:53:30 2016 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Wed Feb 24 22:14:39 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.11 2016/02/14 10:53:30 skrll Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.12 2016/02/24 22:14:39 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.11 2016/02/14 10:53:30 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.12 2016/02/24 22:14:39 skrll Exp $"); #include #include @@ -2102,7 +2102,7 @@ void dwc2_hc_start_transfer_ddma(struct dev_vdbg(hsotg->dev, "Wrote %pad to ext dma(%d)\n", &chan->desc_list_addr, chan->hc_num); } - + hcchar = DWC2_READ_4(hsotg, HCCHAR(chan->hc_num)); hcchar &= ~HCCHAR_MULTICNT_MASK; hcchar |= chan->multi_count << HCCHAR_MULTICNT_SHIFT & Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.7 src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.8 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.7 Sun Feb 14 10:53:30 2016 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c Wed Feb 24 22:14:39 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdddma.c,v 1.7 2016/02/14 10:53:30 skrll Exp $ */ +/* $NetBSD: dwc2_hcdddma.c,v 1.8 2016/02/24 22:14:39 skrll Exp $ */ /* * hcd_ddma.c - DesignWare HS OTG Controller descriptor DMA routines @@ -40,7 +40,7 @@ * This file contains the Descriptor DMA implementation for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdddma.c,v 1.7 2016/02/14 10:53:30 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdddma.c,v 1.8 2016/02/24 22:14:39 skrll Exp $"); #include #include @@ -566,7 +566,7 @@ static void dwc2_fill_host_isoc_dma_desc dma_desc->status |= HOST_DMA_IOC; #endif - usb_syncmem(&qh->desc_list_usbdma, + usb_syncmem(&qh->desc_list_usbdma, (idx * sizeof(struct dwc2_hcd_dma_desc)), sizeof(struct dwc2_hcd_dma_desc), BUS_DMASYNC_PREWRITE); @@ -640,7 +640,7 @@ static void dwc2_init_isoc_dma_desc(stru idx = dwc2_desclist_idx_dec(qh->td_last, inc, qh->dev_speed); qh->desc_list[idx].status |= HOST_DMA_IOC; - usb_syncmem(&qh->desc_list_usbdma, + usb_syncmem(&qh->desc_list_usbdma, (idx * sizeof(struct dwc2_hcd_dma_desc)), sizeof(struct dwc2_hcd_dma_desc), BUS_DMASYNC_PREWRITE); @@ -673,7 +673,7 @@ static void dwc2_init_isoc_dma_desc(stru idx = dwc2_desclist_idx_dec(qh->td_last, inc, qh->dev_speed); qh->desc_list[idx].status |= HOST_DMA_IOC; - usb_syncmem(&qh->desc_list_usbdma, + usb_syncmem(&qh->desc_list_usbdma, (idx * sizeof(struct dwc2_hcd_dma_desc)), sizeof(struct dwc2_hcd_dma_desc), BUS_DMASYNC_PREWRITE); @@ -714,7 +714,7 @@ static void dwc2_fill_host_dma_desc(stru dma_desc->buf = (u32)chan->xfer_dma; - usb_syncmem(&qh->desc_list_usbdma, + usb_syncmem(&qh->desc_list_usbdma, (n_desc * sizeof(struct dwc2_hcd_dma_desc)), sizeof(struct dwc2_hcd_dma_desc), BUS_DMASYNC_PREWRITE); @@ -769,7 +769,7 @@ static void dwc2_init_non_isoc_dma_desc( "set A bit in desc %d (%p)\n", n_desc - 1, &qh->desc_list[n_desc - 1]); -usb_syncmem(&qh->desc_list_usbdma, +usb_syncmem(&qh->desc_list_usbdma, ((n_desc - 1) * sizeof(struct dwc2_hcd_dma_desc)), sizeof(struct dwc2_hcd_dma_desc), @@ -799,7 +799,7 @@ static void dwc2_init_non_isoc_dma_desc( HOST_DMA_IOC | HOST_DMA_EOL | HOST_DMA_A; dev_vdbg(hsotg->dev, "set IOC/EOL/A bits in desc %d (%p)\n", n_desc - 1, &qh->desc_list[n_desc - 1]); - usb_syncmem(&qh->desc_list_usbdma, + usb_syncmem(&qh->desc_list_usbdma, ((n_desc - 1) * sizeof(struct dwc2_hcd_dma_desc)), sizeof(struct dwc2_hcd_dma_desc), BUS_DMASYNC_PREWRITE); @@ -896,7 +896,7 @@ static int dwc2_cmpl_host_isoc_dma_desc( (idx * sizeof(struct dwc2_hcd_dma_desc)), sizeof(struct dwc2_hcd_dma_desc), BUS_DMASYNC_POSTREAD); - + dma_desc = &qh->desc_list[idx]; frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last]; @@ -1154,7 +1154,7 @@ static int dwc2_process_non_isoc_desc(st if (!urb) return -EINVAL; - usb_syncmem(&qh->desc_list_usbdma, + usb_syncmem(&qh->desc_list_usbdma, (desc_num * siz
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sun Feb 14 10:53:30 UTC 2016 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c dwc2_core.h dwc2_coreintr.c dwc2_hcd.c dwc2_hcd.h dwc2_hcdddma.c dwc2_hcdintr.c dwc2_hcdqueue.c dwc2_hw.h Log Message: Merge conflicts To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/external/bsd/dwc2/dist/dwc2_core.c cvs rdiff -u -r1.6 -r1.7 src/sys/external/bsd/dwc2/dist/dwc2_core.h \ src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c cvs rdiff -u -r1.9 -r1.10 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c cvs rdiff -u -r1.17 -r1.18 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.11 -r1.12 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h cvs rdiff -u -r1.12 -r1.13 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c cvs rdiff -u -r1.13 -r1.14 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c cvs rdiff -u -r1.3 -r1.4 src/sys/external/bsd/dwc2/dist/dwc2_hw.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.10 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.11 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.10 Tue Sep 1 14:03:00 2015 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Sun Feb 14 10:53:30 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.10 2015/09/01 14:03:00 skrll Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.11 2016/02/14 10:53:30 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.10 2015/09/01 14:03:00 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.11 2016/02/14 10:53:30 skrll Exp $"); #include #include @@ -127,6 +127,7 @@ static int dwc2_restore_host_registers(s DWC2_WRITE_4(hsotg, HPRT0, hr->hprt0); DWC2_WRITE_4(hsotg, HFIR, hr->hfir); + hsotg->frame_number = 0; return 0; } @@ -408,6 +409,12 @@ int dwc2_enter_hibernation(struct dwc2_h } } + /* + * Clear any pending interrupts since dwc2 will not be able to + * clear them after entering hibernation. + */ + DWC2_WRITE_4(hsotg, GINTSTS, 0x); + /* Put the controller in low power state */ pcgcctl = DWC2_READ_4(hsotg, PCGCTL); @@ -485,64 +492,166 @@ static void dwc2_init_fs_ls_pclk_sel(str * Do core a soft reset of the core. Be careful with this because it * resets all the internal state machines of the core. */ -static int dwc2_core_reset(struct dwc2_hsotg *hsotg) +int dwc2_core_reset(struct dwc2_hsotg *hsotg) { u32 greset; int count = 0; - u32 gusbcfg; dev_vdbg(hsotg->dev, "%s()\n", __func__); - /* Wait for AHB master IDLE state */ + /* Core Soft Reset */ + greset = DWC2_READ_4(hsotg, GRSTCTL); + greset |= GRSTCTL_CSFTRST; + DWC2_WRITE_4(hsotg, GRSTCTL, greset); do { - usleep_range(2, 4); + udelay(1); greset = DWC2_READ_4(hsotg, GRSTCTL); if (++count > 50) { dev_warn(hsotg->dev, - "%s() HANG! AHB Idle GRSTCTL=%0x\n", + "%s() HANG! Soft Reset GRSTCTL=%0x\n", __func__, greset); return -EBUSY; } - } while (!(greset & GRSTCTL_AHBIDLE)); + } while (greset & GRSTCTL_CSFTRST); - /* Core Soft Reset */ + /* Wait for AHB master IDLE state */ count = 0; - greset |= GRSTCTL_CSFTRST; - DWC2_WRITE_4(hsotg, GRSTCTL, greset); do { - usleep_range(2, 4); + udelay(1); greset = DWC2_READ_4(hsotg, GRSTCTL); if (++count > 50) { dev_warn(hsotg->dev, - "%s() HANG! Soft Reset GRSTCTL=%0x\n", + "%s() HANG! AHB Idle GRSTCTL=%0x\n", __func__, greset); return -EBUSY; } - } while (greset & GRSTCTL_CSFTRST); + } while (!(greset & GRSTCTL_AHBIDLE)); + + return 0; +} - if (hsotg->dr_mode == USB_DR_MODE_HOST) { - gusbcfg = DWC2_READ_4(hsotg, GUSBCFG); - gusbcfg &= ~GUSBCFG_FORCEDEVMODE; - gusbcfg |= GUSBCFG_FORCEHOSTMODE; - DWC2_WRITE_4(hsotg, GUSBCFG, gusbcfg); - } else if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) { - gusbcfg = DWC2_READ_4(hsotg, GUSBCFG); - gusbcfg &= ~GUSBCFG_FORCEHOSTMODE; - gusbcfg |= GUSBCFG_FORCEDEVMODE; - DWC2_WRITE_4(hsotg, GUSBCFG, gusbcfg); - } else if (hsotg->dr_mode == USB_DR_MODE_OTG) { - gusbcfg = DWC2_READ_4(hsotg, GUSBCFG); - gusbcfg &= ~GUSBCFG_FORCEHOSTMODE; - gusbcfg &= ~GUSBCFG_FORCEDEVMODE; - DWC2_WRITE_4(hsotg, GUSBCFG, gusbcfg); +/* + * Force the mode of the controller. + * + * Forcing the mode is needed for two cases: + * + * 1) If the dr_mode is set to either HOST or PERIPHERAL we force the + * controller to stay in a particular mode regardless of ID pin + * changes. We do this usually after a core reset. + * + * 2) During probe we want to read reset values of the hw + * configuration registers that are only available in either host or + * device mode. We may need to force the mode if the current mode does + * not allow us to access the register in the mode that we want. + * + * In either
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sun Feb 14 10:34:09 UTC 2016 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.h Log Message: Fix DWC2_READ_4 in dwc2_sample_frrem which is unused To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.h diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.10 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.11 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.10 Sun Aug 30 12:59:59 2015 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.h Sun Feb 14 10:34:09 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.h,v 1.10 2015/08/30 12:59:59 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.h,v 1.11 2016/02/14 10:34:09 skrll Exp $ */ /* * hcd.h - DesignWare HS OTG Controller host-mode declarations @@ -733,7 +733,7 @@ do { \ qtd_list_entry);\ if (usb_pipeint(_qtd_->urb->pipe) &&\ (_qh_)->start_split_frame != 0 && !_qtd_->complete_split) { \ - _hfnum_.d32 = DWC2_READ_4(hsotg, (_hcd_)->regs + HFNUM); \ + _hfnum_.d32 = DWC2_READ_4((_hcd_), HFNUM); \ switch (_hfnum_.b.frnum & 0x7) { \ case 7: \ (_hcd_)->hfnum_7_samples_##_letter_++; \
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Tue Dec 22 14:29:28 UTC 2015 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c Log Message: Report an error when return -ENODEV for the unsupported setup. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.16 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.17 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.16 Sun Aug 30 12:59:59 2015 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Tue Dec 22 14:29:28 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.16 2015/08/30 12:59:59 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.17 2015/12/22 14:29:28 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.16 2015/08/30 12:59:59 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.17 2015/12/22 14:29:28 skrll Exp $"); #include #include @@ -396,8 +396,11 @@ int dwc2_hcd_urb_enqueue(struct dwc2_hso u32 hprt0 = DWC2_READ_4(hsotg, HPRT0); u32 prtspd = (hprt0 & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT; - if (prtspd == HPRT0_SPD_FULL_SPEED) + if (prtspd == HPRT0_SPD_FULL_SPEED) { + dev_err(hsotg->dev, +"DWC OTG HCD URB Enqueue unsupported\n"); return -ENODEV; + } } if (!qtd)
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Tue Sep 1 14:03:00 UTC 2015 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c Log Message: kern/50185: dwctwo attach failure Another hunk went walkabout during the import - reapply with a little update To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/external/bsd/dwc2/dist/dwc2_core.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.9 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.10 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.9 Tue Sep 1 06:24:21 2015 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Tue Sep 1 14:03:00 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.9 2015/09/01 06:24:21 skrll Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.10 2015/09/01 14:03:00 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.9 2015/09/01 06:24:21 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.10 2015/09/01 14:03:00 skrll Exp $"); #include #include @@ -686,12 +686,22 @@ static int dwc2_phy_init(struct dwc2_hso static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg) { + struct dwc2_softc *sc = hsotg->hsotg_sc; u32 ahbcfg = DWC2_READ_4(hsotg, GAHBCFG); switch (hsotg->hw_params.arch) { case GHWCFG2_EXT_DMA_ARCH: - dev_err(hsotg->dev, "External DMA Mode not supported\n"); - return -EINVAL; + dev_dbg(hsotg->dev, "External DMA Mode\n"); + if (!sc->sc_set_dma_addr) { + dev_err(hsotg->dev, "External DMA Mode not supported\n"); + return -EINVAL; + } + if (hsotg->core_params->ahbcfg != -1) { + ahbcfg &= GAHBCFG_CTRL_MASK; + ahbcfg |= hsotg->core_params->ahbcfg & + ~GAHBCFG_CTRL_MASK; + } + break; case GHWCFG2_INT_DMA_ARCH: dev_dbg(hsotg->dev, "Internal DMA Mode\n");
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Tue Sep 1 06:24:21 UTC 2015 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c Log Message: Re-apply hunk that got lost in the recent import. CVS is fun! To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/external/bsd/dwc2/dist/dwc2_core.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.8 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.9 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.8 Sun Aug 30 12:59:59 2015 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Tue Sep 1 06:24:21 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.8 2015/08/30 12:59:59 skrll Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.9 2015/09/01 06:24:21 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.8 2015/08/30 12:59:59 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.9 2015/09/01 06:24:21 skrll Exp $"); #include #include @@ -1842,10 +1842,18 @@ void dwc2_hc_start_transfer(struct dwc2_ } else { dma_addr = chan->xfer_dma; } - DWC2_WRITE_4(hsotg, HCDMA(chan->hc_num), (u32)dma_addr); - if (dbg_hc(chan)) - dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n", - (unsigned long)dma_addr, chan->hc_num); + if (hsotg->hsotg_sc->sc_set_dma_addr == NULL) { + DWC2_WRITE_4(hsotg, HCDMA(chan->hc_num), + (u32)dma_addr); + if (dbg_hc(chan)) +dev_vdbg(hsotg->dev, +"Wrote %08lx to HCDMA(%d)\n", + (unsigned long)dma_addr, +chan->hc_num); + } else { + (void)(*hsotg->hsotg_sc->sc_set_dma_addr)( + hsotg->dev, dma_addr, chan->hc_num); + } } /* Start the split */
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: uebayasi Date: Mon Aug 31 06:12:55 UTC 2015 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcdqueue.c Log Message: Fix build. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.12 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.13 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.12 Sun Aug 30 12:59:59 2015 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Mon Aug 31 06:12:55 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdqueue.c,v 1.12 2015/08/30 12:59:59 skrll Exp $ */ +/* $NetBSD: dwc2_hcdqueue.c,v 1.13 2015/08/31 06:12:55 uebayasi Exp $ */ /* * hcd_queue.c - DesignWare HS OTG Controller host queuing routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.12 2015/08/30 12:59:59 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.13 2015/08/31 06:12:55 uebayasi Exp $"); #include #include @@ -797,7 +797,7 @@ int dwc2_hcd_qtd_add(struct dwc2_hsotg * struct dwc2_qh *qh) { - KASSERT(mutex_owned(hsotg->lock)); + KASSERT(mutex_owned(&hsotg->lock)); int retval; if (unlikely(!qh)) {
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sun Aug 30 12:59:59 UTC 2015 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c dwc2_core.h dwc2_coreintr.c dwc2_hcd.c dwc2_hcd.h dwc2_hcdintr.c dwc2_hcdqueue.c dwc2_hw.h Log Message: Merge conflicts To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/external/bsd/dwc2/dist/dwc2_core.c cvs rdiff -u -r1.5 -r1.6 src/sys/external/bsd/dwc2/dist/dwc2_core.h cvs rdiff -u -r1.8 -r1.9 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c cvs rdiff -u -r1.15 -r1.16 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.9 -r1.10 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h cvs rdiff -u -r1.11 -r1.12 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c \ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c cvs rdiff -u -r1.2 -r1.3 src/sys/external/bsd/dwc2/dist/dwc2_hw.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.7 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.8 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.7 Fri May 1 06:58:40 2015 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Sun Aug 30 12:59:59 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.7 2015/05/01 06:58:40 hikaru Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.8 2015/08/30 12:59:59 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.7 2015/05/01 06:58:40 hikaru Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.8 2015/08/30 12:59:59 skrll Exp $"); #include #include @@ -67,6 +67,364 @@ __KERNEL_RCSID(0, "$NetBSD: dwc2_core.c, #include "dwc2_core.h" #include "dwc2_hcd.h" +#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) +/** + * dwc2_backup_host_registers() - Backup controller host registers. + * When suspending usb bus, registers needs to be backuped + * if controller power is disabled once suspended. + * + * @hsotg: Programming view of the DWC_otg controller + */ +static int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg) +{ + struct dwc2_hregs_backup *hr; + int i; + + dev_dbg(hsotg->dev, "%s\n", __func__); + + /* Backup Host regs */ + hr = &hsotg->hr_backup; + hr->hcfg = DWC2_READ_4(hsotg, HCFG); + hr->haintmsk = DWC2_READ_4(hsotg, HAINTMSK); + for (i = 0; i < hsotg->core_params->host_channels; ++i) + hr->hcintmsk[i] = DWC2_READ_4(hsotg, HCINTMSK(i)); + + hr->hprt0 = DWC2_READ_4(hsotg, HPRT0); + hr->hfir = DWC2_READ_4(hsotg, HFIR); + hr->valid = true; + + return 0; +} + +/** + * dwc2_restore_host_registers() - Restore controller host registers. + * When resuming usb bus, device registers needs to be restored + * if controller power were disabled. + * + * @hsotg: Programming view of the DWC_otg controller + */ +static int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg) +{ + struct dwc2_hregs_backup *hr; + int i; + + dev_dbg(hsotg->dev, "%s\n", __func__); + + /* Restore host regs */ + hr = &hsotg->hr_backup; + if (!hr->valid) { + dev_err(hsotg->dev, "%s: no host registers to restore\n", +__func__); + return -EINVAL; + } + hr->valid = false; + + DWC2_WRITE_4(hsotg, HCFG, hr->hcfg); + DWC2_WRITE_4(hsotg, HAINTMSK, hr->haintmsk); + + for (i = 0; i < hsotg->core_params->host_channels; ++i) + DWC2_WRITE_4(hsotg, HCINTMSK(i), hr->hcintmsk[i]); + + DWC2_WRITE_4(hsotg, HPRT0, hr->hprt0); + DWC2_WRITE_4(hsotg, HFIR, hr->hfir); + + return 0; +} +#else +static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg) +{ return 0; } + +static inline int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg) +{ return 0; } +#endif + +#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ + IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) +/** + * dwc2_backup_device_registers() - Backup controller device registers. + * When suspending usb bus, registers needs to be backuped + * if controller power is disabled once suspended. + * + * @hsotg: Programming view of the DWC_otg controller + */ +static int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg) +{ + struct dwc2_dregs_backup *dr; + int i; + + dev_dbg(hsotg->dev, "%s\n", __func__); + + /* Backup dev regs */ + dr = &hsotg->dr_backup; + + dr->dcfg = DWC2_READ_4(hsotg, DCFG); + dr->dctl = DWC2_READ_4(hsotg, DCTL); + dr->daintmsk = DWC2_READ_4(hsotg, DAINTMSK); + dr->diepmsk = DWC2_READ_4(hsotg, DIEPMSK); + dr->doepmsk = DWC2_READ_4(hsotg, DOEPMSK); + + for (i = 0; i < hsotg->num_of_eps; i++) { + /* Backup IN EPs */ + dr->diepctl[i] = DWC2_READ_4(hsotg, DIEPCTL(i)); + + /* Ensure DATA PID is correctly configured */ + if (dr->diepctl[i] & DXEPCTL_DPID) + dr->diepctl[i] |= DXEPCTL_SETD1PID; + else + dr->diepctl[i] |= DXEPCTL_SETD0PID; + + dr->dieptsiz[i] = DWC2_READ_4(hsotg, DIEPTSIZ(i)); + dr->diepdma[i] = DWC2_READ_4(hsotg, DIEPDMA(i)); + + /* Backup OUT EPs */ + dr->doepctl[i] =
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Mon Nov 24 10:14:15 UTC 2014 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c dwc2_hcdintr.c Log Message: Simplify the NAK holdoff change. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.10 -r1.11 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.14 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.15 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.14 Wed Sep 3 10:00:08 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Mon Nov 24 10:14:14 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.14 2014/09/03 10:00:08 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.15 2014/11/24 10:14:14 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.14 2014/09/03 10:00:08 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.15 2014/11/24 10:14:14 skrll Exp $"); #include #include @@ -894,8 +894,7 @@ enum dwc2_transaction_type dwc2_hcd_sele * retransmissions to reduce NAK interrupt overhead for * cheeky devices that just hold off using NAKs. */ - if (qh->do_split && - qh->nak_frame != 0x && + if (qh->nak_frame != 0x && dwc2_full_frame_num(qh->nak_frame) == dwc2_full_frame_num(dwc2_hcd_get_frame_number(hsotg))) { qh_ptr = qh_ptr->next; Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.10 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.11 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.10 Wed Sep 3 10:00:08 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Mon Nov 24 10:14:14 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdintr.c,v 1.10 2014/09/03 10:00:08 skrll Exp $ */ +/* $NetBSD: dwc2_hcdintr.c,v 1.11 2014/11/24 10:14:14 skrll Exp $ */ /* * hcd_intr.c - DesignWare HS OTG Controller host-mode interrupt handling @@ -40,7 +40,7 @@ * This file contains the interrupt handlers for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.10 2014/09/03 10:00:08 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.11 2014/11/24 10:14:14 skrll Exp $"); #include #include @@ -1211,21 +1211,21 @@ static void dwc2_hc_nak_intr(struct dwc2 chnum); /* - * When we get control/bulk NAKs then remember this so we holdoff on - * this qh until the beginning of the next frame - */ - switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) { - case USB_ENDPOINT_XFER_CONTROL: - case USB_ENDPOINT_XFER_BULK: - chan->qh->nak_frame = dwc2_hcd_get_frame_number(hsotg); - break; - } - - /* * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and * interrupt. Re-start the SSPLIT transfer. */ if (chan->do_split) { + /* + * When we get control/bulk NAKs then remember this so we holdoff on + * this qh until the beginning of the next frame + */ + switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) { + case USB_ENDPOINT_XFER_CONTROL: + case USB_ENDPOINT_XFER_BULK: + chan->qh->nak_frame = dwc2_hcd_get_frame_number(hsotg); + break; + } + if (chan->complete_split) qtd->error_count = 0; qtd->complete_split = 0;
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Wed Sep 3 10:00:08 UTC 2014 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c dwc2_hcd.h dwc2_hcdintr.c dwc2_hcdqueue.c Log Message: Adapt the NAK holdoff scheme for FS/LS devices from the Raspberry Pi Foundation driver. Should fix PR/49019 - RPI: interrupt storm when url0 is up To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.8 -r1.9 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h cvs rdiff -u -r1.9 -r1.10 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c cvs rdiff -u -r1.10 -r1.11 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.13 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.14 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.13 Thu Jul 3 07:18:42 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Wed Sep 3 10:00:08 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.13 2014/07/03 07:18:42 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.14 2014/09/03 10:00:08 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.13 2014/07/03 07:18:42 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.14 2014/09/03 10:00:08 skrll Exp $"); #include #include @@ -887,6 +887,23 @@ enum dwc2_transaction_type dwc2_hcd_sele if (list_empty(&hsotg->free_hc_list)) break; qh = list_entry(qh_ptr, struct dwc2_qh, qh_list_entry); + + /* + * Check to see if this is a NAK'd retransmit, in which case + * ignore for retransmission. We hold off on bulk/control + * retransmissions to reduce NAK interrupt overhead for + * cheeky devices that just hold off using NAKs. + */ + if (qh->do_split && + qh->nak_frame != 0x && + dwc2_full_frame_num(qh->nak_frame) == + dwc2_full_frame_num(dwc2_hcd_get_frame_number(hsotg))) { + qh_ptr = qh_ptr->next; + continue; + } else { + qh->nak_frame = 0x; + } + if (hsotg->core_params->uframe_sched > 0) { if (hsotg->available_host_channels < 1) break; Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.h diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.8 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.9 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.8 Thu Apr 3 06:34:58 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.h Wed Sep 3 10:00:08 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.h,v 1.8 2014/04/03 06:34:58 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.h,v 1.9 2014/09/03 10:00:08 skrll Exp $ */ /* * hcd.h - DesignWare HS OTG Controller host-mode declarations @@ -243,6 +243,7 @@ enum dwc2_transaction_type { * @interval: Interval between transfers in (micro)frames * @sched_frame:(Micro)frame to initialize a periodic transfer. * The transfer executes in the following (micro)frame. + * @nak_frame: Internal variable used by the NAK holdoff code * @frame_usecs:Internal variable used by the microframe scheduler * @start_split_frame: (Micro)frame at which last start split was initialized * @ntd:Actual number of transfer descriptors in a list @@ -277,6 +278,7 @@ struct dwc2_qh { u16 usecs; u16 interval; u16 sched_frame; + u16 nak_frame; u16 frame_usecs[8]; u16 start_split_frame; u16 ntd; Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.9 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.10 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.9 Sat Jul 26 09:18:53 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Wed Sep 3 10:00:08 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdintr.c,v 1.9 2014/07/26 09:18:53 skrll Exp $ */ +/* $NetBSD: dwc2_hcdintr.c,v 1.10 2014/09/03 10:00:08 skrll Exp $ */ /* * hcd_intr.c - DesignWare HS OTG Controller host-mode interrupt handling @@ -40,7 +40,7 @@ * This file contains the interrupt handlers for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.9 2014/07/26 09:18:53 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.10 2014/09/03 10:00:08 skrll Exp $"); #include #include @@ -1211,6 +1211,17 @@ static void dwc2_hc_nak_intr(struct dwc2 chnum); /* + * When we get control/bulk NAKs then remember this so we holdoff on + * this qh until the beginning of the next frame + */ + switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) { + case USB_ENDPOINT_XFER_CONTROL: + case USB_ENDPOINT_XFER_BULK: + chan->qh->nak_frame = dwc2_hcd_get_frame_number(hsotg); + break; + } + + /* * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and * interrupt. Re-start the SSPLIT transfer. */ Index: src/sys/external/bsd/dwc2/dist/d
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sat Jul 26 09:18:53 UTC 2014 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcdintr.c Log Message: Recover from channel halt errors by using the 3 strikes xacterr rule. Adapted from the RaspberryPI linux driver. This allows the rum(4) I was sent to be somewhat usable. Need to investigate further what is causing the problem in the first place. Might help PR/49019 (RPI: interrupt storm when url0 is up) To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.8 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.9 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.8 Thu Apr 3 06:34:58 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Sat Jul 26 09:18:53 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdintr.c,v 1.8 2014/04/03 06:34:58 skrll Exp $ */ +/* $NetBSD: dwc2_hcdintr.c,v 1.9 2014/07/26 09:18:53 skrll Exp $ */ /* * hcd_intr.c - DesignWare HS OTG Controller host-mode interrupt handling @@ -40,7 +40,7 @@ * This file contains the interrupt handlers for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.8 2014/04/03 06:34:58 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.9 2014/07/26 09:18:53 skrll Exp $"); #include #include @@ -1891,12 +1891,20 @@ static void dwc2_hc_chhltd_intr_dma(stru "hcint 0x%08x, intsts 0x%08x\n", chan->hcint, DWC2_READ_4(hsotg, GINTSTS)); +goto error; } } } else { dev_info(hsotg->dev, "NYET/NAK/ACK/other in non-error case, 0x%08x\n", chan->hcint); +error: + /* use the 3-strikes rule */ + qtd->error_count++; + dwc2_update_urb_state_abn(hsotg, chan, chnum, qtd->urb, + qtd, DWC2_HC_XFER_XACT_ERR); + dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd); + dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_XACT_ERR); } }
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Thu Jul 3 07:18:43 UTC 2014 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c dwc2_hcdqueue.c Log Message: Trailing whitespace. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.9 -r1.10 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.12 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.13 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.12 Thu Apr 3 06:34:58 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Thu Jul 3 07:18:42 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.12 2014/04/03 06:34:58 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.13 2014/07/03 07:18:42 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.12 2014/04/03 06:34:58 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.13 2014/07/03 07:18:42 skrll Exp $"); #include #include @@ -1845,7 +1845,7 @@ void dwc2_hcd_dump_state(struct dwc2_hso dev_dbg(hsotg->dev, "qh: %p\n", chan->qh); if (chan->xfer_started) { - dev_dbg(hsotg->dev, "hfnum: 0x%08x\n", + dev_dbg(hsotg->dev, "hfnum: 0x%08x\n", DWC2_READ_4(hsotg, HFNUM)); dev_dbg(hsotg->dev, "hcchar: 0x%08x\n", DWC2_READ_4(hsotg, HCCHAR(i))); Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.9 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.10 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.9 Thu Apr 3 06:34:58 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Thu Jul 3 07:18:42 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdqueue.c,v 1.9 2014/04/03 06:34:58 skrll Exp $ */ +/* $NetBSD: dwc2_hcdqueue.c,v 1.10 2014/07/03 07:18:42 skrll Exp $ */ /* * hcd_queue.c - DesignWare HS OTG Controller host queuing routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.9 2014/04/03 06:34:58 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.10 2014/07/03 07:18:42 skrll Exp $"); #include #include @@ -844,7 +844,7 @@ void dwc2_hcd_qtd_unlink_and_free(struct struct dwc2_qh *qh) { struct dwc2_softc *sc = hsotg->hsotg_sc; - + list_del_init(&qtd->qtd_list_entry); pool_cache_put(sc->sc_qtdpool, qtd); }
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Fri Apr 4 05:40:57 UTC 2014 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_coreintr.c Log Message: Fix non-DWC2_DEBUG build. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.7 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.8 --- src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.7 Thu Apr 3 06:34:58 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c Fri Apr 4 05:40:57 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_coreintr.c,v 1.7 2014/04/03 06:34:58 skrll Exp $ */ +/* $NetBSD: dwc2_coreintr.c,v 1.8 2014/04/04 05:40:57 skrll Exp $ */ /* * core_intr.c - DesignWare HS OTG Controller common interrupt handling @@ -41,7 +41,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_coreintr.c,v 1.7 2014/04/03 06:34:58 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_coreintr.c,v 1.8 2014/04/04 05:40:57 skrll Exp $"); #include #include @@ -82,6 +82,7 @@ static const char *dwc2_op_state_str(str return "unknown"; } } +#endif /** * dwc2_handle_usb_port_intr - handles OTG PRTINT interrupts. @@ -102,7 +103,6 @@ static void dwc2_handle_usb_port_intr(st /* Clear interrupt */ DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_PRTINT); } -#endif /** * dwc2_handle_mode_mismatch_intr() - Logs a mode mismatch warning message
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Thu Apr 3 06:34:58 UTC 2014 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c dwc2_core.h dwc2_coreintr.c dwc2_hcd.c dwc2_hcd.h dwc2_hcdddma.c dwc2_hcdintr.c dwc2_hcdqueue.c Log Message: Merge conflicts. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/external/bsd/dwc2/dist/dwc2_core.c \ src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c cvs rdiff -u -r1.4 -r1.5 src/sys/external/bsd/dwc2/dist/dwc2_core.h cvs rdiff -u -r1.6 -r1.7 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c cvs rdiff -u -r1.11 -r1.12 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.7 -r1.8 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h \ src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c cvs rdiff -u -r1.8 -r1.9 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.5 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.6 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.5 Fri Mar 21 09:19:10 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Thu Apr 3 06:34:58 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.5 2014/03/21 09:19:10 skrll Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.6 2014/04/03 06:34:58 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.5 2014/03/21 09:19:10 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.6 2014/04/03 06:34:58 skrll Exp $"); #include #include @@ -125,7 +125,7 @@ static void dwc2_init_fs_ls_pclk_sel(str * Do core a soft reset of the core. Be careful with this because it * resets all the internal state machines of the core. */ -static void dwc2_core_reset(struct dwc2_hsotg *hsotg) +static int dwc2_core_reset(struct dwc2_hsotg *hsotg) { u32 greset; int count = 0; @@ -140,7 +140,7 @@ static void dwc2_core_reset(struct dwc2_ dev_warn(hsotg->dev, "%s() HANG! AHB Idle GRSTCTL=%0x\n", __func__, greset); - return; + return -EBUSY; } } while (!(greset & GRSTCTL_AHBIDLE)); @@ -155,7 +155,7 @@ static void dwc2_core_reset(struct dwc2_ dev_warn(hsotg->dev, "%s() HANG! Soft Reset GRSTCTL=%0x\n", __func__, greset); - break; + return -EBUSY; } } while (greset & GRSTCTL_CSFTRST); @@ -164,11 +164,14 @@ static void dwc2_core_reset(struct dwc2_ * not stay in host mode after a connector ID change! */ usleep_range(15, 20); + + return 0; } -static void dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) +static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) { u32 usbcfg, i2cctl; + int retval = 0; /* * core_init() is now called on every switch so only call the @@ -181,7 +184,12 @@ static void dwc2_fs_phy_init(struct dwc2 DWC2_WRITE_4(hsotg, GUSBCFG, usbcfg); /* Reset after a PHY select */ - dwc2_core_reset(hsotg); + retval = dwc2_core_reset(hsotg); + if (retval) { + dev_err(hsotg->dev, "%s() Reset failed, aborting", + __func__); + return retval; + } } /* @@ -209,14 +217,17 @@ static void dwc2_fs_phy_init(struct dwc2 i2cctl |= GI2CCTL_I2CEN; DWC2_WRITE_4(hsotg, GI2CCTL, i2cctl); } + + return retval; } -static void dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) +static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) { u32 usbcfg; + int retval = 0; if (!select_phy) - return; + return 0; usbcfg = DWC2_READ_4(hsotg, GUSBCFG); @@ -249,20 +260,32 @@ static void dwc2_hs_phy_init(struct dwc2 DWC2_WRITE_4(hsotg, GUSBCFG, usbcfg); /* Reset after setting the PHY parameters */ - dwc2_core_reset(hsotg); + retval = dwc2_core_reset(hsotg); + if (retval) { + dev_err(hsotg->dev, "%s() Reset failed, aborting", +__func__); + return retval; + } + + return retval; } -static void dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) +static int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) { u32 usbcfg; + int retval = 0; if (hsotg->core_params->speed == DWC2_SPEED_PARAM_FULL && hsotg->core_params->phy_type == DWC2_PHY_TYPE_PARAM_FS) { /* If FS mode with FS PHY */ - dwc2_fs_phy_init(hsotg, select_phy); + retval = dwc2_fs_phy_init(hsotg, select_phy); + if (retval) + return retval; } else { /* High speed PHY */ - dwc2_hs_phy_init(hsotg, select_phy); + retval = dwc2_hs_phy_init(hsotg, select_phy); + if (retval) + return retval; } if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && @@ -279,6 +302,8 @@ static void dwc2_phy_init(struct dwc2_hs usbcfg &= ~GUSBCFG_ULPI_CLK_SUSP_M; DWC2_WRITE_4(hsotg, GUSBCFG, usbcfg); } + + return retval; } static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg) @@ -393,12 +418,19 @@ int dwc2_core_
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Fri Mar 21 09:19:10 UTC 2014 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c dwc2_coreintr.c dwc2_hcd.c dwc2_hcdintr.c dwc2_hcdqueue.c Log Message: Fix non-USB_DEBUG (and non-DWC2_DEBUG) build To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/external/bsd/dwc2/dist/dwc2_core.c cvs rdiff -u -r1.5 -r1.6 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c cvs rdiff -u -r1.10 -r1.11 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.6 -r1.7 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c cvs rdiff -u -r1.7 -r1.8 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.4 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.5 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.4 Sat Oct 5 06:51:43 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Fri Mar 21 09:19:10 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.4 2013/10/05 06:51:43 skrll Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.5 2014/03/21 09:19:10 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.4 2013/10/05 06:51:43 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.5 2014/03/21 09:19:10 skrll Exp $"); #include #include @@ -1695,7 +1695,7 @@ void dwc2_read_packet(struct dwc2_hsotg */ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg) { -#ifdef DEBUG +#ifdef DWC2_DEBUG bus_size_t addr; int i; @@ -1767,7 +1767,7 @@ void dwc2_dump_host_registers(struct dwc */ void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg) { -#ifdef DEBUG +#ifdef DWC2_DEBUG bus_size_t addr; dev_dbg(hsotg->dev, "Core Global Registers\n"); @@ -2585,7 +2585,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg { struct dwc2_hw_params *hw = &hsotg->hw_params; unsigned width; - u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4; + u32 hwcfg2, hwcfg3, hwcfg4; u32 hptxfsiz, grxfsiz, gnptxfsiz; u32 gusbcfg; @@ -2607,14 +2607,13 @@ int dwc2_get_hwparams(struct dwc2_hsotg hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf, hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid); - hwcfg1 = DWC2_READ_4(hsotg, GHWCFG1); hwcfg2 = DWC2_READ_4(hsotg, GHWCFG2); hwcfg3 = DWC2_READ_4(hsotg, GHWCFG3); hwcfg4 = DWC2_READ_4(hsotg, GHWCFG4); gnptxfsiz = DWC2_READ_4(hsotg, GNPTXFSIZ); grxfsiz = DWC2_READ_4(hsotg, GRXFSIZ); - dev_dbg(hsotg->dev, "hwcfg1=%08x\n", hwcfg1); + dev_dbg(hsotg->dev, "hwcfg1=%08x\n", DWC2_READ_4(hsotg, GHWCFG1)); dev_dbg(hsotg->dev, "hwcfg2=%08x\n", hwcfg2); dev_dbg(hsotg->dev, "hwcfg3=%08x\n", hwcfg3); dev_dbg(hsotg->dev, "hwcfg4=%08x\n", hwcfg4); Index: src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.5 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.6 --- src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.5 Sat Oct 5 06:51:43 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c Fri Mar 21 09:19:10 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_coreintr.c,v 1.5 2013/10/05 06:51:43 skrll Exp $ */ +/* $NetBSD: dwc2_coreintr.c,v 1.6 2014/03/21 09:19:10 skrll Exp $ */ /* * core_intr.c - DesignWare HS OTG Controller common interrupt handling @@ -41,7 +41,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_coreintr.c,v 1.5 2013/10/05 06:51:43 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_coreintr.c,v 1.6 2014/03/21 09:19:10 skrll Exp $"); #include #include @@ -379,11 +379,12 @@ static void dwc2_handle_disconnect_intr( */ static void dwc2_handle_usb_suspend_intr(struct dwc2_hsotg *hsotg) { - u32 dsts; - dev_dbg(hsotg->dev, "USB SUSPEND\n"); if (dwc2_is_device_mode(hsotg)) { +#ifdef DWC2_DEBUG + u32 dsts; + /* * Check the Device status register to determine if the Suspend * state is active @@ -394,6 +395,7 @@ static void dwc2_handle_usb_suspend_intr "DSTS.Suspend Status=%d HWCFG4.Power Optimize=%d\n", !!(dsts & DSTS_SUSPSTS), hsotg->hw_params.power_optimized); +#endif } else { if (hsotg->op_state == OTG_STATE_A_PERIPHERAL) { dev_dbg(hsotg->dev, "a_peripheral->a_host\n"); Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.10 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.11 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.10 Thu Jan 2 15:54:10 2014 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Fri Mar 21 09:19:10 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.10 2014/01/02 15:54:10 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.11 2014/03/21 09:19:10 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.10 2014/01/02 15:54:10 skrll Exp $"); +__KERNEL_
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sat Dec 14 09:58:03 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcdddma.c Log Message: Remove unused variables. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.4 src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.5 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.4 Sat Oct 5 06:51:43 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c Sat Dec 14 09:58:03 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdddma.c,v 1.4 2013/10/05 06:51:43 skrll Exp $ */ +/* $NetBSD: dwc2_hcdddma.c,v 1.5 2013/12/14 09:58:03 skrll Exp $ */ /* * hcd_ddma.c - DesignWare HS OTG Controller descriptor DMA routines @@ -40,7 +40,7 @@ * This file contains the Descriptor DMA implementation for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdddma.c,v 1.4 2013/10/05 06:51:43 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdddma.c,v 1.5 2013/12/14 09:58:03 skrll Exp $"); #include #include @@ -164,8 +164,7 @@ static int dwc2_frame_list_alloc(struct static void dwc2_frame_list_free(struct dwc2_hsotg *hsotg) { - u32 *frame_list; - dma_addr_t frame_list_dma; + usb_dma_t frame_list_usbdma; unsigned long flags; spin_lock_irqsave(&hsotg->lock, flags); @@ -175,13 +174,12 @@ static void dwc2_frame_list_free(struct return; } - frame_list = hsotg->frame_list; - frame_list_dma = hsotg->frame_list_dma; + frame_list_usbdma = hsotg->frame_list_usbdma; hsotg->frame_list = NULL; spin_unlock_irqrestore(&hsotg->lock, flags); - usb_freemem(&hsotg->hsotg_sc->sc_bus, &hsotg->frame_list_usbdma); + usb_freemem(&hsotg->hsotg_sc->sc_bus, &frame_list_usbdma); } static void dwc2_per_sched_enable(struct dwc2_hsotg *hsotg, u32 fr_list_en)
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sun Nov 24 12:25:19 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c dwc2_hcdintr.c dwc2_hcdqueue.c Log Message: Resolve conflicts. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c cvs rdiff -u -r1.5 -r1.6 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c \ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.8 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.9 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.8 Thu Nov 14 12:41:46 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Sun Nov 24 12:25:19 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.8 2013/11/14 12:41:46 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.9 2013/11/24 12:25:19 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.8 2013/11/14 12:41:46 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.9 2013/11/24 12:25:19 skrll Exp $"); #include #include @@ -778,8 +778,8 @@ static int dwc2_assign_and_init_hc(struc chan->data_pid_start = qh->data_toggle; chan->multi_count = 1; - if ((urb->actual_length < 0 || urb->actual_length > urb->length) && - !dwc2_hcd_is_pipe_in(&urb->pipe_info)) + if (urb->actual_length > urb->length && + !dwc2_hcd_is_pipe_in(&urb->pipe_info)) urb->actual_length = urb->length; chan->xfer_len = urb->length - urb->actual_length; Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.5 src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.6 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c:1.5 Sat Oct 5 06:51:43 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c Sun Nov 24 12:25:19 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdintr.c,v 1.5 2013/10/05 06:51:43 skrll Exp $ */ +/* $NetBSD: dwc2_hcdintr.c,v 1.6 2013/11/24 12:25:19 skrll Exp $ */ /* * hcd_intr.c - DesignWare HS OTG Controller host-mode interrupt handling @@ -40,7 +40,7 @@ * This file contains the interrupt handlers for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.5 2013/10/05 06:51:43 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdintr.c,v 1.6 2013/11/24 12:25:19 skrll Exp $"); #include #include @@ -1938,23 +1938,22 @@ static void dwc2_hc_n_intr(struct dwc2_h chan = hsotg->hc_ptr_array[chnum]; - if (dbg_hc(chan)) - dev_vdbg(hsotg->dev, "--Host Channel Interrupt--, Channel %d\n", - chnum); - hcint = DWC2_READ_4(hsotg, HCINT(chnum)); hcintmsk = DWC2_READ_4(hsotg, HCINTMSK(chnum)); - if (dbg_hc(chan)) - dev_vdbg(hsotg->dev, - " hcint 0x%08x, hcintmsk 0x%08x, hcint&hcintmsk 0x%08x\n", - hcint, hcintmsk, hcint & hcintmsk); - if (!chan) { dev_err(hsotg->dev, "## hc_ptr_array for channel is NULL ##\n"); DWC2_WRITE_4(hsotg, HCINT(chnum), hcint); return; } + if (dbg_hc(chan)) { + dev_vdbg(hsotg->dev, "--Host Channel Interrupt--, Channel %d\n", + chnum); + dev_vdbg(hsotg->dev, + " hcint 0x%08x, hcintmsk 0x%08x, hcint&hcintmsk 0x%08x\n", + hcint, hcintmsk, hcint & hcintmsk); + } + DWC2_WRITE_4(hsotg, HCINT(chnum), hcint); chan->hcint = hcint; hcint &= hcintmsk; Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.5 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.6 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.5 Thu Nov 14 12:40:51 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Sun Nov 24 12:25:19 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdqueue.c,v 1.5 2013/11/14 12:40:51 skrll Exp $ */ +/* $NetBSD: dwc2_hcdqueue.c,v 1.6 2013/11/24 12:25:19 skrll Exp $ */ /* * hcd_queue.c - DesignWare HS OTG Controller host queuing routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.5 2013/11/14 12:40:51 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.6 2013/11/24 12:25:19 skrll Exp $"); #include #include @@ -354,25 +354,17 @@ void dwc2_hcd_init_usecs(struct dwc2_hso static int dwc2_find_single_uframe(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) { unsigned short utime = qh->usecs; - int done = 0; - int i = 0; - int ret = -1; + int i; - while (!done) { + for (i = 0; i < 8; i++) { /* At the start hsotg->frame_usecs[i] = max_uframe_usecs[i] */ if (utime <= hsotg->frame_usecs[i]) { hsotg->frame_usecs[i] -= utime; qh->frame_usecs[i] += utime; - ret = i; - done = 1; - } else { - i++; - if (i == 8) -done = 1; + return i; } } - - return ret; + return -1; } /* @@ -382,21 +374,14 @@ static int dwc2_find_multi_uframe(struct { unsigned short utime = qh->usecs; unsig
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Thu Nov 14 12:41:46 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c Log Message: Simplify variable assignment and avoid gcc warnings. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.7 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.8 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.7 Tue Oct 22 16:37:08 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Thu Nov 14 12:41:46 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.7 2013/10/22 16:37:08 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.8 2013/11/14 12:41:46 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.7 2013/10/22 16:37:08 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.8 2013/11/14 12:41:46 skrll Exp $"); #include #include @@ -571,7 +571,7 @@ static void *dwc2_hc_init_xfer(struct dw struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb) { struct dwc2_hcd_iso_packet_desc *frame_desc; - void *bufptr; + void *bufptr = NULL; switch (dwc2_hcd_get_pipe_type(&urb->pipe_info)) { case USB_ENDPOINT_XFER_CONTROL: @@ -588,7 +588,6 @@ static void *dwc2_hc_init_xfer(struct dw else chan->xfer_buf = urb->setup_packet; chan->xfer_len = 8; - bufptr = NULL; break; case DWC2_CONTROL_DATA: @@ -616,7 +615,6 @@ static void *dwc2_hc_init_xfer(struct dw chan->xfer_dma = hsotg->status_buf_dma; else chan->xfer_buf = hsotg->status_buf; - bufptr = NULL; break; } break; @@ -656,8 +654,6 @@ static void *dwc2_hc_init_xfer(struct dw (chan->xfer_dma & 0x3)) bufptr = (u8 *)urb->buf + frame_desc->offset + qtd->isoc_split_offset; - else - bufptr = NULL; if (chan->xact_pos == DWC2_HCSPLT_XACTPOS_ALL) { if (chan->xfer_len <= 188)
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Thu Nov 14 12:40:51 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcdqueue.c Log Message: Remove unused variable. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.4 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.5 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.4 Sat Oct 5 06:51:43 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Thu Nov 14 12:40:51 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdqueue.c,v 1.4 2013/10/05 06:51:43 skrll Exp $ */ +/* $NetBSD: dwc2_hcdqueue.c,v 1.5 2013/11/14 12:40:51 skrll Exp $ */ /* * hcd_queue.c - DesignWare HS OTG Controller host queuing routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.4 2013/10/05 06:51:43 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.5 2013/11/14 12:40:51 skrll Exp $"); #include #include @@ -244,15 +244,10 @@ static struct dwc2_qh *dwc2_hcd_qh_creat void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) { struct dwc2_softc *sc = hsotg->hsotg_sc; - u32 buf_size; if (hsotg->core_params->dma_desc_enable > 0) { dwc2_hcd_qh_free_ddma(hsotg, qh); } else if (qh->dw_align_buf) { - if (qh->ep_type == USB_ENDPOINT_XFER_ISOC) - buf_size = 4096; - else - buf_size = hsotg->core_params->max_transfer_size; /* XXXNH */ usb_freemem(&hsotg->hsotg_sc->sc_bus, &qh->dw_align_buf_usbdma); }
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Tue Nov 12 15:13:14 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.h Log Message: Make CONFIG_USB_DWC2_DEBUG_PERIODIC compile. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.h diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.6 src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.7 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.h:1.6 Sat Oct 5 06:51:43 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.h Tue Nov 12 15:13:14 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.h,v 1.6 2013/10/05 06:51:43 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.h,v 1.7 2013/11/12 15:13:14 skrll Exp $ */ /* * hcd.h - DesignWare HS OTG Controller host-mode declarations @@ -508,7 +508,6 @@ extern void dwc2_hcd_qh_free_ddma(struct #ifdef CONFIG_USB_DWC2_DEBUG_PERIODIC static inline bool dbg_hc(struct dwc2_host_chan *hc) { return true; } static inline bool dbg_qh(struct dwc2_qh *qh) { return true; } -static inline bool dbg_urb(struct urb *urb) { return true; } static inline bool dbg_perio(void) { return true; } #else /* !CONFIG_USB_DWC2_DEBUG_PERIODIC */ static inline bool dbg_hc(struct dwc2_host_chan *hc)
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Tue Oct 22 16:37:08 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c Log Message: Be strictly correct about chan->xfer_dma assignment and avoid calling DMAADDR on fully transfered data phase of a control transfer. Without this change the KASSERT(offset < dma->block->size) in usb_dmaaddr would fire. Found by anon when testing athn(4). To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.6 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.7 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.6 Sat Oct 5 06:51:43 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Tue Oct 22 16:37:08 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.6 2013/10/05 06:51:43 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.7 2013/10/22 16:37:08 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.6 2013/10/05 06:51:43 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.7 2013/10/22 16:37:08 skrll Exp $"); #include #include @@ -548,12 +548,30 @@ static void dwc2_hc_init_split(struct dw chan->hub_port = (u8)hub_port; } +static void *dwc2_hc_init_xfer_data(struct dwc2_hsotg *hsotg, + struct dwc2_host_chan *chan, + struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb) +{ + if (hsotg->core_params->dma_enable > 0) { + chan->xfer_dma = DMAADDR(urb->usbdma, urb->actual_length); + + /* For non-dword aligned case */ + if (hsotg->core_params->dma_desc_enable <= 0 && + (chan->xfer_dma & 0x3)) + return (u8 *)urb->buf + urb->actual_length; + } else { + chan->xfer_buf = (u8 *)urb->buf + urb->actual_length; + } + + return NULL; +} + static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, - struct dwc2_qtd *qtd, void *bufptr) + struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb) { - struct dwc2_hcd_urb *urb = qtd->urb; struct dwc2_hcd_iso_packet_desc *frame_desc; + void *bufptr; switch (dwc2_hcd_get_pipe_type(&urb->pipe_info)) { case USB_ENDPOINT_XFER_CONTROL: @@ -576,6 +594,7 @@ static void *dwc2_hc_init_xfer(struct dw case DWC2_CONTROL_DATA: dev_vdbg(hsotg->dev, " Control data transaction\n"); chan->data_pid_start = qtd->data_toggle; + bufptr = dwc2_hc_init_xfer_data(hsotg, chan, qtd, urb); break; case DWC2_CONTROL_STATUS: @@ -604,10 +623,12 @@ static void *dwc2_hc_init_xfer(struct dw case USB_ENDPOINT_XFER_BULK: chan->ep_type = USB_ENDPOINT_XFER_BULK; + bufptr = dwc2_hc_init_xfer_data(hsotg, chan, qtd, urb); break; case USB_ENDPOINT_XFER_INT: chan->ep_type = USB_ENDPOINT_XFER_INT; + bufptr = dwc2_hc_init_xfer_data(hsotg, chan, qtd, urb); break; case USB_ENDPOINT_XFER_ISOC: @@ -765,17 +786,6 @@ static int dwc2_assign_and_init_hc(struc !dwc2_hcd_is_pipe_in(&urb->pipe_info)) urb->actual_length = urb->length; - if (hsotg->core_params->dma_enable > 0) { - chan->xfer_dma = DMAADDR(urb->usbdma, urb->actual_length); - - /* For non-dword aligned case */ - if (hsotg->core_params->dma_desc_enable <= 0 && - (chan->xfer_dma & 0x3)) - bufptr = (u8 *)urb->buf + urb->actual_length; - } else { - chan->xfer_buf = (u8 *)urb->buf + urb->actual_length; - } - chan->xfer_len = urb->length - urb->actual_length; chan->xfer_count = 0; @@ -786,7 +796,7 @@ static int dwc2_assign_and_init_hc(struc chan->do_split = 0; /* Set the transfer attributes */ - bufptr = dwc2_hc_init_xfer(hsotg, chan, qtd, bufptr); + bufptr = dwc2_hc_init_xfer(hsotg, chan, qtd, urb); /* Non DWORD-aligned buffer case */ if (bufptr) {
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Sat Oct 5 06:51:43 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_core.c dwc2_core.h dwc2_coreintr.c dwc2_hcd.c dwc2_hcd.h dwc2_hcdddma.c dwc2_hcdintr.c dwc2_hcdqueue.c Log Message: Merge conflicts. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/external/bsd/dwc2/dist/dwc2_core.c \ src/sys/external/bsd/dwc2/dist/dwc2_core.h \ src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c \ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c cvs rdiff -u -r1.4 -r1.5 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c \ src/sys/external/bsd/dwc2/dist/dwc2_hcdintr.c cvs rdiff -u -r1.5 -r1.6 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c \ src/sys/external/bsd/dwc2/dist/dwc2_hcd.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_core.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.3 src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.4 --- src/sys/external/bsd/dwc2/dist/dwc2_core.c:1.3 Wed Sep 25 06:19:22 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.c Sat Oct 5 06:51:43 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.c,v 1.3 2013/09/25 06:19:22 skrll Exp $ */ +/* $NetBSD: dwc2_core.c,v 1.4 2013/10/05 06:51:43 skrll Exp $ */ /* * core.c - DesignWare HS OTG Controller common routines @@ -43,7 +43,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.3 2013/09/25 06:19:22 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.4 2013/10/05 06:51:43 skrll Exp $"); #include #include @@ -2205,7 +2205,7 @@ int dwc2_set_param_phy_type(struct dwc2_ { #ifndef NO_FS_PHY_HW_CHECKS int valid = 0; -u32 hs_phy_type, fs_phy_type; + u32 hs_phy_type, fs_phy_type; #endif int retval = 0; @@ -2553,7 +2553,7 @@ int dwc2_set_param_ahbcfg(struct dwc2_hs hsotg->core_params->ahbcfg = val; else hsotg->core_params->ahbcfg = GAHBCFG_HBSTLEN_INCR4 << - GAHBCFG_HBSTLEN_SHIFT; + GAHBCFG_HBSTLEN_SHIFT; return 0; } Index: src/sys/external/bsd/dwc2/dist/dwc2_core.h diff -u src/sys/external/bsd/dwc2/dist/dwc2_core.h:1.3 src/sys/external/bsd/dwc2/dist/dwc2_core.h:1.4 --- src/sys/external/bsd/dwc2/dist/dwc2_core.h:1.3 Wed Sep 25 06:19:22 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_core.h Sat Oct 5 06:51:43 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_core.h,v 1.3 2013/09/25 06:19:22 skrll Exp $ */ +/* $NetBSD: dwc2_core.h,v 1.4 2013/10/05 06:51:43 skrll Exp $ */ /* * core.h - DesignWare HS OTG Controller common declarations @@ -293,7 +293,7 @@ struct dwc2_hw_params { unsigned dev_token_q_depth:5; unsigned max_transfer_size:26; unsigned max_packet_count:11; - unsigned host_channels:4; + unsigned host_channels:5; unsigned hs_phy_type:2; unsigned fs_phy_type:2; unsigned i2c_enable:1; Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.3 src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.4 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c:1.3 Wed Sep 25 06:19:22 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdddma.c Sat Oct 5 06:51:43 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcdddma.c,v 1.3 2013/09/25 06:19:22 skrll Exp $ */ +/* $NetBSD: dwc2_hcdddma.c,v 1.4 2013/10/05 06:51:43 skrll Exp $ */ /* * hcd_ddma.c - DesignWare HS OTG Controller descriptor DMA routines @@ -40,7 +40,7 @@ * This file contains the Descriptor DMA implementation for Host mode */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdddma.c,v 1.3 2013/09/25 06:19:22 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdddma.c,v 1.4 2013/10/05 06:51:43 skrll Exp $"); #include #include Index: src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.3 src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.4 --- src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c:1.3 Wed Sep 25 06:19:22 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcdqueue.c Sat Oct 5 06:51:43 2013 @@ -1,3 +1,5 @@ +/* $NetBSD: dwc2_hcdqueue.c,v 1.4 2013/10/05 06:51:43 skrll Exp $ */ + /* * hcd_queue.c - DesignWare HS OTG Controller host queuing routines * @@ -40,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.3 2013/09/25 06:19:22 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcdqueue.c,v 1.4 2013/10/05 06:51:43 skrll Exp $"); #include #include Index: src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.4 src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.5 --- src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c:1.4 Fri Sep 27 21:39:34 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_coreintr.c Sat Oct 5 06:51:43 2013 @@ -1,3 +1,5 @@ +/* $NetBSD: dwc2_coreintr.c,v 1.5 2013/10/05 06:51:43 skrll Exp $ */ + /* * core_intr.c - DesignWare HS OTG Controller common interrupt handling * @@ -39,7
CVS commit: src/sys/external/bsd/dwc2/dist
Module Name:src Committed By: skrll Date: Wed Oct 2 11:36:27 UTC 2013 Modified Files: src/sys/external/bsd/dwc2/dist: dwc2_hcd.c Log Message: Some core configurations cannot support LS traffic on a FS root port. Fix adapted from the github.com/raspberrypi driver. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/external/bsd/dwc2/dist/dwc2_hcd.c diff -u src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.4 src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.5 --- src/sys/external/bsd/dwc2/dist/dwc2_hcd.c:1.4 Fri Sep 27 21:56:05 2013 +++ src/sys/external/bsd/dwc2/dist/dwc2_hcd.c Wed Oct 2 11:36:27 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: dwc2_hcd.c,v 1.4 2013/09/27 21:56:05 skrll Exp $ */ +/* $NetBSD: dwc2_hcd.c,v 1.5 2013/10/02 11:36:27 skrll Exp $ */ /* * hcd.c - DesignWare HS OTG Controller host-mode routines @@ -42,7 +42,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.4 2013/09/27 21:56:05 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: dwc2_hcd.c,v 1.5 2013/10/02 11:36:27 skrll Exp $"); #include #include @@ -370,6 +370,7 @@ dwc2_hcd_urb_enqueue(struct dwc2_hsotg * unsigned long flags; u32 intr_mask; int retval; + int dev_speed; if (!hsotg->flags.b.port_connect_status) { /* No longer connected */ @@ -377,6 +378,20 @@ dwc2_hcd_urb_enqueue(struct dwc2_hsotg * return -ENODEV; } + dev_speed = dwc2_host_get_speed(hsotg, urb->priv); + + /* Some core configurations cannot support LS traffic on a FS root port */ + if ((dev_speed == USB_SPEED_LOW) && + (hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED) && + (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI)) { + u32 hprt0 = DWC2_READ_4(hsotg, HPRT0); + u32 prtspd = (hprt0 & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT; + + if (prtspd == HPRT0_SPD_FULL_SPEED) { + return -ENODEV; + } + } + qtd = pool_cache_get(sc->sc_qtdpool, PR_NOWAIT); if (!qtd) return -ENOMEM;