Re: [U-Boot] [BISECTED] [BUG]: MMC initialization hang at Zynq Z-turn board

[Faiz Abbas]

Hi,

On 01/08/19 7:51 AM, Peng Fan wrote:
>> Subject: [BISECTED] [BUG]: MMC initialization hang at Zynq Z-turn board
>>
>> Hello,
>>
>> I am running Zynq Z-turn board and I face the following issue with MMC
>> initialization in SPL.
>> With u-boot master, I see the message similar to the following:
>>
>> U-Boot SPL 2019.07-00352-gb5f3eb3393 (Jul 31 2019 - 20:03:42 +0300) mmc
>> boot Trying to boot from MMC1
>>
>> Then, the u-boot waits forever. I've tried to add debug prints and found that
>> execution is stalled somewhere inside mmc_init().
>> Using bisect I've found that the following broken commit is the following:
> 
> https://gitlab.denx.de/u-boot/custodians/u-boot-mmc/commit/41a9fab8dac841afb70a059668abaf14d47cdf59
> 
> Would this patch help?
> 

Yeah, this mostly looks like a NULL pointer access issue.

Thanks,
Faiz
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[U-Boot] [PATCH 2/2] imx: mx6ul_14x14_evk: convert to DM_VIDEO

[Peng Fan]

To support DM_VIDEO,
 Add display node for lcdif
 Drop board iomuxc settings.
 Enable DM_VIDEO

Signed-off-by: Peng Fan 
---

V1:
 This patch could be applied directly, but it needs
 https://patchwork.ozlabs.org/patch/1133224/ patchset work let
 DM VIDEO work.

 arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi | 49 ++-
 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 57 ---
 configs/mx6ul_14x14_evk_defconfig |  2 +-
 include/configs/mx6ul_14x14_evk.h |  2 +-
 4 files changed, 70 insertions(+), 40 deletions(-)

diff --git a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi 
b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi
index 77cb461a21..e9efdb9831 100644
--- a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi
@@ -3,8 +3,55 @@
  * Copyright 2018 NXP
  */
 
+&{/aliases} {
+   u-boot,dm-pre-reloc;
+   display0 = &lcdif;
+};
+
 &qspi {
flash0: n25q256a@0 {
compatible = "jedec,spi-nor";
};
-};
\ No newline at end of file
+};
+
+&{/soc} {
+   u-boot,dm-pre-reloc;
+};
+
+&aips2 {
+   u-boot,dm-pre-reloc;
+};
+
+&iomuxc {
+   u-boot,dm-pre-reloc;
+};
+
+&lcdif {
+   display = <&display0>;
+   u-boot,dm-pre-reloc;
+
+   display0: display@0 {
+   bits-per-pixel = <16>;
+   bus-width = <24>;
+
+   display-timings {
+   native-mode = <&timing0>;
+
+   timing0: timing0 {
+   clock-frequency = <920>;
+   hactive = <480>;
+   vactive = <272>;
+   hfront-porch = <8>;
+   hback-porch = <4>;
+   hsync-len = <41>;
+   vback-porch = <2>;
+   vfront-porch = <4>;
+   vsync-len = <10>;
+   hsync-active = <0>;
+   vsync-active = <0>;
+   de-active = <1>;
+   pixelclk-active = <0>;
+   };
+   };
+   };
+};
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c 
b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index af5af4d50a..126a805163 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -27,6 +27,10 @@
 #include "../common/pfuze.h"
 #include 
 #include 
+#ifdef CONFIG_DM_VIDEO
+#include 
+#include 
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -420,40 +424,8 @@ int board_phy_config(struct phy_device *phydev)
 }
 #endif
 
-#ifdef CONFIG_VIDEO_MXS
+#ifdef CONFIG_DM_VIDEO
 static iomux_v3_cfg_t const lcd_pads[] = {
-   MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA18__LCDIF_DATA18 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA19__LCDIF_DATA19 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA20__LCDIF_DATA20 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA21__LCDIF_DATA21 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA22__LCDIF_DATA22 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-   MX6_PAD_LCD_DATA23__LCDIF_DATA23 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-
-   /* LCD_RST */
-   MX6_PAD_SNVS_TAMPER9__GPIO5_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
-
/* Use GPIO for Brightness adjustment, duty cycle = period. */
 

[U-Boot] [PATCH 1/2] imx: mx6ul_14x14_evk: Fix SPL boot

[Peng Fan]

When booting SPL on the board, met boot failure:
"
Trying to boot from MMC2
MMC Device 1 not found
spl: could not find mmc device 1. error: -19
SPL: failed to boot from all boot devices
"

Let's register the two mmc controllers in SPL stage to
avoid boot failure.

Signed-off-by: Peng Fan 
---
 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 16 
 1 file changed, 16 deletions(-)

diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c 
b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 785247f7e2..af5af4d50a 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -110,7 +110,6 @@ static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-#ifndef CONFIG_SPL_BUILD
 static iomux_v3_cfg_t const usdhc1_pads[] = {
MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -126,7 +125,6 @@ static iomux_v3_cfg_t const usdhc1_pads[] = {
/* RST_B */
MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
-#endif
 
 /*
  * mx6ul_14x14_evk board default supports sd card. If want to use
@@ -237,19 +235,6 @@ int board_mmc_getcd(struct mmc *mmc)
 
 int board_mmc_init(bd_t *bis)
 {
-#ifdef CONFIG_SPL_BUILD
-#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK)
-   imx_iomux_v3_setup_multiple_pads(usdhc2_emmc_pads,
-ARRAY_SIZE(usdhc2_emmc_pads));
-#else
-   imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
-#endif
-   gpio_direction_output(USDHC2_PWR_GPIO, 0);
-   udelay(500);
-   gpio_direction_output(USDHC2_PWR_GPIO, 1);
-   usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-   return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
-#else
int i, ret;
 
/*
@@ -296,7 +281,6 @@ int board_mmc_init(bd_t *bis)
return ret;
}
}
-#endif
return 0;
 }
 #endif
-- 
2.16.4

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Re: [U-Boot] [PATCH v7 3/9] x86: Add a common HOB library

[Bin Meng]

Hi Aiden,

On Mon, Jul 29, 2019 at 12:35 PM Park, Aiden  wrote:
>
> FSP(CONFIG_HAVE_FSP) and Slim Bootloader(CONFIG_SYS_SLIMBOOTLOADER)
> consume HOB(CONFIG_USE_HOB) data from the each HOB list pointer.
> Add a common HOB library in lib/hob.c and include/asm/hob.h.
>
> Signed-off-by: Aiden Park 
> ---
>
> Changes in v7:
>   * Split HOB library into EFI_GUID pre-work and making a common library
>
> Changes in v6:
>   * Use CONFIG_USE_HOB
>   * Change struct efi_guid to efi_guid_t
>   * Use EFI_GUID to define GUIDs
>
> Changes in v3:
>   * Create a common HOB libary from fsp_hob and fsp_support
>
>  arch/x86/include/asm/fsp/fsp_hob.h | 184 +---
>  arch/x86/include/asm/fsp/fsp_support.h |  37 +---
>  arch/x86/include/asm/hob.h | 229 +
>  arch/x86/lib/Makefile  |   1 +
>  arch/x86/lib/fsp/fsp_support.c |  57 +-
>  arch/x86/lib/hob.c |  84 +
>  cmd/x86/Makefile   |   1 +
>  cmd/x86/fsp.c  |  65 +--
>  cmd/x86/hob.c  |  78 +

It looks that you did not use "git format-patch -M" to detect file
rename? Or you can use patman to help the patch generation.

>  9 files changed, 399 insertions(+), 337 deletions(-)
>  create mode 100644 arch/x86/include/asm/hob.h
>  create mode 100644 arch/x86/lib/hob.c
>  create mode 100644 cmd/x86/hob.c
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 

Regards,
Bin
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Re: [U-Boot] [PATCH v7 2/9] x86: lib: fsp: Use EFI_GUID and efi_guid_t

[Bin Meng]

On Mon, Jul 29, 2019 at 12:35 PM Park, Aiden  wrote:
>
> Use existing EFI_GUID and efi_guid_t instead of struct efi_guid.
> This is pre-work before making a common HOB library.
> - Change 'struct efi_guid' to efi_guit_t
> - Remove 'struct efi_guid'
> - Define GUIDs with EFI_GUID() macro
> - Use guidcmp() instead of compare_guid()
> - Remove compare_guid()
>
> Signed-off-by: Aiden Park 
> ---
>
> Changes in v7:
>   * Split HOB library into EFI_GUID pre-work and making a common library
>
>  arch/x86/include/asm/fsp/fsp_ffs.h |  4 +-
>  arch/x86/include/asm/fsp/fsp_fv.h  |  4 +-
>  arch/x86/include/asm/fsp/fsp_hob.h | 76 +
>  arch/x86/include/asm/fsp/fsp_support.h |  6 +-
>  arch/x86/include/asm/fsp/fsp_types.h   |  8 ---
>  arch/x86/lib/fsp/fsp_support.c | 78 ++
>  cmd/x86/fsp.c  | 10 ++--
>  7 files changed, 81 insertions(+), 105 deletions(-)
>

Reviewed-by: Bin Meng 

Tested on MinnowMax
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH v7 0/9] x86: Add basic Slim Bootloader payload support

[Bin Meng]

Hi Aiden,

On Mon, Jul 29, 2019 at 12:35 PM Park, Aiden  wrote:
>
> This patch is to enable U-Boot as a payload which runs on top of Slim 
> Bootloader(https://github.com/slimbootloader/slimbootloader) boot firmware 
> for x86 platforms.
>
> The Slim Bootloader is designed with multi-stage architecture for the 
> execution from reset vector to OS hand-off, and supports QEMU, Apollolake, 
> Whiskeylake and Coffeelake platforms consuming Intel 
> FSP(https://github.com/IntelFsp/FSP) for silicon initialization including CAR 
> and memory initialization.
> As multi-stage architecture, the Slim Bootloader adopts payload concept which 
> is responsible for OS load from media devices and boot OS and it supports 
> 32-bit PE32, EFI FV, ELF and RAW format payloads.
> The Slim Bootloader generate HOB(Hand Off Block) list pointer, which has 
> debug serial port info, memory map info, performance data info and etc., and 
> passes it to a payload. U-Boot configures serial port, dram, pci, tsc and 
> others with the information from the HOB.
>
> The compiled U-Boot supports USB, SATA and SD/MMC boot which have been 
> verified on QEMU and other supported platforms.
>
> Changes in v7:
>   * Split HOB library into EFI_GUID pre-work and making a common library
>   * Use for_each macro for memory entry search

Thanks for all the efforts so far!

There are some checkpatch warnings which I think we should fix:

CHECK: Unnecessary parentheses around guid_hob->name
#379: FILE: arch/x86/lib/fsp/fsp_support.c:374:
+   if (!guidcmp(guid, &(guid_hob->name)))

ERROR: trailing statements should be on next line
#76: FILE: arch/x86/cpu/slimbootloader/sdram.c:37:
+   if (entries->entry[iter].type != E820_RAM) {} else

Regards,
Bin
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Re: [U-Boot] [PATCH v7 8/9] board: intel: Add new slimbootloader board

[Bin Meng]

Hi Aiden,

On Mon, Jul 29, 2019 at 12:36 PM Park, Aiden  wrote:
>
> Add slimbootloader board to run U-boot as a Slim Bootloader payload
> - Add new board/intel/slimbootloader directory with minimum codes
> - Add slimbootloader configuration files
> - Add doc/board/intel/slimbootloader.rst
>
> Signed-off-by: Aiden Park 
> Reviewed-by: Bin Meng 
> Reviewed-by: Andy Shevchenko 
> ---
>
> Changes in v7:
>   * Adding slimbootloader.rst in index.rst
>
> Changes in v6:
>   * Select CONFIG_SYS_SLIMBOOTLOADER in board Kconfig
>   * Move USB_STORAGE and USB_KEYBOARD to board Kconfig
>   * Convert README to reST doc/board/intel/slimbootloader.rst
>
> Changes in v5:
>   * Remove X86_LOAD_FROM_32_BIT from slimbootloader_defconfig
>
> Changes in v3:
>   * Remove VENDOR_SLIMBOOTLOADER
>   * Use VENDOR_INTEL
>   * Move slimbootloader under board/intel/
>   * Enable generic CONFIGs in slimbootloader_defconfig
>   * Add more description in board/intel/slimbootloader/README
>
>  board/intel/Kconfig |  14 ++
>  board/intel/slimbootloader/Kconfig  |  28 
>  board/intel/slimbootloader/Makefile |   5 +
>  board/intel/slimbootloader/slimbootloader.c |  21 +++
>  board/intel/slimbootloader/start.S  |   9 +
>  configs/slimbootloader_defconfig|  22 +++
>  doc/board/intel/index.rst   |   1 +
>  doc/board/intel/slimbootloader.rst  | 174 
>  include/configs/slimbootloader.h|  62 +++
>  9 files changed, 336 insertions(+)
>  create mode 100644 board/intel/slimbootloader/Kconfig
>  create mode 100644 board/intel/slimbootloader/Makefile
>  create mode 100644 board/intel/slimbootloader/slimbootloader.c
>  create mode 100644 board/intel/slimbootloader/start.S
>  create mode 100644 configs/slimbootloader_defconfig
>  create mode 100644 doc/board/intel/slimbootloader.rst
>  create mode 100644 include/configs/slimbootloader.h
>
> diff --git a/board/intel/Kconfig b/board/intel/Kconfig
> index 5131836cb0..10859b5f08 100644
> --- a/board/intel/Kconfig
> +++ b/board/intel/Kconfig
> @@ -73,6 +73,19 @@ config TARGET_MINNOWMAX
>   Note that PCIE_ECAM_BASE is set up by the FSP so the value used
>   by U-Boot matches that value.
>
> +config TARGET_SLIMBOOTLOADER
> +   bool "slimbootloader"
> +   help
> + This target is used for running U-Boot on top of Slim Bootloader
> + boot firmware as a payload. Slim Bootloader does memory 
> initialization
> + and silicon initialization, and it passes necessary information in
> + HOB(Hand Off Block) to a payload. The payload consumes HOB data

nits: should have one space between HOB and (

Please fix this globally in this series. There are many places
including .c file and the reST documentation.

> + which is generated by Slim Bootloader for its driver initialization.
> + Slim Bootloader consumes FSP and its HOB, but FSP HOB is cleared
> + Before launching a payload. Instead, Slim Bootloader generates its
> + HOB data such as memory info, serial port info and so on.
> + Refer to doc/board/intel/slimbootloader.rst for the details.
> +
>  endchoice
>
>  source "board/intel/bayleybay/Kconfig"
> @@ -82,5 +95,6 @@ source "board/intel/crownbay/Kconfig"
>  source "board/intel/edison/Kconfig"
>  source "board/intel/galileo/Kconfig"
>  source "board/intel/minnowmax/Kconfig"
> +source "board/intel/slimbootloader/Kconfig"
>
>  endif
> diff --git a/board/intel/slimbootloader/Kconfig 
> b/board/intel/slimbootloader/Kconfig
> new file mode 100644
> index 00..8c7e22cc33
> --- /dev/null
> +++ b/board/intel/slimbootloader/Kconfig
> @@ -0,0 +1,28 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2019 Intel Corporation 
> +
> +if TARGET_SLIMBOOTLOADER
> +
> +config SYS_BOARD
> +   default "slimbootloader"
> +
> +config SYS_VENDOR
> +   default "intel"
> +
> +config SYS_SOC
> +   default "slimbootloader"
> +
> +config SYS_CONFIG_NAME
> +   default "slimbootloader"
> +
> +config SYS_TEXT_BASE
> +   default 0x0010
> +
> +config BOARD_SPECIFIC_OPTIONS
> +   def_bool y
> +   select SYS_SLIMBOOTLOADER
> +   select USB_STORAGE
> +   select USB_KEYBOARD
> +
> +endif
> diff --git a/board/intel/slimbootloader/Makefile 
> b/board/intel/slimbootloader/Makefile
> new file mode 100644
> index 00..fd8fa98a8d
> --- /dev/null
> +++ b/board/intel/slimbootloader/Makefile
> @@ -0,0 +1,5 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2019 Intel Corporation 
> +
> +obj-y  += start.o slimbootloader.o
> diff --git a/board/intel/slimbootloader/slimbootloader.c 
> b/board/intel/slimbootloader/slimbootloader.c
> new file mode 100644
> index 00..f50eeb823f
> --- /dev/null
> +++ b/board/intel/slimbootloader/slimbootloader.c
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Intel Corporation 
> + */
> +
> +#in

[U-Boot] [PATCH v5] board/BuR/brsmarc1: initial commit

[Hannes Schmelzer]

This commit adds support for the B&R brsmarc1 SoM.

The SoM is based on TI's AM335x SoC.
Mainly vxWorks 6.9.4.x is running on the board,
doing some PLC stuff on various carrier boards.

Signed-off-by: Hannes Schmelzer 

---

Changes in v5:
- rebase to current master
- convert CONFIG_ENV* from header to Kconfig

Changes in v4:
- rebase to current master

Changes in v3:
- rebase to current master
- dts: fixup dtc warnings
- dts: rename temperature sensor nodes
- dts: rename reset-controller node
- dts: add baseboard temp. sensor

Changes in v2:
- fix style issue in arch/arm/mach-omap2/am33xx/Kconfig
- fix SDPX tag in Make-files/rules

 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/am335x-brsmarc1.dts   | 416 +
 arch/arm/mach-omap2/Kconfig|   1 +
 arch/arm/mach-omap2/am33xx/Kconfig |   4 +
 board/BuR/brsmarc1/Kconfig |  15 ++
 board/BuR/brsmarc1/MAINTAINERS |   6 +
 board/BuR/brsmarc1/Makefile|  10 +
 board/BuR/brsmarc1/board.c | 168 +++
 board/BuR/brsmarc1/config.mk   |  33 +++
 board/BuR/brsmarc1/mux.c   | 266 
 configs/brsmarc1_defconfig | 109 ++
 include/configs/brsmarc1.h |  83 
 12 files changed, 1112 insertions(+)
 create mode 100644 arch/arm/dts/am335x-brsmarc1.dts
 create mode 100644 board/BuR/brsmarc1/Kconfig
 create mode 100644 board/BuR/brsmarc1/MAINTAINERS
 create mode 100644 board/BuR/brsmarc1/Makefile
 create mode 100644 board/BuR/brsmarc1/board.c
 create mode 100644 board/BuR/brsmarc1/config.mk
 create mode 100644 board/BuR/brsmarc1/mux.c
 create mode 100644 configs/brsmarc1_defconfig
 create mode 100644 include/configs/brsmarc1.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aa94c49..8a0d41f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -277,6 +277,7 @@ dtb-$(CONFIG_AM33XX) += \
am335x-brppt1-nand.dtb \
am335x-brppt1-spi.dtb \
am335x-brxre1.dtb \
+   am335x-brsmarc1.dtb \
am335x-draco.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
diff --git a/arch/arm/dts/am335x-brsmarc1.dts b/arch/arm/dts/am335x-brsmarc1.dts
new file mode 100644
index 000..1a7f9a5
--- /dev/null
+++ b/arch/arm/dts/am335x-brsmarc1.dts
@@ -0,0 +1,416 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 B&R Industrial Automation GmbH
+ * http://www.br-automation.com
+ *
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "dt-bindings/thermal/thermal.h"
+
+/ {
+   model = "BRSMARC1 SoM";
+   compatible = "ti,am33xx";
+
+   fset: factory-settings {
+   bl-version  = "";
+   order-no= "";
+   cpu-order-no= "";
+   hw-revision = "";
+   serial-no   = <0>;
+   device-id   = <0x0>;
+   parent-id   = <0x0>;
+   hw-variant  = <0x0>;
+   hw-platform = <0x7>;
+   fram-offset = <0x100>;
+   fram-size   = <0x1F00>;
+   cache-disable   = <0x0>;
+   cpu-clock   = <0x0>;
+   };
+
+   chosen {
+   bootargs = "console=ttyO0,115200 earlyprintk";
+   stdout-path = &uart0;
+   };
+
+   aliases {
+   fset = &fset;
+   mmc = &mmc2;
+   spi0 = &spi0;
+   spi1 = &spi1;
+   touch0 = &burtouch0;
+   screen0 = &lcdscreen0;
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x1000>; /* 256 MB */
+   };
+
+   vmmcsd_fixed: fixedregulator@0 {
+   compatible = "regulator-fixed";
+   regulator-name = "vmmcsd_fixed";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   lcdscreen0: lcdscreen@0 {
+   /*backlight = <&tps_bl>; */
+   compatible = "ti,tilcdc,panel";
+   status = "okay";
+
+   panel-info {
+   ac-bias = <255>;
+   ac-bias-intrpt  = <0>;
+   dma-burst-sz= <16>;
+   bpp = <32>;
+   fdd = <0x80>;
+   sync-edge   = <0>;
+   sync-ctrl   = <1>;
+   raster-order= <0>;
+   fifo-th = <0>;
+   rotation= <0>;
+   pupdelay= <0>;
+   pondelay= <0>;
+   pwrpin  = <0x00B1>;
+   brightdrv   = <0>;
+   brightfdim  = <100>;
+   brigh

Re: [U-Boot] [PATCH 1/2] configs: am335x_boneblack_vboot_defconfig: Fix regression by enabling BLK and DM support, disable in SPL

[Tom Rini]

On Tue, Jul 30, 2019 at 01:25:20PM +0530, suni...@techveda.org wrote:

> From: Suniel Mahesh 
> 
> This patch adds BLK and DM support for verified boot on TI AM335x
> chipsets. The following compile warnings are removed:
> 
> = WARNING ==
> This board does not use CONFIG_DM_MMC. Please update
> the board to use CONFIG_DM_MMC before the v2019.04 release.
> Failure to update by the deadline may result in board removal.
> See doc/driver-model/MIGRATION.txt for more info.
> 
> = WARNING ==
> This board does not use CONFIG_DM_USB. Please update
> the board to use CONFIG_DM_USB before the v2019.07 release.
> Failure to update by the deadline may result in board removal.
> See doc/driver-model/MIGRATION.txt for more info.
> 
> 
> BLK and DM_MMC are enabled by default in SPL as well, which is
> making the build to break with an overflow(spl image doesn't
> fit into SRAM because of size constraints).
> 
>   LD  spl/drivers/built-in.o
>   LD  spl/u-boot-spl
> arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
> arm-linux-ld.bfd: region .sram overflowed by 116 bytes
> make[1]: *** [spl/u-boot-spl] Error 1
> make: *** [spl/u-boot-spl] Error 2
> 
> For the above reason BLK and DM_MMC is disabled in SPL.
> Built and tested on AM335x device (BeagleboneBlack).
> 
> Signed-off-by: Suniel Mahesh 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] ARM: dts: da850-evm: Fix MDIO pinmux

[Tom Rini]

On Tue, Jul 30, 2019 at 08:32:37AM -0500, Adam Ford wrote:

> In attempts to speed up SPL and reduce size, the MDIO pin muxing
> was inadvertently affected.  Since the ethernet driver will setup
> the pin muxing when ethernet is loaded, this patch will also
> pinmux the MDIO pins at the same time.  Once an DM compatible
> MDIO driver is available, this  can be removed.
> 
> Fixes: 877ab2423bc2 ("ARM: davinci: da850: Manual pinmux only
> when PINCTRL not available")
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi 
> b/arch/arm/dts/da850-evm-u-boot.dtsi
> index d9e8b9926a..aa42d30c72 100644

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 1/2] configs: am65x_evm_a53: Disable K3_SYSTEM_CONTROLLER

[Tom Rini]

On Mon, Jul 29, 2019 at 11:48:02AM -0500, Suman Anna wrote:

> The K3 System Controller driver is used for loading and starting
> the System Firmware, and is used only on R5 SPL. It need not be
> enabled and built for the A53 U-Boot and SPL, so disable it from
> both the GP and HS AM65x A53 defconfigs.
> 
> While at this, also remove the unneeded CONFIG_SPL_REMOTEPROC and
> CONFIG_CMD_REMOTEPROC as no remoteprocs are now loaded from A53 SPL.
> 
> Signed-off-by: Suman Anna 
> Reviewed-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 2/2] configs: j721e_evm_a72: Disable K3_SYSTEM_CONTROLLER

[Tom Rini]

On Mon, Jul 29, 2019 at 11:48:03AM -0500, Suman Anna wrote:

> The K3 System Controller driver is used for loading and starting
> the System Firmware, and is used only on R5 SPL. It need not be
> enabled and built for the A72 U-Boot and SPL, so disable it from
> the j721e_evm_a72 defconfig.
> 
> While at this, also remove the unneeded CONFIG_SPL_REMOTEPROC and
> CONFIG_CMD_REMOTEPROC as no remoteprocs are now loaded from A72 SPL.
> 
> Signed-off-by: Suman Anna 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 1/1] nand: davinci: avoid out of bounds array access

[Tom Rini]

On Tue, Jul 30, 2019 at 11:29:21PM +0200, Heinrich Schuchardt wrote:

> The array bounds have to be checked before accessing the array element.
> 
> Identified by cppcheck.
> 
> Fixes: 67ac6ffaeefb ("mtd: nand: davinci: add opportunity to write keystone 
> U-boot image")
> Signed-off-by: Heinrich Schuchardt 

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Re: [U-Boot] [PATCH] ARM: da850-evm: Remove references to CONFIG_DA850_AM18X_EVM

[Tom Rini]

On Tue, Jul 30, 2019 at 08:58:58AM -0500, Adam Ford wrote:

> With the removal of da850_am18xxevm, there is at least one
> whitelisted CONFIG option that can be deleted.  This patch
> removes CONFIG_DA850_AM18X_EVM since it's not required any more
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/board/davinci/da8xxevm/da850evm.c 
> b/board/davinci/da8xxevm/da850evm.c
> index fcf9334ba9..f04392ecdc 100644

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] arm: dts: k3-am654-base-board: Fix cpsw_nuss power-domains property

[Tom Rini]

On Mon, Jul 29, 2019 at 11:13:41AM -0500, Suman Anna wrote:

> The commit 355be915ed08 ("arm: dts: k3-am654: Update power-domains
> property for each node") has updated the power-domain cells value
> and updated power-domains property in various existing dts nodes but
> missed updating the cpsw_nuss node. This results in the following
> build warning, fix this.
> 
> arch/arm/dts/k3-am654-base-board.dtb: Warning (power_domains_property): 
> /interconnect@10/interconnect@2838/cpsw_nuss@04600:power-domains: 
> property size (8) too small for cell size 2
> arch/arm/dts/k3-am654-r5-base-board.dtb: Warning (power_domains_property): 
> /interconnect@10/interconnect@2838/cpsw_nuss@04600:power-domains: 
> property size (8) too small for cell size 2
> 
> Fixes: 355be915ed08 ("arm: dts: k3-am654: Update power-domains property for 
> each node")
> Signed-off-by: Suman Anna 
> Reviewed-by: Lokesh Vutla 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 2/2] configs: am335x_boneblack_vboot_defconfig: Add DM for SPI and Flash devices

[Tom Rini]

On Tue, Jul 30, 2019 at 01:25:21PM +0530, suni...@techveda.org wrote:

> From: Suniel Mahesh 
> 
> This patch adds SPI and SPI_FLASH DM support for verified boot on
> TI AM335 chipsets. The following compile warning is removed:
> 
> = WARNING ==
> This board does not use CONFIG_DM_SPI_FLASH. Please update
> the board to use CONFIG_SPI_FLASH before the v2019.07 release.
> Failure to update by the deadline may result in board removal.
> See doc/driver-model/MIGRATION.txt for more info.
> 
> 
> Built and tested on AM335x device (BeagleboneBlack).
> 
> Signed-off-by: Suniel Mahesh 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PULL u-boot] Please pull u-boot-amlogic-20190731

[Tom Rini]

On Wed, Jul 31, 2019 at 09:57:01PM +0200, Neil Armstrong wrote:

> Hi Tom,
> 
> This PR adds support for the Odroid-N2 board and sync the Amlogic G12A DT
> with Linux 5.3-rc1, removing the local DT in -u-boot.dtsi files.
> It also includes the last minute fix from Heinrich in the gxbb clock driver.
> 
> The CI jobs passed at 
> https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic/pipelines/376
> 
> Thanks,
> Neil
> 
> The following changes since commit d0d07ba86afc8074d79e436b1ba4478fa0f0c1b5:
> 
>   Prepare v2019.10-rc1 (2019-07-29 21:16:16 -0400)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git 
> tags/u-boot-amlogic-20190731
> 
> for you to fetch changes up to 0c0cdc86103a1f579cb9f86a3c7c076abb383542:
> 
>   clk: meson: remove duplicate logic (2019-07-31 12:11:04 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] Revert "ARM: davinci: da850: Manual pinmux only when PINCTRL not available"

[Tom Rini]

On Wed, Jul 31, 2019 at 09:17:31AM -0500, Adam Ford wrote:

> This reverts commit 877ab2423bc257045a06bc23d4b9440b82bda6fb.
> 
> The above patch was designed to shrink code by only pin-muxing items
> needed for SPL in SPL and relying on driver model or SPL to mux other
> items.  Unfortunately, da850evm_direct_nor doesn't use SPL so items
> that were only muxed during SPL are not muxed causing the board
> to no longer boot.
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/board/davinci/da8xxevm/da850evm.c 
> b/board/davinci/da8xxevm/da850evm.c
> index fcf9334ba9..849905cf8a 100644

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v2 1/2] configs: am57xx_evm_defconfig: Enable 'bcb' command

[Tom Rini]

On Thu, Jul 25, 2019 at 08:20:18PM +0300, Sam Protsenko wrote:

> It is essential to have an access to BCB area of 'misc' partition on
> Android devices [1]. For BeagleBoard X15 the 'bcb' command will be
> further used for reboot reason implementation and booting to recovery.
> It can be also used for debugging reasons, like checking RescueParty
> messages in BCB area.
> 
> [1] doc/android/bcb.txt
> 
> Signed-off-by: Sam Protsenko 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] ARM: da850evm: Split MTDPARTS into SPL and u-boot

[Tom Rini]

On Fri, Jul 26, 2019 at 05:53:45PM -0500, Adam Ford wrote:

> The MTDPARTS currently lists just u-boot.ais as 512k in size.
> This works when loading the ais file via serial port, but if one
> wanted to update just the u-boot portion, it's not really possible.
> This patch splits the MTDPARTS into a 32k SPL partiion and a 480k
> u-boot partition which allows u-boot.img to be burned to the u-boot
> partition.  The remaining partitions are left with the same sizes
> and offsets to not break backwards compatibility.
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
> index f7c679d3b5..234bc2c8cb 100644

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] ARM: da850-evm: Replace CMD_SF with CMD_MTD

[Tom Rini]

On Fri, Jul 26, 2019 at 06:31:13PM -0500, Adam Ford wrote:

> This patch enables MTD and CMD_MTD and it works with SPI NOR,
> so the older CMD_SF can be removed.
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
> index 234bc2c8cb..81dce349aa 100644

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v2 2/2] configs: am57xx_evm_defconfig: Enable 'dtimg' command

[Tom Rini]

On Thu, Jul 25, 2019 at 08:20:19PM +0300, Sam Protsenko wrote:

> We are going to implement DTBO partition for BeagleBoard X15 further. To
> support this, 'dtimg' command must be enabled.
> 
> Signed-off-by: Sam Protsenko 

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Re: [U-Boot] [PATCH v3] env: ti: boot: Handle reboot reason from BCB

[Tom Rini]

On Thu, Jul 25, 2019 at 04:20:41PM +0300, Sam Protsenko wrote:

> In case of Android boot, reboot reason can be written into BCB (usually
> it's an area in 'misc' partition). U-Boot then can obtain that reboot
> reason from BCB and handle it accordingly to achieve correct Android
> boot flow, like it was suggested in [1]:
>   - if it's empty: perform normal Android boot from eMMC
>   - if it contains "bootonce-bootloader": get into fastboot mode
>   - if it contains "boot-recovery": perform recovery boot
> 
> The latter is not implemented yet, as it depends on some features that
> are not implemented on TI platforms yet (in AOSP and in U-Boot).
> 
> [1] https://marc.info/?l=u-boot&m=152508418909737&w=2
> 
> Signed-off-by: Sam Protsenko 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v2] omap: Correct the fastboot product var

[Tom Rini]

On Thu, Jul 25, 2019 at 08:11:53PM +0300, Sam Protsenko wrote:

> "fastboot flashall" expects "fastboot getvar product" value to be one of
> values provided in android-info.txt file (in AOSP), from "require
> board=" list. Before this patch, "am57xx" is returned for all AM57xx
> based boards, as it's set in $board env var from SYS_BOARD in
> board/ti/am57xx/Kconfig file, which is used for default implementation
> of "fastboot getvar product".
> 
> In order to fix that inconsistency, let's do next:
>   1. In U-Boot: override fastboot.product, reusing the value from
>  $board_name
>   2. In AOSP: provide values for all AM57xx boards we can use to
>  device/ti/beagle_x15/board-info.txt file
> 
> This way requirements check in "fastboot flashall" will work as
> expected, verifying that user tries to flash images to the board which
> those images were built for.
> 
> Signed-off-by: Sam Protsenko 
> Acked-by: Andrew F. Davis 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Please pull u-boot-mmc

[Tom Rini]

On Wed, Jul 31, 2019 at 12:16:56PM +, Peng Fan wrote:

> Hi Tom,
> 
> Please pull u-boot-mmc
> 
> CI build: https://travis-ci.org/MrVan/u-boot/builds/565839867

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Re: [U-Boot] [PATCH v2 00/11] SPL support for RISC-V

[Rick Chen]

Hi Lukas

> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Sunday, July 28, 2019 11:57 PM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra; Rick Jian-Zhi Chen(陳建志); Bin Meng; Sagar Kadam; Alistair
> > Francis; Anup Patel; Troy Benjegerdes; Lukas Auer; Abel Vesa; Alex Kiernan;
> > Alex Marginean; Alexander Graf; Andreas Dannenberg; Andrew F. Davis; Anup
> > Patel; Anup Patel; Atish Patra; Chris Packham; Eugeniu Rosca; Heiko 
> > Schocher;
> > Heinrich Schuchardt; Jagan Teki; Jean-Jacques Hiblot; Jens Wiklander; Joe
> > Hershberger; Kever Yang; Lokesh Vutla; Lukasz Majewski; Marek Vasut; Marek
> > Vasut; Marek Vasut; Markus Klotzbuecher; Michal Simek; Paul Burton; Peng
> > Fan; Philipp Tomsich; Philippe Reynes; Ryder Lee; Shawn Guo; Simon Glass;
> > Simon Goldschmidt; Stefan Roese; Stefano Babic; Tien Fong Chee; Vignesh R;
> > Weijie Gao; Ye Li
> > Subject: [PATCH v2 00/11] SPL support for RISC-V
> >
> > This series adds support for SPL to RISC-V U-Boot. Images can be booted via
> > OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the
> > former case, OpenSBI and U-Boot proper are bundled as a FIT image and made
> > available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL
> > with a dedicated configuration. It uses RAM as SPL boot device.
> >
> > On many RISC-V CPUs, the device tree is provided to U-Boot by the first 
> > stage
> > bootloader. This requires changes to U-Boot SPL (patches 1,
> > 2 and 3), which modify the behavior on other boards as well.
> >
> > To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin
> > binary must be copied into the U-Boot root directory.
> > Alternatively, the location of the binary can be specified with the OPENSBI
> > environment variable. U-Boot can then be build as normal using the
> > configuration qemu-riscv64_spl_defconfig for 64-bit builds or
> > qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build
> > process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT
> > image (u-boot.itb) containing U-Boot proper and OpenSBI.
> >
> > U-Boot can be run in QEMU with the following command.
> >
> > qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \
> >   -device loader,file=u-boot.itb,addr=0x8020
> >

Great job !

I also try to run the spl flow on ax25-ae350 platform.
But encounter some problems. I am still debugging.

Following is the error message:
:
U-Boot SPL 2019.07-10574-ge6ef7ec-dirty (Aug 01 2019 - 10:09:45 +0800)
Trying to boot from RAM

U-Boot 2019.07-10574-ge6ef7ec-dirty (Aug 01 2019 - 10:09:45 +0800)

DRAM:  exception code: 5 , Load access fault , epc 1212654 , ra 1200ffe
### ERROR ### Please RESET the board ###

Do you have some comments ?

By the way, please rebase u-boot-riscv/master to avoid some
conflictions from Bin's patchs.

Thanks
Rick


> > Changes in v2:
> > - Rebase on master and format documentation as reStructuredText
> >
> > Lukas Auer (11):
> >   fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL
> >   Makefile: support building SPL FIT images without device trees
> >   spl: fit: use U-Boot device tree when FIT image has no device tree
> >   riscv: add run mode configuration for SPL
> >   spl: support booting via RISC-V OpenSBI
> >   riscv: add SPL support
> >   riscv: support SPL stack and global data relocation
> >   riscv: add a generic FIT generator script
> >   riscv: set default FIT generator script and build target for SPL
> > builds
> >   riscv: qemu: add SPL configuration
> >   doc: update QEMU RISC-V documentation
> >
> >  Kconfig |   4 +-
> >  Makefile|   8 +-
> >  arch/Kconfig|   6 ++
> >  arch/riscv/Kconfig  |  36 +++--
> >  arch/riscv/cpu/ax25/Kconfig |   6 +-
> >  arch/riscv/cpu/cpu.c|   6 +-
> >  arch/riscv/cpu/generic/Kconfig  |   5 +-
> >  arch/riscv/cpu/start.S  |  62 ++-
> >  arch/riscv/cpu/u-boot-spl.lds   |  82 +++
> >  arch/riscv/include/asm/encoding.h   |   2 +-
> >  arch/riscv/include/asm/spl.h|  31 
> >  arch/riscv/lib/Makefile |   8 +-
> >  arch/riscv/lib/mkimage_fit_opensbi.sh   | 100
> > 
> >  arch/riscv/lib/spl.c|  48 
> >  board/emulation/qemu-riscv/Kconfig  |  10 +++
> >  board/emulation/qemu-riscv/MAINTAINERS  |   2 +
> >  board/emulation/qemu-riscv/qemu-riscv.c |  17 
> >  common/image.c  |   1 +
> >  common/spl/Kconfig  |  17 
> >  common/spl/Makefile |   1 +
> >  common/spl/spl.c|   8 +-
> >  common/spl/spl_fit.c|  37 ++---
> >  common/spl/spl_opensbi.c|  85
> > 
> >  configs/qemu-riscv32_spl_defconfig  |  11 +++

Re: [U-Boot] [PATCH] riscv : serial: use rx watermark to indicate rx data is present

[Rick Chen]

> > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Anup Patel
> > Sent: Friday, July 26, 2019 6:43 PM
> > To: Rick Chen
> > Cc: Alan Quey-Liang Kao(高魁良); Alexander Graf; U-Boot Mailing List; K.C.
> > Kuen-Chern Lin(林坤成)
> > Subject: Re: [U-Boot] [PATCH] riscv : serial: use rx watermark to indicate 
> > rx data
> > is present
> >
> > Hi Rick,
> >
> > On Fri, Jul 26, 2019 at 12:32 PM Rick Chen  wrote:
> > >
> > > Hi Sagar
> > >
> > > > From: Sagar Kadam [mailto:sagar.ka...@sifive.com]
> > > > Sent: Friday, July 19, 2019 7:37 PM
> > > > To: Rick Jian-Zhi Chen(陳建志)
> > > > Subject: Re: [U-Boot] [PATCH] riscv : serial: use rx watermark to
> > > > indicate rx data is present
> > > >
> > > > Hello Rick,
> > > >
> > > > I missed to CC you while submitting the patch[1] Can you please provide
> > your view's on the patch.
> > >
> > > Sorry for the late response.
> > > I am OK with your patch.
> > > I will pull it into riscv tree ASAP :)
> >
> > All SiFive driver update patches have been merged except one documentation
> > update patch.
> >
> > "[U-Boot,v12,1/1] doc: sifive-fu540: Update README to explicitly load DTB 
> > for
> > Linux"
> > https://patchwork.ozlabs.org/patch/1137215/
> >
> > Can you take this patch via RISCV tree ?

Applied to u-boot-riscv/master, thanks!

Rick
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[U-Boot] 答复: [PATCH 0/4] Make some changes to SDP

[Sherry Sun]

Hi Angus

> 
> Hi Sherry,
> 
> On 2019-07-17 18:40, sherry sun wrote:
> > From: Sherry Sun 
> >
> > This patchset adds:
> > 1. Add usb_gadget_initialize() and usb_gadget_release() to initialize
> > and release UDC during sdp download.
> > 2. Add high speed endpoint descriptor for sdp.
> > 3. Add a macro definition--CONFIG_SDP_LOADADDR as default sdp load
> > address while SDP_WRITE and SDP_JUMP command addr is zero.
> >
> > Sherry Sun (4):
> >   imx: spl: Change USB boot device type
> >   SDP: use CONFIG_SDP_LOADADDR as default load address
> >   SDP: fix wrong usb request size and add high speed endpoint
> > descriptor
> >   SDP: Call usb_gadget_initialize and usb_gadget_release to support
> > UDC
> 
> These changes look like like they target SDP on imx8. For imx8mq is this all
> that is required to get SDP working with uuu or are there additional changes
> required ?
> 

The changes in patch 1/4 are target on both imx8 and imx8m.
The rest three patches are target on all boards which used SDP.
So for imx8mq, if your usb gadget driver is ready ,these changes are enough to 
get SDP working with UUU. 

Best regards
Sherry sun

> Thanks
> Angus
> 
> >
> >  arch/arm/mach-imx/spl.c|  2 +-
> >  common/spl/spl_sdp.c   |  4 
> >  drivers/usb/gadget/Kconfig |  4 
> >  drivers/usb/gadget/f_sdp.c | 39
> > +-
> >  4 files changed, 43 insertions(+), 6 deletions(-)
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Re: [U-Boot] [PATCH 7/7] doc: rockchip: Adapt Pine64 Rock64 board instructions

[Kever Yang]

On 2019/8/1 上午12:01, Matwey V. Kornilov wrote:

Now we have our own TPL implementation. Remove obsolete notes.

Signed-off-by: Matwey V. Kornilov 



Reviewed-by: Kever Yang 


Thanks,

- Kever


---
  doc/README.rockchip | 10 ++
  1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 8ccbb87264..7d4dc1b33b 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -309,17 +309,11 @@ Booting from an SD card on Pine64 Rock64 (RK3328)
  =
  
  For Rock64 rk3328 board the following three parts are required:

-TPL, SPL, and the u-boot image tree blob. While u-boot-spl.bin and
-u-boot.itb are to be compiled as usual, TPL is currently not
-implemented in u-boot, so you need to pick one from rkbin:
-
-  - Get the rkbin
-
-=> git clone https://github.com/rockchip-linux/rkbin.git
+TPL, SPL, and the u-boot image tree blob.
  
- Create TPL/SPL image
  
-=> tools/mkimage -n rk3328 -T rksd -d rkbin/bin/rk33/rk3328_ddr_333MHz_v1.16.bin idbloader.img

+=> tools/mkimage -n rk3328 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
  => cat spl/u-boot-spl.bin >> idbloader.img
  
- Write TPL/SPL image at 64 sector



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Re: [U-Boot] [PATCH 6/7] configs: rk3328: enable TPL for rock64-rk3328_defconfig

[Kever Yang]

On 2019/8/1 上午12:01, Matwey V. Kornilov wrote:

Signed-off-by: Matwey V. Kornilov 



The commit message is not allowed to be empty, please say something here.


Thanks,

- Kever


---
  configs/rock64-rk3328_defconfig | 14 ++
  1 file changed, 14 insertions(+)

diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index ef453e72c1..6484845fb6 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -34,15 +34,20 @@ CONFIG_CMD_USB=y
  CONFIG_CMD_TIME=y
  CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
  CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
  CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent 
assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
  CONFIG_ENV_IS_IN_MMC=y
  CONFIG_NET_RANDOM_ETHADDR=y
  CONFIG_REGMAP=y
  CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
  CONFIG_SYSCON=y
  CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
  CONFIG_CLK=y
  CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
  CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
  CONFIG_ROCKCHIP_GPIO=y
  CONFIG_SYS_I2C_ROCKCHIP=y
@@ -65,6 +70,7 @@ CONFIG_REGULATOR_RK8XX=y
  CONFIG_PWM_ROCKCHIP=y
  CONFIG_RAM=y
  CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
  CONFIG_DM_RESET=y
  CONFIG_BAUDRATE=150
  CONFIG_DEBUG_UART_SHIFT=2
@@ -85,4 +91,12 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
  CONFIG_USB_GADGET_DWC2_OTG=y
  CONFIG_USE_TINY_PRINTF=y
  CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
  CONFIG_ERRNO_STR=y
+CONFIG_TPL_DM=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y



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Re: [U-Boot] [PATCH 1/2] riscv: Sync csr.h with Linux kernel v5.2

[Rick Chen]

> > From: Bin Meng [mailto:bmeng...@gmail.com]
> > Sent: Thursday, July 11, 2019 2:43 PM
> > To: Rick Jian-Zhi Chen(陳建志); Anup Patel; Lukas Auer; U-Boot Mailing List
> > Subject: [PATCH 1/2] riscv: Sync csr.h with Linux kernel v5.2
> >
> > This syncs csr.h with Linux kernel 5.2, and imports asm.h that is required 
> > by
> > csr.h.
> >
> > Signed-off-by: Bin Meng 
> > ---
> >
> >  arch/riscv/include/asm/asm.h | 68
> > 
> >  arch/riscv/include/asm/csr.h | 62 +---
> >  2 files changed, 114 insertions(+), 16 deletions(-)  create mode 100644
> > arch/riscv/include/asm/asm.h
> >

Applied to u-boot-riscv/master, thanks!

Rick
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Re: [U-Boot] [PATCH 4/7] rockchip: Kconfig: enable TPL support for rk3328

[Kever Yang]

On 2019/8/1 上午12:01, Matwey V. Kornilov wrote:

From: Kever Yang 

Enable TPL support and some related option in Kconfig.

Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/430b01462bf3f24aaf7920ae2587a6943c39ab5d
 with minor modifications]
Signed-off-by: Matwey V. Kornilov 
---
  arch/arm/mach-rockchip/Kconfig | 21 +
  1 file changed, 21 insertions(+)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index e337d06b99..22cbb3a9a4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -110,9 +110,14 @@ config ROCKCHIP_RK3328
select ARM64
select SUPPORT_SPL
select SPL
+   select SUPPORT_TPL
+   select TPL
+   select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+   select TPL_NEEDS_SEPARATE_STACK if TPL
imply ROCKCHIP_COMMON_BOARD
imply SPL_ROCKCHIP_COMMON_BOARD
imply SPL_SERIAL_SUPPORT
+   imply TPL_SERIAL_SUPPORT
imply SPL_SEPARATE_BSS
select ENABLE_ARM_SOC_BOOT0_HOOK
select DEBUG_UART_BOARD_INIT
@@ -124,6 +129,22 @@ config ROCKCHIP_RK3328
  and video codec support. Peripherals include Gigabit Ethernet,
  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
  
+if ROCKCHIP_RK3328

+
+config TPL_LDSCRIPT
+   default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+default 0xff091000
+
+config TPL_MAX_SIZE
+default 28672
+
+config TPL_STACK
+default 0xff098000
+
+endif
+


These option for RK3328 should go to arch/arm/mach-rockchip/rk3328/Kconfig


Thanks,

- Kever


  config ROCKCHIP_RK3368
bool "Support Rockchip RK3368"
select ARM64



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Re: [U-Boot] [PATCH 2/2] riscv: Access CSRs using CSR numbers

[Rick Chen]

Rick Chen  於 2019年7月18日 週四 上午11:25寫道：
>
> > > From: Bin Meng [mailto:bmeng...@gmail.com]
> > > Sent: Thursday, July 11, 2019 2:43 PM
> > > To: Rick Jian-Zhi Chen(陳建志); Anup Patel; Lukas Auer; U-Boot Mailing List
> > > Subject: [PATCH 2/2] riscv: Access CSRs using CSR numbers
> > >
> > > We should prefer accessing CSRs using their CSR numbers
> > > because:
> > > 1. It compiles fine with older toolchains.
> > > 2. We can use latest CSR names in #define macro names of CSR
> > >numbers as-per RISC-V spec.
> > > 3. We can access newly added CSRs even if toolchain does not
> > >recognize newly added CSRs by name.
> > >
> > > This commit is inspired from Linux kernel commit a3182c91ef4e
> > > ("RISC-V: Access CSRs using CSR numbers").
> > >
> > > Signed-off-by: Bin Meng 
> > > ---
> > >
> > >  arch/riscv/cpu/cpu.c  |   9 +-
> > >  arch/riscv/cpu/start.S|   3 +-
> > >  arch/riscv/include/asm/csr.h  |  12 ++
> > >  arch/riscv/include/asm/encoding.h | 238 
> > > +-
> > >  4 files changed, 19 insertions(+), 243 deletions(-)
> > >

Applied to u-boot-riscv/master, thanks!

Rick
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Re: [U-Boot] [PATCH 3/7] rockchip: dts: rk3328: enable the drivers need by TPL/SPL

[Kever Yang]

Matwey,


On 2019/8/1 上午12:01, Matwey V. Kornilov wrote:

From: Kever Yang 

Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.

Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/664225d1610d77ef64ed9a4f42d36474362592cc]
Signed-off-by: Matwey V. Kornilov 
---
  arch/arm/dts/rk3328-evb.dts | 2 ++
  arch/arm/dts/rk3328.dtsi| 1 +


All these updates should go to -u-boot.dtsi.


Thanks,

- Kever


  2 files changed, 3 insertions(+)

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 3b01dd0a87..fa8b1b18da 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -61,6 +61,7 @@
  };
  
  &uart2 {

+   u-boot,dm-pre-reloc;
status = "okay";
  };
  
@@ -77,6 +78,7 @@

  };
  
  &emmc {

+   u-boot,dm-pre-reloc;
bus-width = <8>;
cap-mmc-highspeed;
supports-emmc;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index a080ae8d69..4ec5d3e1f3 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -363,6 +363,7 @@
};
  
  	cru: clock-controller@ff44 {

+   u-boot,dm-pre-reloc;
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
rockchip,grf = <&grf>;



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Re: [U-Boot] [PATCH 2/7] rockchip: dts: rk3328: update dmc node for driver

[Kever Yang]

Hi Matwey,

On 2019/8/1 上午12:01, Matwey V. Kornilov wrote:

From: Kever Yang 

Update dmc node for full feature driver.

Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/1e1495636574c78ea9d3af3e0aae95d5204612d6
 with minor modifications]
Signed-off-by: Matwey V. Kornilov 
---
  arch/arm/dts/rk3328-evb.dts|   1 +
  arch/arm/dts/rk3328-rock64-u-boot.dtsi |   2 +
  arch/arm/dts/rk3328-sdram-ddr3-666.dtsi| 215 +
  arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi | 215 +
  arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi  | 215 +
  arch/arm/dts/rk3328.dtsi   |  11 +-
  6 files changed, 656 insertions(+), 3 deletions(-)
  create mode 100644 arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
  create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi
  create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index ec594a8452..3b01dd0a87 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -5,6 +5,7 @@
  
  /dts-v1/;

  #include "rk3328.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"



Please Add a "rk3328-evb-u-boot.dtsi" for evb and move all these dts

update including in next patch into the -u-boot.dtsi file.


Thanks,

- Kever

  
  / {

model = "Rockchip RK3328 EVB";
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi 
b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index b077436cbc..a01f758e9f 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -4,6 +4,8 @@
   * SPDX-License-Identifier: GPL-2.0+
   */
  
+#include "rk3328-sdram-lpddr3-1600.dtsi"

+
  / {
aliases {
mmc0 = &emmc;
diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi 
b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
new file mode 100644
index 00..d99e7e0352
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+&dmc {
+   rockchip,sdram-params = <
+   0x1
+   0xC
+   0x3
+   0x1
+   0x0
+   0x0
+   0x10
+   0x10
+   0
+
+   0x9028b189
+   0x
+   0x0021
+   0x0482
+   0x0015
+   0x0222
+   0x00ff
+
+   333
+   3
+   0
+
+   0x
+   0x43041001
+   0x0064
+   0x0028003b
+   0x00d0
+   0x00020053
+   0x00d4
+   0x0002
+   0x00d8
+   0x0100
+   0x00dc
+   0x0320
+   0x00e0
+   0x
+   0x00e4
+   0x0009
+   0x00f4
+   0x000f011f
+   0x0100
+   0x07090b06
+   0x0104
+   0x00050209
+   0x0108
+   0x03030407
+   0x010c
+   0x00202006
+   0x0110
+   0x03020204
+   0x0114
+   0x03030202
+   0x0120
+   0x0903
+   0x0180
+   0x00800020
+   0x0184
+   0x
+   0x0190
+   0x07010001
+   0x0198
+   0x05001100
+   0x01a0
+   0xc043
+   0x0240
+   0x06000604
+   0x0244
+   0x0201
+   0x0250
+   0x0f00
+   0x0490
+   0x0001
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+
+   0x0004
+   0x000a
+   0x0028
+   0x0006
+   0x002c
+   0x
+   0x0030
+   0x0005
+   0x
+   0x
+
+   0x77
+   0x88
+   0x79
+   0x79
+   0x87
+   0x97
+   0x87
+   0x78
+   0x77
+   0x78
+   0x87
+   0x88
+   0x87
+   0x87
+   0x77
+
+   0x78
+   0x78
+   0x78
+   0x78
+   0x78
+   0x78
+   0x7

Re: [U-Boot] [PATCH 0/7] Add TPL support for Pine64 Rock64 board.

[Kever Yang]

Hi Matwey,

    I was plan to send TPL support for RK3328 some time later, I'm so 
glad you help to make it done.



Thanks,

- Kever

On 2019/8/1 上午12:01, Matwey V. Kornilov wrote:

This series adds initial TPL support for Pine64 Rock64 board.

The ROCK64 is a credit card size SBC based on Rockchip RK3328 Quad-Core ARM 
Cortex A53.

The series has been tested with ATF v2.1.

Some patches in the series are taken from 
https://github.com/rockchip-linux/u-boot
Credits are given in each patch separately.

Kever Yang (5):
   rockchip: ram: add full feature rk3328 DRAM driver
   rockchip: dts: rk3328: update dmc node for driver
   rockchip: dts: rk3328: enable the drivers need by TPL/SPL
   rockchip: Kconfig: enable TPL support for rk3328
   rockchip: evb-rk3328: enable defconfig options for TPL/SPL

Matwey V. Kornilov (2):
   configs: rk3328: enable TPL for rock64-rk3328_defconfig
   doc: rockchip: Adapt Pine64 Rock64 board instructions

  arch/arm/dts/rk3328-evb.dts   |3 +
  arch/arm/dts/rk3328-rock64-u-boot.dtsi|2 +
  arch/arm/dts/rk3328-sdram-ddr3-666.dtsi   |  215 +
  arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi|  215 +
  arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi |  215 +
  arch/arm/dts/rk3328.dtsi  |   12 +-
  arch/arm/include/asm/arch-rockchip/sdram_rk3328.h |  441 +
  arch/arm/mach-rockchip/Kconfig|   21 +
  configs/evb-rk3328_defconfig  |   37 +-
  configs/rock64-rk3328_defconfig   |   14 +
  doc/README.rockchip   |   10 +-
  drivers/ram/rockchip/sdram_rk3328.c   | 1018 -
  12 files changed, 2187 insertions(+), 16 deletions(-)
  create mode 100644 arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
  create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi
  create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
  create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3328.h




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Re: [U-Boot] [BISECTED] [BUG]: MMC initialization hang at Zynq Z-turn board

[Peng Fan]

> Subject: [BISECTED] [BUG]: MMC initialization hang at Zynq Z-turn board
> 
> Hello,
> 
> I am running Zynq Z-turn board and I face the following issue with MMC
> initialization in SPL.
> With u-boot master, I see the message similar to the following:
> 
> U-Boot SPL 2019.07-00352-gb5f3eb3393 (Jul 31 2019 - 20:03:42 +0300) mmc
> boot Trying to boot from MMC1
> 
> Then, the u-boot waits forever. I've tried to add debug prints and found that
> execution is stalled somewhere inside mmc_init().
> Using bisect I've found that the following broken commit is the following:

https://gitlab.denx.de/u-boot/custodians/u-boot-mmc/commit/41a9fab8dac841afb70a059668abaf14d47cdf59

Would this patch help?

Regards,
Peng.

> 
> commit 3d296365e4e8823c7c0d4b568fa7accfae4bf895 (refs/bisect/bad)
> Author: Faiz Abbas 
> Date:   Tue Jun 11 00:43:34 2019 +0530
> 
> mmc: sdhci: Add support for sdhci-caps-mask
> 
> Add Support for masking some bits in the capabilities
> register of a host controller.
> 
> Also remove the redundant readl() into caps1.
> 
> Signed-off-by: Faiz Abbas 
> Reviewed-by: Tom Rini 
> 
> Until that commit the behavior was the following:
> 
> U-Boot SPL 2019.07-00351-g889a4dfc55 (Jul 31 2019 - 20:01:41 +0300) mmc
> boot Trying to boot from MMC1
> spl_load_image_fat_os: error reading image system.dtb, err - -2
> spl_load_image_fat: error reading image u-boot.img, err - -2
> SPL: failed to boot from all boot devices ### ERROR ### Please RESET the
> board ###
> 
> There were no u-boot.img at the SD card while testing, so this error message
> is expected here.
> 5456935a1da3 ("ARM: zynq: Add configuration for Z-turn board") was applied
> at the top of every testing commit to allow the board initialization in SPL.
> 
> What could be wrong with that commit and how could I fix the board?
> 
> --
> With best regards,
> Matwey V. Kornilov
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Re: [U-Boot] [PATCH 32/39] env: Rename the redundancy flags

[Joe Hershberger]

Hi Tom,

On Wed, Jul 31, 2019 at 7:53 PM Tom Rini  wrote:
>
> On Wed, Jul 31, 2019 at 09:20:58PM +, Joe Hershberger wrote:
> > On Wed, Jul 31, 2019 at 4:00 PM Simon Glass  wrote:
> > >
> > > Hi Joe,
> > >
> > > On Tue, 30 Jul 2019 at 15:42, Joe Hershberger  
> > > wrote:
> > > >
> > > > On Sun, Jul 28, 2019 at 9:27 AM Simon Glass  wrote:
> > > > >
> > > > > Add an ENV prefix to these two flags so that it is clear what they 
> > > > > relate
> > > > > to. Also move them to env.h since they are part of the public API. 
> > > > > Use an
> > > > > enum rather than a #define to tie them together.
> > > > >
> > > > > Signed-off-by: Simon Glass 
> > > > > ---
> > > > >
> > > > >  cmd/nvedit.c  |  2 +-
> > > > >  env/eeprom.c  | 10 ++
> > > > >  env/flash.c   | 18 ++
> > > > >  env/sf.c  |  6 ++
> > > > >  include/env.h |  6 ++
> > > > >  include/environment.h |  5 +
> > > > >  tools/env/fw_env.c| 23 +--
> > > > >  7 files changed, 39 insertions(+), 31 deletions(-)
> > > > >
> > > > > diff --git a/cmd/nvedit.c b/cmd/nvedit.c
> > > > > index 7908d6cf0c..d6a86abb03 100644
> > > > > --- a/cmd/nvedit.c
> > > > > +++ b/cmd/nvedit.c
> > > > > @@ -1014,7 +1014,7 @@ NXTARG:   ;
> > > > > envp->crc = crc32(0, envp->data,
> > > > > size ? size - offsetof(env_t, data) : 
> > > > > ENV_SIZE);
> > > > >  #ifdef CONFIG_ENV_ADDR_REDUND
> > > > > -   envp->flags = ACTIVE_FLAG;
> > > > > +   envp->flags = ENVF_REDUND_ACTIVE;
> > > > >  #endif
> > > > > }
> > > > > env_set_hex("filesize", len + offsetof(env_t, data));
> > > > > diff --git a/env/eeprom.c b/env/eeprom.c
> > > > > index 8d82cf892c..0c30ca459c 100644
> > > > > --- a/env/eeprom.c
> > > > > +++ b/env/eeprom.c
> > > > > @@ -132,9 +132,11 @@ static int env_eeprom_load(void)
> > > > > gd->env_valid = ENV_REDUND;
> > > > > } else {
> > > > > /* both ok - check serial */
> > > > > -   if (flags[0] == ACTIVE_FLAG && flags[1] == 
> > > > > OBSOLETE_FLAG)
> > > > > +   if (flags[0] == ENVF_REDUND_ACTIVE &&
> > > > > +   flags[1] == ENVF_REDUND_OBSOLETE)
> > > > > gd->env_valid = ENV_VALID;
> > > > > -   else if (flags[0] == OBSOLETE_FLAG && flags[1] == 
> > > > > ACTIVE_FLAG)
> > > > > +   else if (flags[0] == ENVF_REDUND_OBSOLETE &&
> > > > > +flags[1] == ENVF_REDUND_ACTIVE)
> > > > > gd->env_valid = ENV_REDUND;
> > > > > else if (flags[0] == 0xFF && flags[1] == 0)
> > > > > gd->env_valid = ENV_REDUND;
> > > > > @@ -194,7 +196,7 @@ static int env_eeprom_save(void)
> > > > > unsigned int off= CONFIG_ENV_OFFSET;
> > > > >  #ifdef CONFIG_ENV_OFFSET_REDUND
> > > > > unsigned int off_red= CONFIG_ENV_OFFSET_REDUND;
> > > > > -   char flag_obsolete  = OBSOLETE_FLAG;
> > > > > +   char flag_obsolete  = ENVF_REDUND_OBSOLETE;
> > > > >  #endif
> > > > >
> > > > > rc = env_export(&env_new);
> > > > > @@ -207,7 +209,7 @@ static int env_eeprom_save(void)
> > > > > off_red = CONFIG_ENV_OFFSET;
> > > > > }
> > > > >
> > > > > -   env_new.flags = ACTIVE_FLAG;
> > > > > +   env_new.flags = ENVF_REDUND_ACTIVE;
> > > > >  #endif
> > > > >
> > > > > rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
> > > > > diff --git a/env/flash.c b/env/flash.c
> > > > > index 7a73466cf2..9566dd7f05 100644
> > > > > --- a/env/flash.c
> > > > > +++ b/env/flash.c
> > > > > @@ -95,10 +95,12 @@ static int env_flash_init(void)
> > > > > } else if (!crc1_ok && !crc2_ok) {
> > > > > gd->env_addr= addr_default;
> > > > > gd->env_valid   = ENV_INVALID;
> > > > > -   } else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
> > > > > +   } else if (flag1 == ENVF_REDUND_ACTIVE &&
> > > > > +  flag2 == ENVF_REDUND_OBSOLETE) {
> > > > > gd->env_addr= addr1;
> > > > > gd->env_valid   = ENV_VALID;
> > > > > -   } else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
> > > > > +   } else if (flag1 == ENVF_REDUND_OBSOLETE &&
> > > > > +  flag2 == ENVF_REDUND_ACTIVE) {
> > > > > gd->env_addr= addr2;
> > > > > gd->env_valid   = ENV_VALID;
> > > > > } else if (flag1 == flag2) {
> > > > > @@ -121,7 +123,7 @@ static int env_flash_save(void)
> > > > >  {
> > > > > env_t   env_new;
> > > > > char*saved_data = NULL;
> > > > > -   charflag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
> > > > > +   charflag = ENVF_REDUND_OBSOLETE, new_flag = 
> > > > > ENVF_REDUND_ACTIVE;
> > > > > int rc = 1;
> > > > >  #if CONFIG_E

Re: [U-Boot] [PATCH 32/39] env: Rename the redundancy flags

[Tom Rini]

On Wed, Jul 31, 2019 at 09:20:58PM +, Joe Hershberger wrote:
> On Wed, Jul 31, 2019 at 4:00 PM Simon Glass  wrote:
> >
> > Hi Joe,
> >
> > On Tue, 30 Jul 2019 at 15:42, Joe Hershberger  
> > wrote:
> > >
> > > On Sun, Jul 28, 2019 at 9:27 AM Simon Glass  wrote:
> > > >
> > > > Add an ENV prefix to these two flags so that it is clear what they 
> > > > relate
> > > > to. Also move them to env.h since they are part of the public API. Use 
> > > > an
> > > > enum rather than a #define to tie them together.
> > > >
> > > > Signed-off-by: Simon Glass 
> > > > ---
> > > >
> > > >  cmd/nvedit.c  |  2 +-
> > > >  env/eeprom.c  | 10 ++
> > > >  env/flash.c   | 18 ++
> > > >  env/sf.c  |  6 ++
> > > >  include/env.h |  6 ++
> > > >  include/environment.h |  5 +
> > > >  tools/env/fw_env.c| 23 +--
> > > >  7 files changed, 39 insertions(+), 31 deletions(-)
> > > >
> > > > diff --git a/cmd/nvedit.c b/cmd/nvedit.c
> > > > index 7908d6cf0c..d6a86abb03 100644
> > > > --- a/cmd/nvedit.c
> > > > +++ b/cmd/nvedit.c
> > > > @@ -1014,7 +1014,7 @@ NXTARG:   ;
> > > > envp->crc = crc32(0, envp->data,
> > > > size ? size - offsetof(env_t, data) : 
> > > > ENV_SIZE);
> > > >  #ifdef CONFIG_ENV_ADDR_REDUND
> > > > -   envp->flags = ACTIVE_FLAG;
> > > > +   envp->flags = ENVF_REDUND_ACTIVE;
> > > >  #endif
> > > > }
> > > > env_set_hex("filesize", len + offsetof(env_t, data));
> > > > diff --git a/env/eeprom.c b/env/eeprom.c
> > > > index 8d82cf892c..0c30ca459c 100644
> > > > --- a/env/eeprom.c
> > > > +++ b/env/eeprom.c
> > > > @@ -132,9 +132,11 @@ static int env_eeprom_load(void)
> > > > gd->env_valid = ENV_REDUND;
> > > > } else {
> > > > /* both ok - check serial */
> > > > -   if (flags[0] == ACTIVE_FLAG && flags[1] == 
> > > > OBSOLETE_FLAG)
> > > > +   if (flags[0] == ENVF_REDUND_ACTIVE &&
> > > > +   flags[1] == ENVF_REDUND_OBSOLETE)
> > > > gd->env_valid = ENV_VALID;
> > > > -   else if (flags[0] == OBSOLETE_FLAG && flags[1] == 
> > > > ACTIVE_FLAG)
> > > > +   else if (flags[0] == ENVF_REDUND_OBSOLETE &&
> > > > +flags[1] == ENVF_REDUND_ACTIVE)
> > > > gd->env_valid = ENV_REDUND;
> > > > else if (flags[0] == 0xFF && flags[1] == 0)
> > > > gd->env_valid = ENV_REDUND;
> > > > @@ -194,7 +196,7 @@ static int env_eeprom_save(void)
> > > > unsigned int off= CONFIG_ENV_OFFSET;
> > > >  #ifdef CONFIG_ENV_OFFSET_REDUND
> > > > unsigned int off_red= CONFIG_ENV_OFFSET_REDUND;
> > > > -   char flag_obsolete  = OBSOLETE_FLAG;
> > > > +   char flag_obsolete  = ENVF_REDUND_OBSOLETE;
> > > >  #endif
> > > >
> > > > rc = env_export(&env_new);
> > > > @@ -207,7 +209,7 @@ static int env_eeprom_save(void)
> > > > off_red = CONFIG_ENV_OFFSET;
> > > > }
> > > >
> > > > -   env_new.flags = ACTIVE_FLAG;
> > > > +   env_new.flags = ENVF_REDUND_ACTIVE;
> > > >  #endif
> > > >
> > > > rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
> > > > diff --git a/env/flash.c b/env/flash.c
> > > > index 7a73466cf2..9566dd7f05 100644
> > > > --- a/env/flash.c
> > > > +++ b/env/flash.c
> > > > @@ -95,10 +95,12 @@ static int env_flash_init(void)
> > > > } else if (!crc1_ok && !crc2_ok) {
> > > > gd->env_addr= addr_default;
> > > > gd->env_valid   = ENV_INVALID;
> > > > -   } else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
> > > > +   } else if (flag1 == ENVF_REDUND_ACTIVE &&
> > > > +  flag2 == ENVF_REDUND_OBSOLETE) {
> > > > gd->env_addr= addr1;
> > > > gd->env_valid   = ENV_VALID;
> > > > -   } else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
> > > > +   } else if (flag1 == ENVF_REDUND_OBSOLETE &&
> > > > +  flag2 == ENVF_REDUND_ACTIVE) {
> > > > gd->env_addr= addr2;
> > > > gd->env_valid   = ENV_VALID;
> > > > } else if (flag1 == flag2) {
> > > > @@ -121,7 +123,7 @@ static int env_flash_save(void)
> > > >  {
> > > > env_t   env_new;
> > > > char*saved_data = NULL;
> > > > -   charflag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
> > > > +   charflag = ENVF_REDUND_OBSOLETE, new_flag = 
> > > > ENVF_REDUND_ACTIVE;
> > > > int rc = 1;
> > > >  #if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
> > > > ulong   up_data = 0;
> > > > @@ -322,9 +324,9 @@ static int env_flash_load(void)
> > > > end_addr_new = ltmp;
> > > > }
> > > >
> > > > -   if (flash_addr_new->flags != OBSOLETE_FLAG &&
> > > > +  

Re: [U-Boot] [RFC/RESEND 01/22] arm: introduce ARCH_THUNDERX

[Suneel Garapati]

Hi Matthias,

Hard deadline is Aug 15th, so you should see first series before that.

Regards,
Suneel

On Wed, Jul 24, 2019 at 3:30 AM Matthias Brugger  wrote:
>
> Hi Suneel,
> Hi Chandrakala,
>
> On 16/05/2019 19:07, Suneel Garapati wrote:
> > Hi Tim,
> >
> > Missed aggressive timeline, first RFC series should be out in three weeks
> > time as priority.
> >
>
> Any news on the patch set?
>
> Regards,
> Matthias
>
> > Regards,
> > Suneel
> >
> >
> > On Tue, May 7, 2019 at 8:10 AM Tim Harvey  wrote:
> >>
> >> On Fri, Mar 22, 2019 at 11:23 AM Suneel Garapati 
> > wrote:
> >>>
> >>> Hi Tim,
> >>>
> >>> First series will be out week ending April 20th.
> >>>
> >>> Regards,
> >>> Suneel
> >>
> >> Suneel,
> >>
> >> Any update on a Marvell submitted/maintained patch series for Octeon-TX
> > support?
> >>
> >> Best Regards,
> >>
> >> Tim
> > ___
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> >
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Re: [U-Boot] Hi, I am new to U-Boot, how do I get started?

[slahss ss]

Thanks Ramon.
A simple question in the first place. To port u-boot to a new SoC/board, do we 
have to have SRAM inside SoC to set up stack for c runtime, or only NORflash + 
SDRAM is OK too?


//slahs

From: Ramon Fried 
Sent: Sunday, July 28, 2019 9:58 PM
To: u-boot@lists.denx.de ; slahss ss 
; u-boot@lists.denx.de 
Subject: Re: [U-Boot] Hi, I am new to U-Boot, how do I get started?

You can start by asking a real question.
what are you trying to do?
Thanks, Ramon

On July 27, 2019 4:39:37 AM GMT+03:00, slahss ss  wrote:


U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

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Re: [U-Boot] [PATCH v1 0/9] apalis-tk1: fixes/updates for v2019.10

[Tom Warren]

The 'switch to zImage' patch fails to apply using git am, either in the 
complete (9-patch) bundle, or as part of the 5-patch Igor Opaniuk bundle, or 
even as a stand-alone patch.  This is using the current TOT u-boot-tegra/master.

Please ensure the entire bundle of Apalis-TK1 patches can be applied to 
u-boot-tegra/master.

Thanks,

Tom

--
nvpublic

-Original Message-
From: Igor Opaniuk  
Sent: Wednesday, July 31, 2019 5:05 AM
To: u-boot@lists.denx.de
Cc: Marcel Ziswiler ; Philippe Schenker 
; Oleksandr Suvorov 
; Dominik Sliwa ; 
Igor Opaniuk ; Albert Aribaud 
; Igor Opaniuk ; Tom 
Warren 
Subject: [PATCH v1 0/9] apalis-tk1: fixes/updates for v2019.10

Misc. fixes related to pinmux configuration (fan), default bootargs, reset 
reason output and power rail configuration.

Dominik Sliwa (2):
  apalis-tk1/t30: colibri_t30: display reset reason
  apalis-tk1: remove non-esential power rails on boot

Igor Opaniuk (5):
  apalis-tk1: set apalis gpio 8 aka fan_en
  apalis-tk1: provide proper USB vendor id
  apalis-tk1: enable user debug by default
  apalis-tk1: add pcie_aspm=off to defargs
  apalis-tk1: switch to zImage

Marcel Ziswiler (2):
  apalis-tk1: do not explicitly release reset_moci#
  apalis-tk1: remove default vesa vga mode from vidargs

 arch/arm/mach-tegra/sys_info.c| 32 -
 arch/arm/mach-tegra/tegra124/cpu.c| 45 +++
 board/toradex/apalis-tk1/apalis-tk1.c | 10 +
 board/toradex/apalis-tk1/as3722_init.c| 23 ++
 .../apalis-tk1/pinmux-config-apalis-tk1.h |  2 +-
 configs/apalis-tk1_defconfig  |  2 +-
 include/configs/apalis-tk1.h  | 17 +++
 7 files changed, 111 insertions(+), 20 deletions(-)

--
2.17.1

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Re: [U-Boot] [PATCH 31/39] env: Drop _ENTRY

[Joe Hershberger]

On Wed, Jul 31, 2019 at 4:56 PM Simon Glass  wrote:
>
> Hi,
>
> On Wed, 31 Jul 2019 at 15:07, Joe Hershberger  wrote:
> >
> > On Wed, Jul 31, 2019 at 3:57 PM Simon Glass  wrote:
> > >
> > > Hi Joe,
> > >
> > > On Tue, 30 Jul 2019 at 15:35, Joe Hershberger  
> > > wrote:
> > > >
> > > > On Sun, Jul 28, 2019 at 9:28 AM Simon Glass  wrote:
> > > > >
> > > > > This typedef does not need to be defined in the search.h header since 
> > > > > it
> > > > > is only used in one file (hashtable.c). Remove it from the header and
> > > > > change it to a struct.
> > > > >
> > > > > Signed-off-by: Simon Glass 
> > > > > ---
> > > > >
> > > > >  include/search.h | 2 +-
> > > > >  lib/hashtable.c  | 7 ---
> > > > >  2 files changed, 5 insertions(+), 4 deletions(-)
> > > > >
> > > > > diff --git a/include/search.h b/include/search.h
> > > > > index efa8bcbef6..c99648f80b 100644
> > > > > --- a/include/search.h
> > > > > +++ b/include/search.h
> > > > > @@ -42,7 +42,7 @@ struct env_entry {
> > > > >
> > > > >  /* Data type for reentrant functions.  */
> > > > >  struct hsearch_data {
> > > > > -   struct _ENTRY *table;
> > > > > +   struct env_entry_node *table;
> > > >
> > > > Don't you need an opaque definition of this?
> > >
> > > I don't see why. We can just use struct env_entry_node which is opaque
> > > if the definition is not available.
> >
> > I agree, but doesn't it need to be defined? Maybe the misunderstanding
> > is happening because of the intermediate state of things through out
> > this series.
>
> (yes, I had trouble figuring out how to split this series up so people
> could actually review it!)

Well, I think you did a fantastic job at it.

>
> I don't think it needs to be defined separate here, since it is not in
> a function scope, so mentioning it inside a struct seems to work OK.

Sounds good to me, if it works!

> >
> > >
> > > >
> > > > Also, there is an opaque definition of _ENTRY in this file that needs
> > > > to go away.
> > >
> > > Where is that? I can't see it.
> >
> > I'm looking at master... "include/search.h" line 42 of 123
>
> OK, I see. That is removed in the previous patch "env: Drop the ENTRY typdef"

Ah, ok... It would be better to group it with this patch since _ENTRY
shouldn't be related to ENTRY.

>
> Regards,
> Simon
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Re: [U-Boot] [PATCH 31/39] env: Drop _ENTRY

[Simon Glass]

Hi,

On Wed, 31 Jul 2019 at 15:07, Joe Hershberger  wrote:
>
> On Wed, Jul 31, 2019 at 3:57 PM Simon Glass  wrote:
> >
> > Hi Joe,
> >
> > On Tue, 30 Jul 2019 at 15:35, Joe Hershberger  
> > wrote:
> > >
> > > On Sun, Jul 28, 2019 at 9:28 AM Simon Glass  wrote:
> > > >
> > > > This typedef does not need to be defined in the search.h header since it
> > > > is only used in one file (hashtable.c). Remove it from the header and
> > > > change it to a struct.
> > > >
> > > > Signed-off-by: Simon Glass 
> > > > ---
> > > >
> > > >  include/search.h | 2 +-
> > > >  lib/hashtable.c  | 7 ---
> > > >  2 files changed, 5 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/include/search.h b/include/search.h
> > > > index efa8bcbef6..c99648f80b 100644
> > > > --- a/include/search.h
> > > > +++ b/include/search.h
> > > > @@ -42,7 +42,7 @@ struct env_entry {
> > > >
> > > >  /* Data type for reentrant functions.  */
> > > >  struct hsearch_data {
> > > > -   struct _ENTRY *table;
> > > > +   struct env_entry_node *table;
> > >
> > > Don't you need an opaque definition of this?
> >
> > I don't see why. We can just use struct env_entry_node which is opaque
> > if the definition is not available.
>
> I agree, but doesn't it need to be defined? Maybe the misunderstanding
> is happening because of the intermediate state of things through out
> this series.

(yes, I had trouble figuring out how to split this series up so people
could actually review it!)

I don't think it needs to be defined separate here, since it is not in
a function scope, so mentioning it inside a struct seems to work OK.

>
> >
> > >
> > > Also, there is an opaque definition of _ENTRY in this file that needs
> > > to go away.
> >
> > Where is that? I can't see it.
>
> I'm looking at master... "include/search.h" line 42 of 123

OK, I see. That is removed in the previous patch "env: Drop the ENTRY typdef"

Regards,
Simon
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[U-Boot] [PATCH v3] dm: core: device: switch off power domain after device removal

[Anatolij Gustschin]

The power domain associated with a device is enabled when probing,
but currently the domain remains enabled when the device is removed.
Some boards started to disable power domains for selected devices
via custom board_quiesce_devices(), but it doesn't work in many
cases, i. e. because devices still can be accessed later in
.remove() callback on behalf of dm_remove_devices_flags().

Utilize the DM core to power off the device power domain, but add a
device flag to be able to selectively let the power domain enabled
after device removal. This might be required for devices that must
remain enabled when booting OS, i. e. serial console for debug
output, etc.

Signed-off-by: Anatolij Gustschin 
---
Changes in v3:
 - remove 'power-domain' device to fix dm power-domain test (make qcheck)
 - don't switch off the power domain for current console device

Changes in v2:
 - use CONFIG_IS_ENABLED(POWER_DOMAIN) to reduce code size

 drivers/core/device-remove.c | 18 ++
 include/dm/device.h  |  6 ++
 2 files changed, 24 insertions(+)

diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index 586fadee0a..5a0e48e182 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 int device_chld_unbind(struct udevice *dev, struct driver *drv)
 {
@@ -155,6 +156,7 @@ static bool flags_remove(uint flags, uint drv_flags)
 int device_remove(struct udevice *dev, uint flags)
 {
const struct driver *drv;
+   struct power_domain pd;
int ret;
 
if (!dev)
@@ -192,6 +194,22 @@ int device_remove(struct udevice *dev, uint flags)
}
}
 
+   if (CONFIG_IS_ENABLED(POWER_DOMAIN) && dev->parent &&
+   device_get_uclass_id(dev) != UCLASS_POWER_DOMAIN &&
+   dev != gd->cur_serial_dev &&
+   !(dev->flags & DM_FLAG_REMOVE_WITH_PD_ON)) {
+   if (!power_domain_get(dev, &pd)) {
+   power_domain_off(&pd);
+   /*
+* power_domain_get() bound the device, thus
+* we must remove it again to prevent unbinding
+* active devices (which would result in unbind
+* error).
+*/
+   device_remove(pd.dev, DM_REMOVE_NORMAL);
+   }
+   }
+
if (flags_remove(flags, drv->flags)) {
device_free(dev);
 
diff --git a/include/dm/device.h b/include/dm/device.h
index 27a6d7b9fd..9a98a4a39e 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -61,6 +61,12 @@ struct driver_info;
  */
 #define DM_FLAG_OS_PREPARE (1 << 10)
 
+/*
+ * Device is removed without switching off its power domain. This might
+ * be required, i. e. for serial console (debug) output when booting OS.
+ */
+#define DM_FLAG_REMOVE_WITH_PD_ON  (1 << 11)
+
 /*
  * One or multiple of these flags are passed to device_remove() so that
  * a selective device removal as specified by the remove-stage and the
-- 
2.17.1

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Re: [U-Boot] [PATCH 32/39] env: Rename the redundancy flags

[Joe Hershberger]

On Wed, Jul 31, 2019 at 4:00 PM Simon Glass  wrote:
>
> Hi Joe,
>
> On Tue, 30 Jul 2019 at 15:42, Joe Hershberger  wrote:
> >
> > On Sun, Jul 28, 2019 at 9:27 AM Simon Glass  wrote:
> > >
> > > Add an ENV prefix to these two flags so that it is clear what they relate
> > > to. Also move them to env.h since they are part of the public API. Use an
> > > enum rather than a #define to tie them together.
> > >
> > > Signed-off-by: Simon Glass 
> > > ---
> > >
> > >  cmd/nvedit.c  |  2 +-
> > >  env/eeprom.c  | 10 ++
> > >  env/flash.c   | 18 ++
> > >  env/sf.c  |  6 ++
> > >  include/env.h |  6 ++
> > >  include/environment.h |  5 +
> > >  tools/env/fw_env.c| 23 +--
> > >  7 files changed, 39 insertions(+), 31 deletions(-)
> > >
> > > diff --git a/cmd/nvedit.c b/cmd/nvedit.c
> > > index 7908d6cf0c..d6a86abb03 100644
> > > --- a/cmd/nvedit.c
> > > +++ b/cmd/nvedit.c
> > > @@ -1014,7 +1014,7 @@ NXTARG:   ;
> > > envp->crc = crc32(0, envp->data,
> > > size ? size - offsetof(env_t, data) : 
> > > ENV_SIZE);
> > >  #ifdef CONFIG_ENV_ADDR_REDUND
> > > -   envp->flags = ACTIVE_FLAG;
> > > +   envp->flags = ENVF_REDUND_ACTIVE;
> > >  #endif
> > > }
> > > env_set_hex("filesize", len + offsetof(env_t, data));
> > > diff --git a/env/eeprom.c b/env/eeprom.c
> > > index 8d82cf892c..0c30ca459c 100644
> > > --- a/env/eeprom.c
> > > +++ b/env/eeprom.c
> > > @@ -132,9 +132,11 @@ static int env_eeprom_load(void)
> > > gd->env_valid = ENV_REDUND;
> > > } else {
> > > /* both ok - check serial */
> > > -   if (flags[0] == ACTIVE_FLAG && flags[1] == OBSOLETE_FLAG)
> > > +   if (flags[0] == ENVF_REDUND_ACTIVE &&
> > > +   flags[1] == ENVF_REDUND_OBSOLETE)
> > > gd->env_valid = ENV_VALID;
> > > -   else if (flags[0] == OBSOLETE_FLAG && flags[1] == 
> > > ACTIVE_FLAG)
> > > +   else if (flags[0] == ENVF_REDUND_OBSOLETE &&
> > > +flags[1] == ENVF_REDUND_ACTIVE)
> > > gd->env_valid = ENV_REDUND;
> > > else if (flags[0] == 0xFF && flags[1] == 0)
> > > gd->env_valid = ENV_REDUND;
> > > @@ -194,7 +196,7 @@ static int env_eeprom_save(void)
> > > unsigned int off= CONFIG_ENV_OFFSET;
> > >  #ifdef CONFIG_ENV_OFFSET_REDUND
> > > unsigned int off_red= CONFIG_ENV_OFFSET_REDUND;
> > > -   char flag_obsolete  = OBSOLETE_FLAG;
> > > +   char flag_obsolete  = ENVF_REDUND_OBSOLETE;
> > >  #endif
> > >
> > > rc = env_export(&env_new);
> > > @@ -207,7 +209,7 @@ static int env_eeprom_save(void)
> > > off_red = CONFIG_ENV_OFFSET;
> > > }
> > >
> > > -   env_new.flags = ACTIVE_FLAG;
> > > +   env_new.flags = ENVF_REDUND_ACTIVE;
> > >  #endif
> > >
> > > rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
> > > diff --git a/env/flash.c b/env/flash.c
> > > index 7a73466cf2..9566dd7f05 100644
> > > --- a/env/flash.c
> > > +++ b/env/flash.c
> > > @@ -95,10 +95,12 @@ static int env_flash_init(void)
> > > } else if (!crc1_ok && !crc2_ok) {
> > > gd->env_addr= addr_default;
> > > gd->env_valid   = ENV_INVALID;
> > > -   } else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
> > > +   } else if (flag1 == ENVF_REDUND_ACTIVE &&
> > > +  flag2 == ENVF_REDUND_OBSOLETE) {
> > > gd->env_addr= addr1;
> > > gd->env_valid   = ENV_VALID;
> > > -   } else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
> > > +   } else if (flag1 == ENVF_REDUND_OBSOLETE &&
> > > +  flag2 == ENVF_REDUND_ACTIVE) {
> > > gd->env_addr= addr2;
> > > gd->env_valid   = ENV_VALID;
> > > } else if (flag1 == flag2) {
> > > @@ -121,7 +123,7 @@ static int env_flash_save(void)
> > >  {
> > > env_t   env_new;
> > > char*saved_data = NULL;
> > > -   charflag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
> > > +   charflag = ENVF_REDUND_OBSOLETE, new_flag = 
> > > ENVF_REDUND_ACTIVE;
> > > int rc = 1;
> > >  #if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
> > > ulong   up_data = 0;
> > > @@ -322,9 +324,9 @@ static int env_flash_load(void)
> > > end_addr_new = ltmp;
> > > }
> > >
> > > -   if (flash_addr_new->flags != OBSOLETE_FLAG &&
> > > +   if (flash_addr_new->flags != ENVF_REDUND_OBSOLETE &&
> > > crc32(0, flash_addr_new->data, ENV_SIZE) == 
> > > flash_addr_new->crc) {
> > > -   char flag = OBSOLETE_FLAG;
> > > +   char flag = ENVF_REDUND_OBSOLETE;
> > >
> > > gd->env_valid = ENV_REDUND;
> > > 

Re: [U-Boot] [PATCH 31/39] env: Drop _ENTRY

[Joe Hershberger]

On Wed, Jul 31, 2019 at 3:57 PM Simon Glass  wrote:
>
> Hi Joe,
>
> On Tue, 30 Jul 2019 at 15:35, Joe Hershberger  wrote:
> >
> > On Sun, Jul 28, 2019 at 9:28 AM Simon Glass  wrote:
> > >
> > > This typedef does not need to be defined in the search.h header since it
> > > is only used in one file (hashtable.c). Remove it from the header and
> > > change it to a struct.
> > >
> > > Signed-off-by: Simon Glass 
> > > ---
> > >
> > >  include/search.h | 2 +-
> > >  lib/hashtable.c  | 7 ---
> > >  2 files changed, 5 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/include/search.h b/include/search.h
> > > index efa8bcbef6..c99648f80b 100644
> > > --- a/include/search.h
> > > +++ b/include/search.h
> > > @@ -42,7 +42,7 @@ struct env_entry {
> > >
> > >  /* Data type for reentrant functions.  */
> > >  struct hsearch_data {
> > > -   struct _ENTRY *table;
> > > +   struct env_entry_node *table;
> >
> > Don't you need an opaque definition of this?
>
> I don't see why. We can just use struct env_entry_node which is opaque
> if the definition is not available.

I agree, but doesn't it need to be defined? Maybe the misunderstanding
is happening because of the intermediate state of things through out
this series.

>
> >
> > Also, there is an opaque definition of _ENTRY in this file that needs
> > to go away.
>
> Where is that? I can't see it.

I'm looking at master... "include/search.h" line 42 of 123

>
> >
> > > unsigned int size;
> > > unsigned int filled;
> > >  /*
> > > diff --git a/lib/hashtable.c b/lib/hashtable.c
> > > index c77b68f4e6..1093d8adaa 100644
> > > --- a/lib/hashtable.c
> > > +++ b/lib/hashtable.c
> > > @@ -59,10 +59,10 @@
> > >   * which describes the current status.
> > >   */
> > >
> > > -typedef struct _ENTRY {
> > > +struct env_entry_node {
> > > int used;
> > > struct env_entry entry;
> > > -} _ENTRY;
> > > +};
> > >
> > >
> > >  static void _hdelete(const char *key, struct hsearch_data *htab,
> > > @@ -120,7 +120,8 @@ int hcreate_r(size_t nel, struct hsearch_data *htab)
> > > htab->filled = 0;
> > >
> > > /* allocate memory and zero out */
> > > -   htab->table = (_ENTRY *) calloc(htab->size + 1, sizeof(_ENTRY));
> > > +   htab->table = (struct env_entry_node *)calloc(htab->size + 1,
> > > +   sizeof(struct 
> > > env_entry_node));
> > > if (htab->table == NULL)
> > > return 0;
> > >
> > > --
> > > 2.22.0.709.g102302147b-goog
> > >
>
> Regards,
> Simon
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Re: [U-Boot] [PATCH 32/39] env: Rename the redundancy flags

[Simon Glass]

Hi Joe,

On Tue, 30 Jul 2019 at 15:42, Joe Hershberger  wrote:
>
> On Sun, Jul 28, 2019 at 9:27 AM Simon Glass  wrote:
> >
> > Add an ENV prefix to these two flags so that it is clear what they relate
> > to. Also move them to env.h since they are part of the public API. Use an
> > enum rather than a #define to tie them together.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >  cmd/nvedit.c  |  2 +-
> >  env/eeprom.c  | 10 ++
> >  env/flash.c   | 18 ++
> >  env/sf.c  |  6 ++
> >  include/env.h |  6 ++
> >  include/environment.h |  5 +
> >  tools/env/fw_env.c| 23 +--
> >  7 files changed, 39 insertions(+), 31 deletions(-)
> >
> > diff --git a/cmd/nvedit.c b/cmd/nvedit.c
> > index 7908d6cf0c..d6a86abb03 100644
> > --- a/cmd/nvedit.c
> > +++ b/cmd/nvedit.c
> > @@ -1014,7 +1014,7 @@ NXTARG:   ;
> > envp->crc = crc32(0, envp->data,
> > size ? size - offsetof(env_t, data) : 
> > ENV_SIZE);
> >  #ifdef CONFIG_ENV_ADDR_REDUND
> > -   envp->flags = ACTIVE_FLAG;
> > +   envp->flags = ENVF_REDUND_ACTIVE;
> >  #endif
> > }
> > env_set_hex("filesize", len + offsetof(env_t, data));
> > diff --git a/env/eeprom.c b/env/eeprom.c
> > index 8d82cf892c..0c30ca459c 100644
> > --- a/env/eeprom.c
> > +++ b/env/eeprom.c
> > @@ -132,9 +132,11 @@ static int env_eeprom_load(void)
> > gd->env_valid = ENV_REDUND;
> > } else {
> > /* both ok - check serial */
> > -   if (flags[0] == ACTIVE_FLAG && flags[1] == OBSOLETE_FLAG)
> > +   if (flags[0] == ENVF_REDUND_ACTIVE &&
> > +   flags[1] == ENVF_REDUND_OBSOLETE)
> > gd->env_valid = ENV_VALID;
> > -   else if (flags[0] == OBSOLETE_FLAG && flags[1] == 
> > ACTIVE_FLAG)
> > +   else if (flags[0] == ENVF_REDUND_OBSOLETE &&
> > +flags[1] == ENVF_REDUND_ACTIVE)
> > gd->env_valid = ENV_REDUND;
> > else if (flags[0] == 0xFF && flags[1] == 0)
> > gd->env_valid = ENV_REDUND;
> > @@ -194,7 +196,7 @@ static int env_eeprom_save(void)
> > unsigned int off= CONFIG_ENV_OFFSET;
> >  #ifdef CONFIG_ENV_OFFSET_REDUND
> > unsigned int off_red= CONFIG_ENV_OFFSET_REDUND;
> > -   char flag_obsolete  = OBSOLETE_FLAG;
> > +   char flag_obsolete  = ENVF_REDUND_OBSOLETE;
> >  #endif
> >
> > rc = env_export(&env_new);
> > @@ -207,7 +209,7 @@ static int env_eeprom_save(void)
> > off_red = CONFIG_ENV_OFFSET;
> > }
> >
> > -   env_new.flags = ACTIVE_FLAG;
> > +   env_new.flags = ENVF_REDUND_ACTIVE;
> >  #endif
> >
> > rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
> > diff --git a/env/flash.c b/env/flash.c
> > index 7a73466cf2..9566dd7f05 100644
> > --- a/env/flash.c
> > +++ b/env/flash.c
> > @@ -95,10 +95,12 @@ static int env_flash_init(void)
> > } else if (!crc1_ok && !crc2_ok) {
> > gd->env_addr= addr_default;
> > gd->env_valid   = ENV_INVALID;
> > -   } else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
> > +   } else if (flag1 == ENVF_REDUND_ACTIVE &&
> > +  flag2 == ENVF_REDUND_OBSOLETE) {
> > gd->env_addr= addr1;
> > gd->env_valid   = ENV_VALID;
> > -   } else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
> > +   } else if (flag1 == ENVF_REDUND_OBSOLETE &&
> > +  flag2 == ENVF_REDUND_ACTIVE) {
> > gd->env_addr= addr2;
> > gd->env_valid   = ENV_VALID;
> > } else if (flag1 == flag2) {
> > @@ -121,7 +123,7 @@ static int env_flash_save(void)
> >  {
> > env_t   env_new;
> > char*saved_data = NULL;
> > -   charflag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
> > +   charflag = ENVF_REDUND_OBSOLETE, new_flag = ENVF_REDUND_ACTIVE;
> > int rc = 1;
> >  #if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
> > ulong   up_data = 0;
> > @@ -322,9 +324,9 @@ static int env_flash_load(void)
> > end_addr_new = ltmp;
> > }
> >
> > -   if (flash_addr_new->flags != OBSOLETE_FLAG &&
> > +   if (flash_addr_new->flags != ENVF_REDUND_OBSOLETE &&
> > crc32(0, flash_addr_new->data, ENV_SIZE) == 
> > flash_addr_new->crc) {
> > -   char flag = OBSOLETE_FLAG;
> > +   char flag = ENVF_REDUND_OBSOLETE;
> >
> > gd->env_valid = ENV_REDUND;
> > flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new);
> > @@ -334,9 +336,9 @@ static int env_flash_load(void)
> > flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new);
> > }
> >
> > -   if (flash_addr->flags != ACTIVE_FLAG &&
> > - 

[U-Boot] ARM: imx6: Add support for SD/MMC Manufacture Mode

[Jay Carlson]

Newer i.MX6 devices support booting from uSDHC1 if the boot fuses
haven't been configured. Since we already check for serial download
mode, this change won't break unfused i.MX6 devices that don't support
this feature and would have ended up in Serial Download mode. The
caveat is that we can't have an active USB connection *and* try to use
this mode at the same time since the existing SPL code will assume
we're in Serial Download mode, when it is actually SD/MMC Manufacture
Mode that the boot ROM attempts first.

Signed-off-by: Jay Carlson 
---
arch/arm/mach-imx/spl.c | 19 +++
1 file changed, 19 insertions(+)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 9f1e0f6a72..afde33a2cc 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -44,6 +44,25 @@ u32 spl_boot_device(void)
   if (is_usbotg_phy_active())
   return BOOT_DEVICE_BOARD;
+   /**
+* To support SD/MMC Manufacture Mode found on some i.MX6 parts,
+* we check that BOOT_MODE == 0 and that BT_FUSE_SEL == 0.
+* These will be nonzero if the BMODE has actually been programmed,
+* so we'll skip to the actual Boot Configuration check next. We don't
+* need to check if this particular i.MX6 supports this mode, or whether
+* the user blew DISABLE_SDMMC_MFG or if SDMMC MFG mode failed,
+* since the only way we'd be running with unprogrammed fuses would
+* would have been through Serial mode, which we check above.
+*
+* Technically, the boot ROM on supported devices attempts this mode
+* before moving onto the serial downloader, but there's no documented
+* way of detecting we're in this mode. As a caveat, to use this mode
+* the user must not have a USB connection active otherwise we'll think
+* we're in serial download mode.
+*/
+   if (((bmode >> 24) & 0x03) == 0x00 && (bmode >> 4) == 0x00)
+   return BOOT_DEVICE_MMC1;
+
   /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
   switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
/* EIM: See 8.5.1, Table 8-9 */
-- 
2.17.1.windows.2
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Re: [U-Boot] [PATCH 31/39] env: Drop _ENTRY

[Simon Glass]

Hi Joe,

On Tue, 30 Jul 2019 at 15:35, Joe Hershberger  wrote:
>
> On Sun, Jul 28, 2019 at 9:28 AM Simon Glass  wrote:
> >
> > This typedef does not need to be defined in the search.h header since it
> > is only used in one file (hashtable.c). Remove it from the header and
> > change it to a struct.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >  include/search.h | 2 +-
> >  lib/hashtable.c  | 7 ---
> >  2 files changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/include/search.h b/include/search.h
> > index efa8bcbef6..c99648f80b 100644
> > --- a/include/search.h
> > +++ b/include/search.h
> > @@ -42,7 +42,7 @@ struct env_entry {
> >
> >  /* Data type for reentrant functions.  */
> >  struct hsearch_data {
> > -   struct _ENTRY *table;
> > +   struct env_entry_node *table;
>
> Don't you need an opaque definition of this?

I don't see why. We can just use struct env_entry_node which is opaque
if the definition is not available.

>
> Also, there is an opaque definition of _ENTRY in this file that needs
> to go away.

Where is that? I can't see it.

>
> > unsigned int size;
> > unsigned int filled;
> >  /*
> > diff --git a/lib/hashtable.c b/lib/hashtable.c
> > index c77b68f4e6..1093d8adaa 100644
> > --- a/lib/hashtable.c
> > +++ b/lib/hashtable.c
> > @@ -59,10 +59,10 @@
> >   * which describes the current status.
> >   */
> >
> > -typedef struct _ENTRY {
> > +struct env_entry_node {
> > int used;
> > struct env_entry entry;
> > -} _ENTRY;
> > +};
> >
> >
> >  static void _hdelete(const char *key, struct hsearch_data *htab,
> > @@ -120,7 +120,8 @@ int hcreate_r(size_t nel, struct hsearch_data *htab)
> > htab->filled = 0;
> >
> > /* allocate memory and zero out */
> > -   htab->table = (_ENTRY *) calloc(htab->size + 1, sizeof(_ENTRY));
> > +   htab->table = (struct env_entry_node *)calloc(htab->size + 1,
> > +   sizeof(struct 
> > env_entry_node));
> > if (htab->table == NULL)
> > return 0;
> >
> > --
> > 2.22.0.709.g102302147b-goog
> >

Regards,
Simon
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[U-Boot] [PULL u-boot] Please pull u-boot-amlogic-20190731

[Neil Armstrong]

Hi Tom,

This PR adds support for the Odroid-N2 board and sync the Amlogic G12A DT
with Linux 5.3-rc1, removing the local DT in -u-boot.dtsi files.
It also includes the last minute fix from Heinrich in the gxbb clock driver.

The CI jobs passed at 
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic/pipelines/376

Thanks,
Neil

The following changes since commit d0d07ba86afc8074d79e436b1ba4478fa0f0c1b5:

  Prepare v2019.10-rc1 (2019-07-29 21:16:16 -0400)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git 
tags/u-boot-amlogic-20190731

for you to fetch changes up to 0c0cdc86103a1f579cb9f86a3c7c076abb383542:

  clk: meson: remove duplicate logic (2019-07-31 12:11:04 +0200)


- sync Amlogic G12A DT with linux 5.3-rc1
- add support for 4GiB DRAM memory
- add support for Amlogic G12B based Odroid-N2
- small duplicate logic fix for gxbb clock driver


Heinrich Schuchardt (1):
  clk: meson: remove duplicate logic

Neil Armstrong (4):
  ARM: dts: Sync Amlogic G12A with Linux 5.3-rc1
  ARM: dts: add support for Odroid-N2
  ARM: meson-g12a: Handle 4GiB DRAM size
  board: amlogic: add support for Odroid-N2

 arch/arm/dts/Makefile   |3 +-
 arch/arm/dts/meson-g12a-u-boot.dtsi |  216 ---
 arch/arm/dts/meson-g12a-u200-u-boot.dtsi|   63 -
 arch/arm/dts/meson-g12a-u200.dts|  122 +-
 arch/arm/dts/meson-g12a.dtsi| 1825 ++-
 arch/arm/dts/meson-g12b-odroid-n2.dts   |  386 +
 arch/arm/dts/meson-g12b.dtsi|   82 +
 arch/arm/mach-meson/board-g12a.c|   13 +-
 board/amlogic/w400/MAINTAINERS  |6 +
 board/amlogic/w400/Makefile |6 +
 board/amlogic/w400/README.odroid-n2 |  130 ++
 board/amlogic/w400/README.w400  |  130 ++
 board/amlogic/w400/w400.c   |   18 +
 configs/odroid-n2_defconfig |   56 +
 drivers/clk/meson/gxbb.c|5 +-
 include/dt-bindings/clock/axg-aoclkc.h  |7 +-
 include/dt-bindings/clock/axg-audio-clkc.h  |   30 +-
 include/dt-bindings/clock/g12a-clkc.h   |3 +-
 include/dt-bindings/sound/meson-g12a-tohdmitx.h |   13 +
 19 files changed, 2765 insertions(+), 349 deletions(-)
 delete mode 100644 arch/arm/dts/meson-g12a-u-boot.dtsi
 delete mode 100644 arch/arm/dts/meson-g12a-u200-u-boot.dtsi
 create mode 100644 arch/arm/dts/meson-g12b-odroid-n2.dts
 create mode 100644 arch/arm/dts/meson-g12b.dtsi
 create mode 100644 board/amlogic/w400/MAINTAINERS
 create mode 100644 board/amlogic/w400/Makefile
 create mode 100644 board/amlogic/w400/README.odroid-n2
 create mode 100644 board/amlogic/w400/README.w400
 create mode 100644 board/amlogic/w400/w400.c
 create mode 100644 configs/odroid-n2_defconfig
 create mode 100644 include/dt-bindings/sound/meson-g12a-tohdmitx.h
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[U-Boot] [PATCH] ARM: omap3: overo: Fix MMC init for SPL

[anselm . busse]

From: Anselm Busse 

The SPL for the Overo board does not initialise the MMC. Hence, it cannot load 
the main boot loader from the SD card susequently. This Patch moves the 
initialisation code for the MMC so it gets included in the SPL.

---
 board/overo/common.c | 25 +
 board/overo/overo.c  | 14 --
 2 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/board/overo/common.c b/board/overo/common.c
index fc02d66d53..851f55d43c 100644
--- a/board/overo/common.c
+++ b/board/overo/common.c
@@ -38,6 +38,31 @@ int board_init(void)
return 0;
 }
 
+#if defined(CONFIG_MMC)
+int board_mmc_init(bd_t *bis)
+{
+   return omap_mmc_init(0, 0, 0, -1, -1);
+}
+#endif
+
+#if defined(CONFIG_MMC)
+void board_mmc_power_init(void)
+{
+   twl4030_power_mmc_init(0);
+}
+#endif
+
+#if defined(CONFIG_SPL_OS_BOOT)
+int spl_start_uboot(void)
+{
+   /* break into full u-boot on 'c' */
+   if (serial_tstc() && serial_getc() == 'c')
+   return 1;
+
+   return 0;
+}
+#endif /* CONFIG_SPL_OS_BOOT */
+
 #define MUX_OVERO() \
  /*SDRC*/\
MUX_VAL(CP(SDRC_D0),(IEN  | PTD | DIS | M0)) /*SDRC_D0*/\
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 8fa41f8155..3d57f945f4 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -376,20 +376,6 @@ int board_eth_init(bd_t *bis)
 }
 #endif
 
-#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
-{
-   return omap_mmc_init(0, 0, 0, -1, -1);
-}
-#endif
-
-#if defined(CONFIG_MMC)
-void board_mmc_power_init(void)
-{
-   twl4030_power_mmc_init(0);
-}
-#endif
-
 #if defined(CONFIG_USB_EHCI_HCD)
 static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
-- 
2.22.0

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Re: [U-Boot] (Offlist) Re: U-Boot/EBBR plugfest at ELC-EU?

[Daniel Kiper]

On Tue, Jul 30, 2019 at 03:33:27PM +, Grant Likely wrote:
> >> On 24 Jul 2019, at 14:39, Daniel Kiper  wrote:
> >>> On Mon, Jul 08, 2019 at 01:27:11PM +, Steve McIntyre wrote:
> >>> On Mon, Jul 08, 2019 at 11:18:56AM +0100, Leif Lindholm wrote:
> >>> On Mon, Jul 08, 2019 at 12:13:07PM +0200, Daniel Kiper wrote:
> > I don't know yet - UEFI Asia plugfest date hasn't been decided yet,
> > and is likely to end up around the same time. And actually another
> > unrelated event too.
> >
> > Certainly, Lyon is a quite convenient train journey from here :)
> >
> > But I'm also happy to look into GRUB issues on 32-bit systems remotely
> > if someone could point me at them.
> 
>  I am not planning to be at ELC-E but I can help remotely if it is
>  needed. However, there is another option. There is pretty good chance
>  that I will get a MC slot at LPC. I am looking for people who want to
>  talk. The overall plan is to devote this MC for boot stuff with focus
>  on security. So, this maybe good place to discuss this. However, I am
>  not ARM expert, so, I would like to see Leif and/or Alex or somebody
>  else familiar with ARM stuff there too.
> >>>
> >>> If I can get a ticket, I'm already intending to attend plumbers.
> >>>
> >>> Registered on the waiting list.
> >
> > Folks, our LPC MC was accepted:
> >  
> > https://linuxplumbersconf.org/event/4/page/34-accepted-microconferences#security
> >  
> > https://www.linuxplumbersconf.org/blog/2019/system-boot-and-security-microconference-accepted-into-2019-linux-plumbers-conference/
> >
> > If you want to discuss something there please put a topic proposal on
> > LPC site. CfP closes on 2nd of August. If you need a pass or invite an
> > expert drop me a line.
>
> Thanks Daniel,
>
> It is certainly a worthy discussion topic for LPC. I’ll see if I can
> draft something for the CfP on Friday. Unfortunately, I may not be at

Please do it!

> LPC. I’m not even on the waiting list yet.

I cannot promise anything but if we accept your proposal then there is a
chance that you will get a pass from us.

Daniel
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Re: [U-Boot] [PATCH v4] board/BuR/brsmarc1: initial commit

[Tom Rini]

On Wed, Jul 31, 2019 at 06:31:39AM +0200, Hannes Schmelzer wrote:

> This commit adds support for the B&R brsmarc1 SoM.
> 
> The SoM is based on TI's AM335x SoC.
> Mainly vxWorks 6.9.4.x is running on the board,
> doing some PLC stuff on various carrier boards.
> 
> Signed-off-by: Hannes Schmelzer 

Sorry I wasn't clear enough.  This needs to be rebased and updated for
the ENV settings being in Kconfig now.

-- 
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[U-Boot] [BISECTED] [BUG]: MMC initialization hang at Zynq Z-turn board

[Matwey V. Kornilov]

Hello,

I am running Zynq Z-turn board and I face the following issue with MMC
initialization in SPL.
With u-boot master, I see the message similar to the following:

U-Boot SPL 2019.07-00352-gb5f3eb3393 (Jul 31 2019 - 20:03:42 +0300)
mmc boot
Trying to boot from MMC1

Then, the u-boot waits forever. I've tried to add debug prints and
found that execution is stalled somewhere inside mmc_init().
Using bisect I've found that the following broken commit is the following:

commit 3d296365e4e8823c7c0d4b568fa7accfae4bf895 (refs/bisect/bad)
Author: Faiz Abbas 
Date:   Tue Jun 11 00:43:34 2019 +0530

mmc: sdhci: Add support for sdhci-caps-mask

Add Support for masking some bits in the capabilities
register of a host controller.

Also remove the redundant readl() into caps1.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 

Until that commit the behavior was the following:

U-Boot SPL 2019.07-00351-g889a4dfc55 (Jul 31 2019 - 20:01:41 +0300)
mmc boot
Trying to boot from MMC1
spl_load_image_fat_os: error reading image system.dtb, err - -2
spl_load_image_fat: error reading image u-boot.img, err - -2
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

There were no u-boot.img at the SD card while testing, so this error
message is expected here.
5456935a1da3 ("ARM: zynq: Add configuration for Z-turn board") was
applied at the top of every testing commit to allow the board
initialization in SPL.

What could be wrong with that commit and how could I fix the board?

-- 
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Matwey V. Kornilov
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Re: [U-Boot] [RFC] drivers: dma: ti-edma3: Enable edma3-tpcc

[Tom Rini]

On Sun, Jun 09, 2019 at 08:34:46AM -0500, Adam Ford wrote:

> Enable edma3-tpcc controllers for future use with some
> Davinci devices.
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c
> index f97ad3fc74..e26365cdb1 100644
> --- a/arch/arm/mach-davinci/cpu.c
> +++ b/arch/arm/mach-davinci/cpu.c
> @@ -91,6 +91,15 @@ int set_cpu_clk_info(void)
>   return 0;
>  }
>  
> +void enable_edma3_clocks(void)
> +{
> +
> +}
> +
> +void disable_edma3_clocks(void)
> +{
> +
> +}
>  /*
>   * Initializes on-chip ethernet controllers.
>   * to override, implement board_eth_init()
> diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c
> index 7e11b13e45..4619eeae55 100644
> --- a/drivers/dma/ti-edma3.c
> +++ b/drivers/dma/ti-edma3.c
> @@ -565,6 +565,7 @@ static const struct dma_ops ti_edma3_ops = {
>  
>  static const struct udevice_id ti_edma3_ids[] = {
>   { .compatible = "ti,edma3" },
> + { .compatible = "ti,edma3-tpcc" },
>   { }
>  };

I know this is RFC, so my comment is I want to wait until there's actual
code before we do anything more here, thanks!

-- 
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Re: [U-Boot] [PATCH v2 1/2] dm: core: device: switch off power domain after device removal

[Anatolij Gustschin]

Hi Simon,

On Wed, 31 Jul 2019 10:29:50 -0600
Simon Glass s...@chromium.org wrote:
...
>> But I'm not sure if this it the correct approach. What do you think?  
> 
> That doesn't look right to me. Power supplies should be removed before
> being unbound, just like any other device.

OK, I tried to remove the associated power domain device explicitly
and this seems to work, at least with sandbox power domain driver.
Will rework the patch and resend. Thanks!

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[U-Boot] [PATCH 2/2] cmd: avb: Fix compiler warnings

[Sam Protsenko]

When building U-Boot with AVB enabled, compiler shows next warnings:

cmd/avb.c: In function 'do_avb_read_pvalue':
cmd/avb.c:371:18: warning: format '%ld' expects argument of type
  'long int', but argument 2 has type 'size_t'
  {aka 'unsigned int'} [-Wformat=]
   printf("Read %ld bytes, value = %s\n", bytes_read,
~~^   ~~
%d

cmd/avb.c: In function 'do_avb_write_pvalue':
cmd/avb.c:404:19: warning: format '%ld' expects argument of type
  'long int', but argument 2 has type '__kernel_size_t'
  {aka 'unsigned int'} [-Wformat=]
   printf("Wrote %ld bytes\n", strlen(value) + 1);
 ~~^   ~
 %d

Fix those by using "%zu" specified.

Signed-off-by: Sam Protsenko 
---
 cmd/avb.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/cmd/avb.c b/cmd/avb.c
index c5af4a2e46..3f6fd763a0 100644
--- a/cmd/avb.c
+++ b/cmd/avb.c
@@ -368,7 +368,7 @@ int do_avb_read_pvalue(cmd_tbl_t *cmdtp, int flag, int argc,
 
if (avb_ops->read_persistent_value(avb_ops, name, bytes, buffer,
   &bytes_read) == AVB_IO_RESULT_OK) {
-   printf("Read %ld bytes, value = %s\n", bytes_read,
+   printf("Read %zu bytes, value = %s\n", bytes_read,
   (char *)buffer);
free(buffer);
return CMD_RET_SUCCESS;
@@ -401,7 +401,7 @@ int do_avb_write_pvalue(cmd_tbl_t *cmdtp, int flag, int 
argc,
if (avb_ops->write_persistent_value(avb_ops, name, strlen(value) + 1,
(const uint8_t *)value) ==
AVB_IO_RESULT_OK) {
-   printf("Wrote %ld bytes\n", strlen(value) + 1);
+   printf("Wrote %zu bytes\n", strlen(value) + 1);
return CMD_RET_SUCCESS;
}
 
-- 
2.20.1

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[U-Boot] [PATCH 1/2] avb: Fix build when CONFIG_OPTEE_TA_AVB is disabled

[Sam Protsenko]

When having only these AVB related configs enabled:

CONFIG_AVB_VERIFY=y
CONFIG_CMD_AVB=y
CONFIG_LIBAVB=y

build fails with next errors:

common/avb_verify.c: In function 'read_persistent_value':
common/avb_verify.c:867:6: warning: implicit declaration of function
'get_open_session'
common/avb_verify.c:870:45: error: 'struct AvbOpsData' has no member
named 'tee'
common/avb_verify.c:894:7: warning: implicit declaration of function
'invoke_func'
common/avb_verify.c: In function 'write_persistent_value':
common/avb_verify.c:931:45: error: 'struct AvbOpsData' has no member
   named 'tee'

Guard read_persistent_value() and write_persistent_value() functions
by checking if CONFIG_OPTEE_TA_AVB is enabled (as those are only used in
that case) to fix the build with mentioned configuration.

Signed-off-by: Sam Protsenko 
---
 common/avb_verify.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/common/avb_verify.c b/common/avb_verify.c
index 32034d927c..36898a610f 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -851,6 +851,7 @@ static AvbIOResult get_size_of_partition(AvbOps *ops,
return AVB_IO_RESULT_OK;
 }
 
+#ifdef CONFIG_OPTEE_TA_AVB
 static AvbIOResult read_persistent_value(AvbOps *ops,
 const char *name,
 size_t buffer_size,
@@ -968,6 +969,8 @@ free_name:
 
return rc;
 }
+#endif
+
 /**
  * 
  * AVB2.0 AvbOps alloc/initialisation/free
-- 
2.20.1

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Re: [U-Boot] [PATCH] board_r: re-order the board_early_init_r()

[Simon Glass]

Hi Kever,

On Wed, 24 Jul 2019 at 04:01, Kever Yang  wrote:
>
> The board_early_init_r() suppose to be called before board_init(),
> then the board callback functions in board_r will be:
> - board_early_init_r()
> - board_init()
> - board_late_init()

board_early_init_r() was introduced for PowerPC as part of creating
the generic board-init code (board_f.c and board_r.c).

I wonder whether any board is actually using both board_init() and
board_early_init_r(). To me they serve the same function.

So I think we should remove board_early_init_r() and change all uses
to board_init() instead. I expect they will mostly be PowerPC.

>
> Signed-off-by: Kever Yang 
> ---
>
>  common/board_r.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/common/board_r.c b/common/board_r.c
> index abc31b17b8..c5e33c4654 100644
> --- a/common/board_r.c
> +++ b/common/board_r.c
> @@ -681,6 +681,9 @@ static init_fnc_t init_sequence_r[] = {
>  #ifdef CONFIG_DM
> initr_dm,
>  #endif
> +#if defined(CONFIG_BOARD_EARLY_INIT_R)
> +   board_early_init_r,
> +#endif
>  #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || 
> \
> defined(CONFIG_SANDBOX)
> board_init, /* Setup chipselects */
> @@ -712,9 +715,6 @@ static init_fnc_t init_sequence_r[] = {
>  #endif
>  #ifdef CONFIG_ADDR_MAP
> initr_addr_map,
> -#endif
> -#if defined(CONFIG_BOARD_EARLY_INIT_R)
> -   board_early_init_r,
>  #endif
> INIT_FUNC_WATCHDOG_RESET
>  #ifdef CONFIG_POST
> --
> 2.17.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH v2 1/2] dm: core: device: switch off power domain after device removal

[Simon Glass]

Hi Anatolij,

On Wed, 31 Jul 2019 at 10:01, Anatolij Gustschin  wrote:
>
> Hi Simon,
>
> On Thu, 18 Jul 2019 09:22:20 -0600
> Simon Glass s...@chromium.org wrote:
> ...
> > > >  drivers/core/device-remove.c | 9 +
> > > >  include/dm/device.h  | 6 ++
> > > >  2 files changed, 15 insertions(+)
> >
> > Unfortunately this causes a test failure (make qcheck). Can you please
> > take a look?
>
> The dm power_domain test worked, but later when
>  dm_test_destroy()
>   -> uclass_destroy()
> removes devices, first 'power-domain' device is removed, then
> the 'power-domain-test' device. When removing the latter, we run
>
>  if (!power_domain_get(dev, &pd))
>power_domain_off(&pd);
>
> and this probes sandbox_power_domain driver for 'power-domain' device
> activating this device again. Then 'power-domain-test' device is removed,
> but 'power-domain' is active. When unbinding it later, we get this error
> in device_unbind():
>
> if (dev->flags & DM_FLAG_ACTIVATED)
> return -EINVAL;

This is because you are not allowed to unbind an active device. You
must deactivate it (device_remove()) first.

>
> Following will fix it:
>
> diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
> index 586fadee0a..fadb05c944 100644
> --- a/drivers/core/device-remove.c
> +++ b/drivers/core/device-remove.c
> @@ -64,7 +64,8 @@ int device_unbind(struct udevice *dev)
> if (!dev)
> return -EINVAL;
>
> -   if (dev->flags & DM_FLAG_ACTIVATED)
> +   if (dev->flags & DM_FLAG_ACTIVATED &&
> +   device_get_uclass_id(dev) != UCLASS_POWER_DOMAIN)
> return -EINVAL;
>
> if (!(dev->flags & DM_FLAG_BOUND))
>
> But I'm not sure if this it the correct approach. What do you think?

That doesn't look right to me. Power supplies should be removed before
being unbound, just like any other device.

Regards,
Simon
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[U-Boot] [PATCH v2 2/2] watchdog: omap_wdt: Disable DM watchdog support in SPL

[sunil . m]

From: Suniel Mahesh 

This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog driver on TI AM335x chipsets.

The following build error is reported if DM watchdog support was
enabled in SPL:

  CC  spl/drivers/usb/gadget/rndis.o
  LD  spl/drivers/usb/gadget/built-in.o
  LD  spl/drivers/usb/musb-new/built-in.o
  LD  spl/drivers/built-in.o
  LD  spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing
to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG,
now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset
is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed
this by simply calling hw_watchdog_reset in watchdog_reset.

Built and tested on AM335x device (BeagleboneBlack), compile tested for
all other AM33xx/omap2 based boards.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- changed description a bit to make more sense.
- As suggested by Tom Rini, Travis CI build is performed on
  am33xx, omap branches apart from others, it is a success.
  
https://travis-ci.org/sunielmahesh/u-boot/builds/566028250?utm_medium=notification&utm_source=email";
---
 arch/arm/mach-omap2/boot-common.c | 2 +-
 configs/am335x_evm_defconfig  | 1 +
 drivers/watchdog/omap_wdt.c   | 7 +++
 include/watchdog.h| 2 +-
 4 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/boot-common.c 
b/arch/arm/mach-omap2/boot-common.c
index c8b8ac6..c9549aa 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -208,7 +208,7 @@ void spl_board_init(void)
 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
arch_misc_init();
 #endif
-#if defined(CONFIG_HW_WATCHDOG)
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
hw_watchdog_init();
 #endif
 #ifdef CONFIG_AM33XX
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index fa6b030..c0f7ccc 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -60,6 +60,7 @@ CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_WDT=y
 CONFIG_WDT_OMAP3=y
+# CONFIG_SPL_WDT is not set
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_DM_USB_GADGET=y
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 86f7cf1..d5857be 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -138,7 +138,14 @@ void hw_watchdog_init(void)
while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR)
;
 }
+
+void watchdog_reset(void)
+{
+   hw_watchdog_reset();
+}
+
 #else
+
 static int omap3_wdt_reset(struct udevice *dev)
 {
struct omap3_wdt_priv *priv = dev_get_priv(dev);
diff --git a/include/watchdog.h b/include/watchdog.h
index 3a357de..41c9aa7 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -77,7 +77,7 @@ int init_func_watchdog_reset(void);
  * Prototypes from $(CPU)/cpu.c.
  */
 
-#if defined(CONFIG_HW_WATCHDOG) && !defined(__ASSEMBLY__)
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) && 
!defined(__ASSEMBLY__)
void hw_watchdog_init(void);
 #endif
 
-- 
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[U-Boot] [PATCH v2 1/2] watchdog: omap_wdt: Convert watchdog driver to use DT and DM

[sunil . m]

From: Suniel Mahesh 

This patch adds device tree and driver model watchdog support,
converts the legacy omap watchdog driver to driver model for
TI AM335x chipsets. The following compile warning is removed:

= WARNING ==
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


CONFIG_HW_WATCHDOG is no more a default option for AM33XX devices
after DT/DM conversion, adjusted kconfig accordingly.

DM watchdog support is enabled by default in SPL. The SPL image
doesn't fit into SRAM because of size constraints and build breaks
with an overflow. For this reason DM watchdog support should be
disabled in SPL, driver code should be adjusted accordingly to serve
this purpose.
Built and tested on AM335x device (BeagleboneBlack), compile tested
for all other AM33xx based boards.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- changed description a bit to make more sense.
- Travis CI build is performed on am33xx, omap branches apart from others.
  
https://travis-ci.org/sunielmahesh/u-boot/builds/566028250?utm_medium=notification&utm_source=email";
---
 arch/arm/include/asm/ti-common/omap_wdt.h |   5 ++
 configs/am335x_evm_defconfig  |   2 +
 drivers/watchdog/Kconfig  |   9 ++-
 drivers/watchdog/Makefile |   1 +
 drivers/watchdog/omap_wdt.c   | 114 ++
 5 files changed, 130 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/ti-common/omap_wdt.h 
b/arch/arm/include/asm/ti-common/omap_wdt.h
index 7d72e3a..fbc421b 100644
--- a/arch/arm/include/asm/ti-common/omap_wdt.h
+++ b/arch/arm/include/asm/ti-common/omap_wdt.h
@@ -56,4 +56,9 @@ struct wd_timer {
unsigned int wdt_unfr;  /* offset 0x100 */
 };
 
+struct omap3_wdt_priv {
+   struct wd_timer *regs;
+   unsigned int wdt_trgr_pattern;
+};
+
 #endif /* __OMAP_WDT_H__ */
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index ff96f19..fa6b030 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
+CONFIG_WDT=y
+CONFIG_WDT_OMAP3=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_DM_USB_GADGET=y
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index ccda432..c2a63c3 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -37,7 +37,6 @@ config OMAP_WATCHDOG
bool "TI OMAP watchdog driver"
depends on ARCH_OMAP2PLUS
select HW_WATCHDOG
-   default y if AM33XX
help
  Say Y here to enable the OMAP3+ watchdog driver.
 
@@ -122,6 +121,14 @@ config WDT_MTK
  The watchdog timer is stopped when initialized.
  It performs full SoC reset.
 
+config WDT_OMAP3
+bool "TI OMAP watchdog timer support"
+depends on WDT && ARCH_OMAP2PLUS
+default y if AM33XX
+help
+ This enables OMAP3+ watchdog timer driver, which can be
+ found on some TI chipsets and inline with driver model.
+
 config WDT_ORION
bool "Orion watchdog timer support"
depends on WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 97aa6a8..c40667a 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
 obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
 obj-$(CONFIG_WDT_MTK) += mtk_wdt.o
+obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o
 obj-$(CONFIG_WDT_SP805) += sp805_wdt.o
 obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt.o
 obj-$(CONFIG_WDT_TANGIER) += tangier_wdt.o
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 343adb0..86f7cf1 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -42,10 +42,14 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* Hardware timeout in seconds */
 #define WDT_HW_TIMEOUT 60
 
+#if !CONFIG_IS_ENABLED(WDT)
 static unsigned int wdt_trgr_pattern = 0x1234;
 
 void hw_watchdog_reset(void)
@@ -134,3 +138,113 @@ void hw_watchdog_init(void)
while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR)
;
 }
+#else
+static int omap3_wdt_reset(struct udevice *dev)
+{
+   struct omap3_wdt_priv *priv = dev_get_priv(dev);
+
+   priv->wdt_trgr_pattern = 0x1234;
+/*
+ * Somebody just triggered watchdog reset and write to WTGR register
+ * is in progress. It is resetting right now, no need to trigger it
+ * again
+ */
+   if ((readl(&priv->regs->wdtwwps)) & WDT_WWPS_PEND_WTGR)
+   return 0;
+
+   priv->wdt_trgr_pattern = ~(priv->wdt_trgr_pattern);
+   writel(priv->wdt_trgr_pattern, &priv->regs->wdtwtgr);
+/*
+ * Don't wait

[U-Boot] [PATCH 4/7] rockchip: Kconfig: enable TPL support for rk3328

[Matwey V. Kornilov]

From: Kever Yang 

Enable TPL support and some related option in Kconfig.

Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/430b01462bf3f24aaf7920ae2587a6943c39ab5d
 with minor modifications]
Signed-off-by: Matwey V. Kornilov 
---
 arch/arm/mach-rockchip/Kconfig | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index e337d06b99..22cbb3a9a4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -110,9 +110,14 @@ config ROCKCHIP_RK3328
select ARM64
select SUPPORT_SPL
select SPL
+   select SUPPORT_TPL
+   select TPL
+   select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+   select TPL_NEEDS_SEPARATE_STACK if TPL
imply ROCKCHIP_COMMON_BOARD
imply SPL_ROCKCHIP_COMMON_BOARD
imply SPL_SERIAL_SUPPORT
+   imply TPL_SERIAL_SUPPORT
imply SPL_SEPARATE_BSS
select ENABLE_ARM_SOC_BOOT0_HOOK
select DEBUG_UART_BOARD_INIT
@@ -124,6 +129,22 @@ config ROCKCHIP_RK3328
  and video codec support. Peripherals include Gigabit Ethernet,
  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3328
+
+config TPL_LDSCRIPT
+   default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+default 0xff091000
+
+config TPL_MAX_SIZE
+default 28672
+
+config TPL_STACK
+default 0xff098000
+
+endif
+
 config ROCKCHIP_RK3368
bool "Support Rockchip RK3368"
select ARM64
-- 
2.16.4

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[U-Boot] [PATCH 7/7] doc: rockchip: Adapt Pine64 Rock64 board instructions

[Matwey V. Kornilov]

Now we have our own TPL implementation. Remove obsolete notes.

Signed-off-by: Matwey V. Kornilov 
---
 doc/README.rockchip | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 8ccbb87264..7d4dc1b33b 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -309,17 +309,11 @@ Booting from an SD card on Pine64 Rock64 (RK3328)
 =
 
 For Rock64 rk3328 board the following three parts are required:
-TPL, SPL, and the u-boot image tree blob. While u-boot-spl.bin and
-u-boot.itb are to be compiled as usual, TPL is currently not
-implemented in u-boot, so you need to pick one from rkbin:
-
-  - Get the rkbin
-
-=> git clone https://github.com/rockchip-linux/rkbin.git
+TPL, SPL, and the u-boot image tree blob.
 
   - Create TPL/SPL image
 
-=> tools/mkimage -n rk3328 -T rksd -d 
rkbin/bin/rk33/rk3328_ddr_333MHz_v1.16.bin idbloader.img
+=> tools/mkimage -n rk3328 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
 => cat spl/u-boot-spl.bin >> idbloader.img
 
   - Write TPL/SPL image at 64 sector
-- 
2.16.4

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[U-Boot] [PATCH 6/7] configs: rk3328: enable TPL for rock64-rk3328_defconfig

[Matwey V. Kornilov]

Signed-off-by: Matwey V. Kornilov 
---
 configs/rock64-rk3328_defconfig | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index ef453e72c1..6484845fb6 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -34,15 +34,20 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -65,6 +70,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=150
 CONFIG_DEBUG_UART_SHIFT=2
@@ -85,4 +91,12 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_TPL_DM=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-- 
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[U-Boot] [PATCH 1/7] rockchip: ram: add full feature rk3328 DRAM driver

[Matwey V. Kornilov]

From: Kever Yang 

This driver supports DDR3/LPDDR3/DDR4 SDRAM initialization.

Signed-off-by: YouMin Chen 
Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/9fb0777ec3cc6a89af9d2e0969c3bfe58306a88d
 with minor modifications]
Signed-off-by: Matwey V. Kornilov 
---
 arch/arm/include/asm/arch-rockchip/sdram_rk3328.h |  441 +
 drivers/ram/rockchip/sdram_rk3328.c   | 1018 -
 2 files changed, 1456 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3328.h

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h 
b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
new file mode 100644
index 00..11411ead10
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
@@ -0,0 +1,441 @@
+/*
+ * Copyright (C) 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RK3328_H
+#define _ASM_ARCH_SDRAM_RK3328_H
+
+#define SR_IDLE93
+#define PD_IDLE13
+#define SDRAM_ADDR 0x
+#define PATTERN(0x5aa5f00f)
+
+/* ddr pctl registers define */
+#define DDR_PCTL2_MSTR 0x0
+#define DDR_PCTL2_STAT 0x4
+#define DDR_PCTL2_MSTR10x8
+#define DDR_PCTL2_MRCTRL0  0x10
+#define DDR_PCTL2_MRCTRL1  0x14
+#define DDR_PCTL2_MRSTAT   0x18
+#define DDR_PCTL2_MRCTRL2  0x1c
+#define DDR_PCTL2_DERATEEN 0x20
+#define DDR_PCTL2_DERATEINT0x24
+#define DDR_PCTL2_PWRCTL   0x30
+#define DDR_PCTL2_PWRTMG   0x34
+#define DDR_PCTL2_HWLPCTL  0x38
+#define DDR_PCTL2_RFSHCTL0 0x50
+#define DDR_PCTL2_RFSHCTL1 0x54
+#define DDR_PCTL2_RFSHCTL2 0x58
+#define DDR_PCTL2_RFSHCTL4 0x5c
+#define DDR_PCTL2_RFSHCTL3 0x60
+#define DDR_PCTL2_RFSHTMG  0x64
+#define DDR_PCTL2_RFSHTMG1 0x68
+#define DDR_PCTL2_RFSHCTL5 0x6c
+#define DDR_PCTL2_INIT00xd0
+#define DDR_PCTL2_INIT10xd4
+#define DDR_PCTL2_INIT20xd8
+#define DDR_PCTL2_INIT30xdc
+#define DDR_PCTL2_INIT40xe0
+#define DDR_PCTL2_INIT50xe4
+#define DDR_PCTL2_INIT60xe8
+#define DDR_PCTL2_INIT70xec
+#define DDR_PCTL2_DIMMCTL  0xf0
+#define DDR_PCTL2_RANKCTL  0xf4
+#define DDR_PCTL2_CHCTL0xfc
+#define DDR_PCTL2_DRAMTMG0 0x100
+#define DDR_PCTL2_DRAMTMG1 0x104
+#define DDR_PCTL2_DRAMTMG2 0x108
+#define DDR_PCTL2_DRAMTMG3 0x10c
+#define DDR_PCTL2_DRAMTMG4 0x110
+#define DDR_PCTL2_DRAMTMG5 0x114
+#define DDR_PCTL2_DRAMTMG6 0x118
+#define DDR_PCTL2_DRAMTMG7 0x11c
+#define DDR_PCTL2_DRAMTMG8 0x120
+#define DDR_PCTL2_DRAMTMG9 0x124
+#define DDR_PCTL2_DRAMTMG100x128
+#define DDR_PCTL2_DRAMTMG110x12c
+#define DDR_PCTL2_DRAMTMG120x130
+#define DDR_PCTL2_DRAMTMG130x134
+#define DDR_PCTL2_DRAMTMG140x138
+#define DDR_PCTL2_DRAMTMG150x13c
+#define DDR_PCTL2_DRAMTMG160x140
+#define DDR_PCTL2_ZQCTL0   0x180
+#define DDR_PCTL2_ZQCTL1   0x184
+#define DDR_PCTL2_ZQCTL2   0x188
+#define DDR_PCTL2_ZQSTAT   0x18c
+#define DDR_PCTL2_DFITMG0  0x190
+#define DDR_PCTL2_DFITMG1  0x194
+#define DDR_PCTL2_DFILPCFG00x198
+#define DDR_PCTL2_DFILPCFG10x19c
+#define DDR_PCTL2_DFIUPD0  0x1a0
+#define DDR_PCTL2_DFIUPD1  0x1a4
+#define DDR_PCTL2_DFIUPD2  0x1a8
+#define DDR_PCTL2_DFIMISC  0x1b0
+#define DDR_PCTL2_DFITMG2  0x1b4
+#define DDR_PCTL2_DFITMG3  0x1b8
+#define DDR_PCTL2_DFISTAT  0x1bc
+#define DDR_PCTL2_DBICTL   0x1c0
+#define DDR_PCTL2_ADDRMAP0 0x200
+#define DDR_PCTL2_ADDRMAP1 0x204
+#define DDR_PCTL2_ADDRMAP2 0x208
+#define DDR_PCTL2_ADDRMAP3 0x20c
+#define DDR_PCTL2_ADDRMAP4 0x210
+#define DDR_PCTL2_ADDRMAP5 0x214
+#define DDR_PCTL2_ADDRMAP6 0x218
+#define DDR_PCTL2_ADDRMAP7 0x21c
+#define DDR_PCTL2_ADDRMAP8 0x220
+#define DDR_PCTL2_ADDRMAP9 0x224
+#define DDR_PCTL2_ADDRMAP100x228
+#define DDR_PCTL2_ADDRMAP110x22c
+#define DDR_PCTL2_ODTCFG   0x240
+#define DDR_PCTL2_ODTMAP   0x244
+#define DDR_PCTL2_SCHED0x250
+#define DDR_PCTL2_SCHED1   0x254
+#define DDR_PCTL2_PERFHPR1 0x25c
+#def

[U-Boot] [PATCH 2/7] rockchip: dts: rk3328: update dmc node for driver

[Matwey V. Kornilov]

From: Kever Yang 

Update dmc node for full feature driver.

Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/1e1495636574c78ea9d3af3e0aae95d5204612d6
 with minor modifications]
Signed-off-by: Matwey V. Kornilov 
---
 arch/arm/dts/rk3328-evb.dts|   1 +
 arch/arm/dts/rk3328-rock64-u-boot.dtsi |   2 +
 arch/arm/dts/rk3328-sdram-ddr3-666.dtsi| 215 +
 arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi | 215 +
 arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi  | 215 +
 arch/arm/dts/rk3328.dtsi   |  11 +-
 6 files changed, 656 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
 create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi
 create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index ec594a8452..3b01dd0a87 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -5,6 +5,7 @@
 
 /dts-v1/;
 #include "rk3328.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"
 
 / {
model = "Rockchip RK3328 EVB";
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi 
b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index b077436cbc..a01f758e9f 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 
+#include "rk3328-sdram-lpddr3-1600.dtsi"
+
 / {
aliases {
mmc0 = &emmc;
diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi 
b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
new file mode 100644
index 00..d99e7e0352
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+&dmc {
+   rockchip,sdram-params = <
+   0x1
+   0xC
+   0x3
+   0x1
+   0x0
+   0x0
+   0x10
+   0x10
+   0
+
+   0x9028b189
+   0x
+   0x0021
+   0x0482
+   0x0015
+   0x0222
+   0x00ff
+
+   333
+   3
+   0
+
+   0x
+   0x43041001
+   0x0064
+   0x0028003b
+   0x00d0
+   0x00020053
+   0x00d4
+   0x0002
+   0x00d8
+   0x0100
+   0x00dc
+   0x0320
+   0x00e0
+   0x
+   0x00e4
+   0x0009
+   0x00f4
+   0x000f011f
+   0x0100
+   0x07090b06
+   0x0104
+   0x00050209
+   0x0108
+   0x03030407
+   0x010c
+   0x00202006
+   0x0110
+   0x03020204
+   0x0114
+   0x03030202
+   0x0120
+   0x0903
+   0x0180
+   0x00800020
+   0x0184
+   0x
+   0x0190
+   0x07010001
+   0x0198
+   0x05001100
+   0x01a0
+   0xc043
+   0x0240
+   0x06000604
+   0x0244
+   0x0201
+   0x0250
+   0x0f00
+   0x0490
+   0x0001
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+
+   0x0004
+   0x000a
+   0x0028
+   0x0006
+   0x002c
+   0x
+   0x0030
+   0x0005
+   0x
+   0x
+
+   0x77
+   0x88
+   0x79
+   0x79
+   0x87
+   0x97
+   0x87
+   0x78
+   0x77
+   0x78
+   0x87
+   0x88
+   0x87
+   0x87
+   0x77
+
+   0x78
+   0x78
+   0x78
+   0x78
+   0x78
+   0x78
+   0x78
+   0x78
+   0x78
+   0x69
+   0x9
+
+   0x77
+   0x78
+   0x77
+   0x78
+   0x77
+   0x78
+   0x77
+

[U-Boot] [PATCH 3/7] rockchip: dts: rk3328: enable the drivers need by TPL/SPL

[Matwey V. Kornilov]

From: Kever Yang 

Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.

Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/664225d1610d77ef64ed9a4f42d36474362592cc]
Signed-off-by: Matwey V. Kornilov 
---
 arch/arm/dts/rk3328-evb.dts | 2 ++
 arch/arm/dts/rk3328.dtsi| 1 +
 2 files changed, 3 insertions(+)

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 3b01dd0a87..fa8b1b18da 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -61,6 +61,7 @@
 };
 
 &uart2 {
+   u-boot,dm-pre-reloc;
status = "okay";
 };
 
@@ -77,6 +78,7 @@
 };
 
 &emmc {
+   u-boot,dm-pre-reloc;
bus-width = <8>;
cap-mmc-highspeed;
supports-emmc;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index a080ae8d69..4ec5d3e1f3 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -363,6 +363,7 @@
};
 
cru: clock-controller@ff44 {
+   u-boot,dm-pre-reloc;
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
rockchip,grf = <&grf>;
-- 
2.16.4

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[U-Boot] [PATCH 5/7] rockchip: evb-rk3328: enable defconfig options for TPL/SPL

[Matwey V. Kornilov]

From: Kever Yang 

Enable driver options for TPL/SPL in evb-rk3328_defconfig.

Signed-off-by: Kever Yang 
[cherry picked from commit 
https://github.com/rockchip-linux/u-boot/commit/df4f40acb449815384e397dcaf5b618bbc6cd855
 with minor modifications]
Signed-off-by: Matwey V. Kornilov 
---
 configs/evb-rk3328_defconfig | 37 +++--
 1 file changed, 35 insertions(+), 2 deletions(-)

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index fcc04f27ec..12be1dedc6 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -1,5 +1,11 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
 CONFIG_SYS_TEXT_BASE=0x0020
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -9,31 +15,50 @@ CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4
+CONFIG_SPL_STACK_R_ADDR=0x60
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_TPL_OF_PLATDATA=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
@@ -44,6 +69,7 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
@@ -51,9 +77,14 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_BAUDRATE=150
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
@@ -69,4 +100,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-- 
2.16.4

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[U-Boot] [PATCH 0/7] Add TPL support for Pine64 Rock64 board.

[Matwey V. Kornilov]

This series adds initial TPL support for Pine64 Rock64 board.

The ROCK64 is a credit card size SBC based on Rockchip RK3328 Quad-Core ARM 
Cortex A53.

The series has been tested with ATF v2.1.

Some patches in the series are taken from 
https://github.com/rockchip-linux/u-boot
Credits are given in each patch separately. 

Kever Yang (5):
  rockchip: ram: add full feature rk3328 DRAM driver
  rockchip: dts: rk3328: update dmc node for driver
  rockchip: dts: rk3328: enable the drivers need by TPL/SPL
  rockchip: Kconfig: enable TPL support for rk3328
  rockchip: evb-rk3328: enable defconfig options for TPL/SPL

Matwey V. Kornilov (2):
  configs: rk3328: enable TPL for rock64-rk3328_defconfig
  doc: rockchip: Adapt Pine64 Rock64 board instructions

 arch/arm/dts/rk3328-evb.dts   |3 +
 arch/arm/dts/rk3328-rock64-u-boot.dtsi|2 +
 arch/arm/dts/rk3328-sdram-ddr3-666.dtsi   |  215 +
 arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi|  215 +
 arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi |  215 +
 arch/arm/dts/rk3328.dtsi  |   12 +-
 arch/arm/include/asm/arch-rockchip/sdram_rk3328.h |  441 +
 arch/arm/mach-rockchip/Kconfig|   21 +
 configs/evb-rk3328_defconfig  |   37 +-
 configs/rock64-rk3328_defconfig   |   14 +
 doc/README.rockchip   |   10 +-
 drivers/ram/rockchip/sdram_rk3328.c   | 1018 -
 12 files changed, 2187 insertions(+), 16 deletions(-)
 create mode 100644 arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
 create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi
 create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
 create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3328.h

-- 
2.16.4

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Re: [U-Boot] [PATCH 3/4] pci: mediatek: Add pci-driver for mt2701

[Frank Wunderlich]

Hi Ryder,

you know that we cannot write a full, multi-device driver here :)

> Gesendet: Mittwoch, 31. Juli 2019 um 17:23 Uhr
> Von: "Ryder Lee" 
> > imho we can use single driver for different IP generation and that is
> > what we did in linux now.
> >
> > MT7623/MT2701 - mtk_pcie_soc_v1
> > MT7622/MT7629 - v2
> > gen3 IP - TBD

i ack that's the right way, but this cannot be done by people outside (that do 
not have knowledge about multiple chips the driver should cover) and not only 
in freetime, so our approach was to create a driver for this chip (that is also 
used by other soc) as base for future developement (extending for other boards).

on any time it needs to be replaced by a more universal variant to have not the 
same code multiple times. but thats far away from we can do here

it's not the best code (based on magic values and portability to other 
devices), but from my point of view we have working sata and do not modify 
existing code too much (to avoid side-effects), but only figuring out which 
consts are used in linux take much time for us

> > phy driver is used for configuring basic settings, there is no complex
> > logic in it. we can even copy and paste the entire block from that
> > driver.
you know the technical details :)
what we do is read out registers in linux and try to adapt this in uboot ;) 
because drivercode itself is too big for us to understand

> > .version = MTK_PHY_V1
> > case PHY_TYPE_PCIE:
> > pcie_phy_instance_init(tphy, instance);
> More specifically, we should use pci_generic_mmap_write/read_config()
> for standard set of confi read/write operations so that we can get rid
> of the helpers here.

a general way is right, but not possible to created by people not working for 
mtk :) without the right documentation

we do not have the knowledge to port a driver like this from linux to uboot

> I think the uboot driver end up dealing with nothing but just doing some
> initial parts (< 300 lines I guess), or you can take pcie_xilinx or
> pci_tegra as examples.
> > we can directly replace these chunks with mtk_pcie_startup_port()
> > (pcie-mediatek.c) and there are many defines for the registers/bit
> > field.

i tried this, but just C&P does not work ( i'm not that naive :) ) because of 
many depencies (functions used in linux-variant), i have already changed some 
things, but it ended in needed touching corefiles of uboot (e.g. extending 
pci.h) which may break other drivers.

but at least i have this version (with some fix-ups you've mentioned here) on 
my github-repo so that everybody can use it for my board/other boards using 
mt2701

https://github.com/frank-w/u-boot/commits/2019-07-bpi-r2-sata_new (will merge 
that in other main branches till official driver is there)

regards Frank
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Re: [U-Boot] [PATCH v2 1/2] dm: core: device: switch off power domain after device removal

[Anatolij Gustschin]

Hi Simon,

On Thu, 18 Jul 2019 09:22:20 -0600
Simon Glass s...@chromium.org wrote:
...
> > >  drivers/core/device-remove.c | 9 +
> > >  include/dm/device.h  | 6 ++
> > >  2 files changed, 15 insertions(+)  
> 
> Unfortunately this causes a test failure (make qcheck). Can you please
> take a look?

The dm power_domain test worked, but later when
 dm_test_destroy()
  -> uclass_destroy()
removes devices, first 'power-domain' device is removed, then
the 'power-domain-test' device. When removing the latter, we run

 if (!power_domain_get(dev, &pd))
   power_domain_off(&pd);

and this probes sandbox_power_domain driver for 'power-domain' device
activating this device again. Then 'power-domain-test' device is removed,
but 'power-domain' is active. When unbinding it later, we get this error
in device_unbind():

if (dev->flags & DM_FLAG_ACTIVATED)
return -EINVAL;

Following will fix it:

diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index 586fadee0a..fadb05c944 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -64,7 +64,8 @@ int device_unbind(struct udevice *dev)
if (!dev)
return -EINVAL;
 
-   if (dev->flags & DM_FLAG_ACTIVATED)
+   if (dev->flags & DM_FLAG_ACTIVATED &&
+   device_get_uclass_id(dev) != UCLASS_POWER_DOMAIN)
return -EINVAL;
 
if (!(dev->flags & DM_FLAG_BOUND))

But I'm not sure if this it the correct approach. What do you think?

Thanks,
Anatolij
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[U-Boot] [PATCH 4/7] clk: renesas: Add R8A77980 V3H clock tables

[Marek Vasut]

Import R8A77980 V3H clock tables from Linux 5.1.21 , commit 4a9b1eb8bc3b.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 drivers/clk/renesas/Kconfig |   6 +
 drivers/clk/renesas/Makefile|   1 +
 drivers/clk/renesas/r8a77980-cpg-mssr.c | 255 
 3 files changed, 262 insertions(+)
 create mode 100644 drivers/clk/renesas/r8a77980-cpg-mssr.c

diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 3862c1b848..e78817829b 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -72,6 +72,12 @@ config CLK_R8A77970
help
  Enable this to support the clocks on Renesas R8A77970 SoC.
 
+config CLK_R8A77980
+   bool "Renesas R8A77980 clock driver"
+   depends on CLK_RCAR_GEN3
+   help
+ Enable this to support the clocks on Renesas R8A77980 SoC.
+
 config CLK_R8A77990
bool "Renesas R8A77990 clock driver"
depends on CLK_RCAR_GEN3
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 26b343994c..88339e9d7e 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c 
b/drivers/clk/renesas/r8a77980-cpg-mssr.c
new file mode 100644
index 00..6fe8ea5edf
--- /dev/null
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -0,0 +1,255 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * r8a77980 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ *
+ * Based on r8a7795-cpg-mssr.c
+ *
+ * Copyright (C) 2015 Glider bvba
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen3-cpg.h"
+
+enum clk_ids {
+   /* Core Clock Outputs exported to DT */
+   LAST_DT_CORE_CLK = R8A77980_CLK_OSC,
+
+   /* External Input Clocks */
+   CLK_EXTAL,
+   CLK_EXTALR,
+
+   /* Internal Core Clocks */
+   CLK_MAIN,
+   CLK_PLL1,
+   CLK_PLL2,
+   CLK_PLL3,
+   CLK_PLL1_DIV2,
+   CLK_PLL1_DIV4,
+   CLK_S0,
+   CLK_S1,
+   CLK_S2,
+   CLK_S3,
+   CLK_SDSRC,
+   CLK_RPCSRC,
+   CLK_OCO,
+
+   /* Module Clocks */
+   MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk r8a77980_core_clks[] = {
+   /* External Clock Inputs */
+   DEF_INPUT("extal",  CLK_EXTAL),
+   DEF_INPUT("extalr", CLK_EXTALR),
+
+   /* Internal Core Clocks */
+   DEF_BASE(".main",   CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+   DEF_BASE(".pll1",   CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+   DEF_BASE(".pll2",   CLK_PLL2, CLK_TYPE_GEN3_PLL2, CLK_MAIN),
+   DEF_BASE(".pll3",   CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+
+   DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1,   2, 1),
+   DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2,  2, 1),
+   DEF_FIXED(".s0",CLK_S0,CLK_PLL1_DIV2,  2, 1),
+   DEF_FIXED(".s1",CLK_S1,CLK_PLL1_DIV2,  3, 1),
+   DEF_FIXED(".s2",CLK_S2,CLK_PLL1_DIV2,  4, 1),
+   DEF_FIXED(".s3",CLK_S3,CLK_PLL1_DIV2,  6, 1),
+   DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2,  2, 1),
+   DEF_BASE(".rpcsrc", CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),
+   DEF_RATE(".oco",CLK_OCO,   32768),
+
+   DEF_BASE("rpc", R8A77980_CLK_RPC, CLK_TYPE_GEN3_RPC,
+CLK_RPCSRC),
+   DEF_BASE("rpcd2",   R8A77980_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
+R8A77980_CLK_RPC),
+
+   /* Core Clock Outputs */
+   DEF_FIXED("ztr",R8A77980_CLK_ZTR,   CLK_PLL1_DIV2,  6, 1),
+   DEF_FIXED("ztrd2",  R8A77980_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
+   DEF_FIXED("zt", R8A77980_CLK_ZT,CLK_PLL1_DIV2,  4, 1),
+   DEF_FIXED("zx", R8A77980_CLK_ZX,CLK_PLL1_DIV2,  2, 1),
+   DEF_FIXED("s0d1",   R8A77980_CLK_S0D1,  CLK_S0, 1, 1),
+   DEF_FIXED("s0d2",   R8A77980_CLK_S0D2,  CLK_S0, 2, 1),
+   DEF_FIXED("s0d3",   R8A77980_CLK_S0D3,  CLK_S0, 3, 1),
+   DEF_FIXED("s0d4",   R8A77980_CLK_S0D4,  CLK_S0, 4, 1),
+   DEF_FIXED("s0d6",   R8A77980_CLK_S0D6,  CLK_S0, 6, 1),
+   DEF_FIXED("s0d12",  R8A77980_CLK_S0D12, CLK_S0,12, 1),
+   DEF_FIXED("s0d24",  R8A77980_CLK_S0D24, CLK_S0,24, 1),
+   DEF_FIXED("s1d1",   R8A77980_CLK_S1D1,  CLK_S1, 1, 1),
+   DEF_FIXED("s1d2

[U-Boot] [PATCH 7/7] ARM: renesas: Add R8A77980 V3H Condor board code

[Marek Vasut]

Add board code for the R8A77980 V3H Condor board.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 arch/arm/dts/Makefile   |   1 +
 arch/arm/dts/r8a77980-condor-u-boot.dts |  34 +++
 arch/arm/dts/r8a77980-condor.dts| 292 
 arch/arm/mach-rmobile/Kconfig.64|   7 +
 board/renesas/condor/Kconfig|  15 ++
 board/renesas/condor/MAINTAINERS|   6 +
 board/renesas/condor/Makefile   |  13 ++
 board/renesas/condor/condor.c   |  55 +
 configs/r8a77980_condor_defconfig   |  69 ++
 include/configs/condor.h|  41 
 10 files changed, 533 insertions(+)
 create mode 100644 arch/arm/dts/r8a77980-condor-u-boot.dts
 create mode 100644 arch/arm/dts/r8a77980-condor.dts
 create mode 100644 board/renesas/condor/Kconfig
 create mode 100644 board/renesas/condor/MAINTAINERS
 create mode 100644 board/renesas/condor/Makefile
 create mode 100644 board/renesas/condor/condor.c
 create mode 100644 configs/r8a77980_condor_defconfig
 create mode 100644 include/configs/condor.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 49d1faef32..5f4ffc5717 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -640,6 +640,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a77965-m3nulcb-u-boot.dtb \
r8a77965-salvator-x-u-boot.dtb \
r8a77970-eagle-u-boot.dtb \
+   r8a77980-condor-u-boot.dtb \
r8a77990-ebisu-u-boot.dtb \
r8a77995-draak-u-boot.dtb
 
diff --git a/arch/arm/dts/r8a77980-condor-u-boot.dts 
b/arch/arm/dts/r8a77980-condor-u-boot.dts
new file mode 100644
index 00..1b22c7f0b9
--- /dev/null
+++ b/arch/arm/dts/r8a77980-condor-u-boot.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Condor board
+ *
+ * Copyright (C) 2019 Marek Vasut 
+ */
+
+#include "r8a77980-condor.dts"
+#include "r8a77980-u-boot.dtsi"
+
+/ {
+   aliases {
+   spi0 = &rpc;
+   };
+};
+
+&rpc {
+   num-cs = <1>;
+   status = "okay";
+   spi-max-frequency = <5000>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   flash0: spi-flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "s25fs512s", "jedec,spi-nor";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <1>;
+   spi-rx-bus-width = <1>;
+   reg = <0>;
+   status = "okay";
+   };
+};
diff --git a/arch/arm/dts/r8a77980-condor.dts b/arch/arm/dts/r8a77980-condor.dts
new file mode 100644
index 00..5a7012be0d
--- /dev/null
+++ b/arch/arm/dts/r8a77980-condor.dts
@@ -0,0 +1,292 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Condor board
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+
+/dts-v1/;
+#include "r8a77980.dtsi"
+
+/ {
+   model = "Renesas Condor board based on r8a77980";
+   compatible = "renesas,condor", "renesas,r8a77980";
+
+   aliases {
+   serial0 = &scif0;
+   ethernet0 = &gether;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@4800 {
+   device_type = "memory";
+   /* first 128MB is reserved for secure area. */
+   reg = <0 0x4800 0 0x7800>;
+   };
+
+   d3_3v: regulator-0 {
+   compatible = "regulator-fixed";
+   regulator-name = "D3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   vddq_vin01: regulator-1 {
+   compatible = "regulator-fixed";
+   regulator-name = "VDDQ_VIN01";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   d1_8v: regulator-2 {
+   compatible = "regulator-fixed";
+   regulator-name = "D1.8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   hdmi-out {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con: endpoint {
+   remote-endpoint = <&adv7511_out>;
+   };
+   };
+   };
+
+   lvds-decoder {
+   compatible = "thine,thc63lvd1024";
+   vcc-supply = <&d3_3v>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = 

[U-Boot] [PATCH 6/7] ARM: renesas: Add R8A77980 V3H platform code

[Marek Vasut]

Add a few bits of platform code to support R8A77980 V3H SoC.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 arch/arm/mach-rmobile/Kconfig.64 | 5 +
 arch/arm/mach-rmobile/cpu_info.c | 1 +
 arch/arm/mach-rmobile/include/mach/rmobile.h | 1 +
 3 files changed, 7 insertions(+)

diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 27d29f797f..2d549f7bb4 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -22,6 +22,11 @@ config R8A77970
imply CLK_R8A77970
imply PINCTRL_PFC_R8A77970
 
+config R8A77980
+   bool "Renesas SoC R8A77980"
+   imply CLK_R8A77980
+   imply PINCTRL_PFC_R8A77980
+
 config R8A77990
bool "Renesas SoC R8A77990"
imply CLK_R8A77990
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 784a2a28d5..dc407d2a61 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -64,6 +64,7 @@ static const struct {
{ RMOBILE_CPU_TYPE_R8A7796, "R8A7796" },
{ RMOBILE_CPU_TYPE_R8A77965, "R8A77965" },
{ RMOBILE_CPU_TYPE_R8A77970, "R8A77970" },
+   { RMOBILE_CPU_TYPE_R8A77980, "R8A77980" },
{ RMOBILE_CPU_TYPE_R8A77990, "R8A77990" },
{ RMOBILE_CPU_TYPE_R8A77995, "R8A77995" },
{ 0x0, "CPU" },
diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h 
b/arch/arm/mach-rmobile/include/mach/rmobile.h
index aa8d43e59b..a50249dc96 100644
--- a/arch/arm/mach-rmobile/include/mach/rmobile.h
+++ b/arch/arm/mach-rmobile/include/mach/rmobile.h
@@ -36,6 +36,7 @@
 #define RMOBILE_CPU_TYPE_R8A7796   0x52
 #define RMOBILE_CPU_TYPE_R8A77965  0x55
 #define RMOBILE_CPU_TYPE_R8A77970  0x54
+#define RMOBILE_CPU_TYPE_R8A77980  0x56
 #define RMOBILE_CPU_TYPE_R8A77990  0x57
 #define RMOBILE_CPU_TYPE_R8A77995  0x58
 
-- 
2.20.1

___
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[U-Boot] [PATCH 5/7] ARM: dts: renesas: Add R8A77980 V3H DTs and headers

[Marek Vasut]

Import R8A77980 V3H DTs and headers from Linux 5.1.21 , commit 4a9b1eb8bc3b.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 arch/arm/dts/r8a77980-u-boot.dtsi |   24 +
 arch/arm/dts/r8a77980.dtsi| 1589 +
 include/dt-bindings/clock/r8a77980-cpg-mssr.h |   51 +
 include/dt-bindings/power/r8a77980-sysc.h |   43 +
 4 files changed, 1707 insertions(+)
 create mode 100644 arch/arm/dts/r8a77980-u-boot.dtsi
 create mode 100644 arch/arm/dts/r8a77980.dtsi
 create mode 100644 include/dt-bindings/clock/r8a77980-cpg-mssr.h
 create mode 100644 include/dt-bindings/power/r8a77980-sysc.h

diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi 
b/arch/arm/dts/r8a77980-u-boot.dtsi
new file mode 100644
index 00..7135244794
--- /dev/null
+++ b/arch/arm/dts/r8a77980-u-boot.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on RCar R8A77980 SoC
+ *
+ * Copyright (C) 2019 Marek Vasut 
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+&extalr_clk {
+   u-boot,dm-pre-reloc;
+};
+
+/ {
+   soc {
+   rpc: rpc@0xee20 {
+   compatible = "renesas,rpc-r8a77980", "renesas,rpc";
+   reg = <0 0xee20 0 0x100>, <0 0x0800 0 0>;
+   clocks = <&cpg CPG_MOD 917>;
+   bank-width = <2>;
+   status = "disabled";
+   };
+   };
+};
diff --git a/arch/arm/dts/r8a77980.dtsi b/arch/arm/dts/r8a77980.dtsi
new file mode 100644
index 00..4081622d54
--- /dev/null
+++ b/arch/arm/dts/r8a77980.dtsi
@@ -0,0 +1,1589 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the R-Car V3H (R8A77980) SoC
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "renesas,r8a77980";
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   i2c0 = &i2c0;
+   i2c1 = &i2c1;
+   i2c2 = &i2c2;
+   i2c3 = &i2c3;
+   i2c4 = &i2c4;
+   i2c5 = &i2c5;
+   };
+
+   /* External CAN clock - to be overridden by boards that provide it */
+   can_clk: can {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <0>;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   a53_0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0>;
+   clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+   power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
+   next-level-cache = <&L2_CA53>;
+   enable-method = "psci";
+   };
+
+   a53_1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <1>;
+   clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+   power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
+   next-level-cache = <&L2_CA53>;
+   enable-method = "psci";
+   };
+
+   a53_2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <2>;
+   clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+   power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
+   next-level-cache = <&L2_CA53>;
+   enable-method = "psci";
+   };
+
+   a53_3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <3>;
+   clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+   power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
+   next-level-cache = <&L2_CA53>;
+   enable-method = "psci";
+   };
+
+   L2_CA53: cache-controller {
+   compatible = "cache";
+   power-domains = <&sysc R8A77980_PD_CA53_SCU>;
+   cache-unified;
+   cache-level = <2>;
+   };
+   };
+
+   extal_clk: extal {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   /* This value must be overridden by the board */
+   clock-frequency = <0>;
+   };
+
+   extalr_clk: extalr {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   /* This value must be overridden by the board */
+   clock-frequency = <0>;
+   };
+
+   /* External PCIe clock - ca

[U-Boot] [PATCH 3/7] pinctrl: renesas: Add R8A77980 V3H PFC tables

[Marek Vasut]

Import R8A77980 V3H PFC tables from Linux 5.1.21 , commit 4a9b1eb8bc3b.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 drivers/pinctrl/renesas/Kconfig|   10 +
 drivers/pinctrl/renesas/Makefile   |1 +
 drivers/pinctrl/renesas/pfc-r8a77980.c | 2895 
 drivers/pinctrl/renesas/pfc.c  |   11 +
 drivers/pinctrl/renesas/sh_pfc.h   |1 +
 5 files changed, 2918 insertions(+)
 create mode 100644 drivers/pinctrl/renesas/pfc-r8a77980.c

diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index 0ffd7fcfd4..4d3d68d307 100644
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -97,6 +97,16 @@ config PINCTRL_PFC_R8A77970
  the GPIO definitions and pin control functions for each available
  multiplex function.
 
+config PINCTRL_PFC_R8A77980
+   bool "Renesas RCar Gen3 R8A77980 pin control driver"
+   depends on PINCTRL_PFC
+   help
+ Support pin multiplexing control on Renesas RCar Gen3 R8A77980 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
+
 config PINCTRL_PFC_R8A77990
bool "Renesas RCar Gen3 R8A77990 pin control driver"
depends on PINCTRL_PFC
diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile
index e8703f681e..a92f787a89 100644
--- a/drivers/pinctrl/renesas/Makefile
+++ b/drivers/pinctrl/renesas/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7796) += pfc-r8a7796.o
 obj-$(CONFIG_PINCTRL_PFC_R8A77965) += pfc-r8a77965.o
 obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o
+obj-$(CONFIG_PINCTRL_PFC_R8A77980) += pfc-r8a77980.o
 obj-$(CONFIG_PINCTRL_PFC_R8A77990) += pfc-r8a77990.o
 obj-$(CONFIG_PINCTRL_PFC_R8A77995) += pfc-r8a77995.o
 obj-$(CONFIG_PINCTRL_PFC_R7S72100) += pfc-r7s72100.o
diff --git a/drivers/pinctrl/renesas/pfc-r8a77980.c 
b/drivers/pinctrl/renesas/pfc-r8a77980.c
new file mode 100644
index 00..607b60aaf9
--- /dev/null
+++ b/drivers/pinctrl/renesas/pfc-r8a77980.c
@@ -0,0 +1,2895 @@
+// SPDX-Lincense-Identifier: GPL 2.0
+/*
+ * R8A77980 processor support - PFC hardware block.
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ *
+ * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+ *
+ * R-Car Gen3 processor support - PFC hardware block.
+ *
+ * Copyright (C) 2015 Renesas Electronics Corporation
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "sh_pfc.h"
+
+#define CPU_ALL_PORT(fn, sfx)  \
+   PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),  \
+   PORT_GP_28(1, fn, sfx), \
+   PORT_GP_CFG_30(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),  \
+   PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
+   PORT_GP_25(4, fn, sfx), \
+   PORT_GP_15(5, fn, sfx)
+
+/*
+ * F_() : just information
+ * FM() : macro for FN_xxx / xxx_MARK
+ */
+
+/* GPSR0 */
+#define GPSR0_21   F_(DU_EXODDF_DU_ODDF_DISP_CDE,  IP2_23_20)
+#define GPSR0_20   F_(DU_EXVSYNC_DU_VSYNC, IP2_19_16)
+#define GPSR0_19   F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
+#define GPSR0_18   F_(DU_DOTCLKOUT,IP2_11_8)
+#define GPSR0_17   F_(DU_DB7,  IP2_7_4)
+#define GPSR0_16   F_(DU_DB6,  IP2_3_0)
+#define GPSR0_15   F_(DU_DB5,  IP1_31_28)
+#define GPSR0_14   F_(DU_DB4,  IP1_27_24)
+#define GPSR0_13   F_(DU_DB3,  IP1_23_20)
+#define GPSR0_12   F_(DU_DB2,  IP1_19_16)
+#define GPSR0_11   F_(DU_DG7,  IP1_15_12)
+#define GPSR0_10   F_(DU_DG6,  IP1_11_8)
+#define GPSR0_9F_(DU_DG5,  IP1_7_4)
+#define GPSR0_8F_(DU_DG4,  IP1_3_0)
+#define GPSR0_7F_(DU_DG3,  IP0_31_28)
+#define GPSR0_6F_(DU_DG2,  IP0_27_24)
+#define GPSR0_5F_(DU_DR7,  IP0_23_20)
+#define GPSR0_4F_(DU_DR6,  IP0_19_16)
+#define GPSR0_3F_(DU_DR5,  IP0_15_12)
+#define GPSR0_2F_(DU_DR4,  IP0_11_8)
+#define GPSR0_1F_(DU_DR3,  IP0_7_4)
+#define GPSR0_0F_(DU_DR2,  IP0_3_0)
+
+/* GPSR1 */
+#define GPSR1_27   F_(DIGRF_CLKOUT,IP8_31_28)
+#define GPSR1_26   F_(DIGRF_CLKIN, IP8_27_24)
+#define GPSR1_25   F_(CANFD_CLK_A, IP8_23_20)
+#define GPSR1_24   F_(CANFD1_RX,   IP8_19_16)
+#define GPSR1_23   F_(CANFD1_TX,   IP8_15_12)
+#define GPSR1_22   F_(CANFD0_RX_A

[U-Boot] [PATCH 2/7] net: sh_eth: Fix 64bit build warnings

[Marek Vasut]

Fix various type warnings when building this driver for 64bit machine.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
Cc: Nobuhiro Iwamatsu 
---
 drivers/net/sh_eth.c | 24 
 drivers/net/sh_eth.h |  8 
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 485c4b71ad..2d5c97062f 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -37,8 +37,8 @@
 #if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \
!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 #define flush_cache_wback(addr, len)\
-   flush_dcache_range((u32)addr, \
-   (u32)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE)))
+   flush_dcache_range((unsigned long)addr, \
+   (unsigned long)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE)))
 #else
 #define flush_cache_wback(...)
 #endif
@@ -46,11 +46,11 @@
 #if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
 #define invalidate_cache(addr, len)\
{   \
-   u32 line_size = CONFIG_SH_ETHER_ALIGNE_SIZE;\
-   u32 start, end; \
+   unsigned long line_size = CONFIG_SH_ETHER_ALIGNE_SIZE;  \
+   unsigned long start, end;   \
\
-   start = (u32)addr;  \
-   end = start + len;  \
+   start = (unsigned long)addr;\
+   end = start + len;  \
start &= ~(line_size - 1);  \
end = ((end + line_size - 1) & ~(line_size - 1));   \
\
@@ -74,7 +74,7 @@ static int sh_eth_send_common(struct sh_eth_dev *eth, void 
*packet, int len)
}
 
/* packet must be a 4 byte boundary */
-   if ((int)packet & 3) {
+   if ((uintptr_t)packet & 3) {
printf(SHETHER_NAME ": %s: packet not 4 byte aligned\n"
, __func__);
ret = -EFAULT;
@@ -211,7 +211,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
 
/* Make sure we use a P2 address (non-cacheable) */
port_info->tx_desc_base =
-   (struct tx_desc_s *)ADDR_TO_P2((u32)port_info->tx_desc_alloc);
+   (struct tx_desc_s 
*)ADDR_TO_P2((uintptr_t)port_info->tx_desc_alloc);
port_info->tx_desc_cur = port_info->tx_desc_base;
 
/* Initialize all descriptors */
@@ -265,7 +265,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
 
/* Make sure we use a P2 address (non-cacheable) */
port_info->rx_desc_base =
-   (struct rx_desc_s *)ADDR_TO_P2((u32)port_info->rx_desc_alloc);
+   (struct rx_desc_s 
*)ADDR_TO_P2((uintptr_t)port_info->rx_desc_alloc);
 
port_info->rx_desc_cur = port_info->rx_desc_base;
 
@@ -281,7 +281,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
goto err_buf_alloc;
}
 
-   port_info->rx_buf_base = (u8 *)ADDR_TO_P2((u32)port_info->rx_buf_alloc);
+   port_info->rx_buf_base = (u8 
*)ADDR_TO_P2((uintptr_t)port_info->rx_buf_alloc);
 
/* Initialize all descriptors */
for (cur_rx_desc = port_info->rx_desc_base,
@@ -700,7 +700,7 @@ static int sh_ether_recv(struct udevice *dev, int flags, 
uchar **packetp)
struct sh_ether_priv *priv = dev_get_priv(dev);
struct sh_eth_dev *eth = &priv->shdev;
struct sh_eth_info *port_info = ð->port_info[eth->port];
-   uchar *packet = (uchar *)ADDR_TO_P2(port_info->rx_desc_cur->rd2);
+   uchar *packet = (uchar 
*)ADDR_TO_P2((uintptr_t)port_info->rx_desc_cur->rd2);
int len;
 
len = sh_eth_recv_start(eth);
@@ -850,7 +850,7 @@ static int sh_ether_probe(struct udevice *udev)
eth->port = CONFIG_SH_ETHER_USE_PORT;
eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR;
eth->port_info[eth->port].iobase =
-   (void __iomem *)(BASE_IO_ADDR + 0x800 * eth->port);
+   (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port);
 
 #if CONFIG_IS_ENABLED(CLK)
ret = clk_enable(&priv->clk);
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 564cdaccb7..d197dfdc40 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -15,20 +15,20 @@
 #if defined(CONFIG_SH)
 /* Malloc returns addresses in the P1 area (cacheable). However we need to
use area P2 (non-cacheable) */
-#define ADDR_TO_P2(addr)   int)(addr) & ~0xe000) | 0xa000))
+#define ADDR_TO_P2(addr)   uintptr_t)(addr) & ~0xe000) | 
0xa000))
 
 /* The ethernet controller needs to use physical addresses */
 #if defined(CONFIG_SH_32BIT)
-#define ADDR_TO_PHY(addr)  int)(addr) & ~0xe000) | 0x4000))
+#define ADDR_TO_PHY(addr)  uintptr_t)(addr) & ~0xe000) | 
0x4000))
 #else
-#define ADDR_TO_PHY(addr)  ((int)(addr) & ~0xe000)
+#define ADDR_TO_PHY(addr)  ((uintptr_t)(addr) & ~0xe000)
 #endif
 

[U-Boot] [PATCH 1/7] net: sh_eth: Add R8A77980 V3H gether support

[Marek Vasut]

The R8A77980 V3H gether needs a few minor adjustments to the sh_eth
driver, add them to support ethernet on R8A77980.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
Cc: Nobuhiro Iwamatsu 
---
 drivers/net/sh_eth.c | 15 +++
 drivers/net/sh_eth.h |  6 +-
 2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index da79b766a6..485c4b71ad 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -374,10 +374,16 @@ static void sh_eth_write_hwaddr(struct sh_eth_info 
*port_info,
 static void sh_eth_mac_regs_config(struct sh_eth_dev *eth, unsigned char *mac)
 {
struct sh_eth_info *port_info = ð->port_info[eth->port];
+   unsigned long edmr;
 
/* Configure e-dmac registers */
-   sh_eth_write(port_info, (sh_eth_read(port_info, EDMR) & ~EMDR_DESC_R) |
-   (EMDR_DESC | EDMR_EL), EDMR);
+   edmr = sh_eth_read(port_info, EDMR);
+   edmr &= ~EMDR_DESC_R;
+   edmr |= EMDR_DESC | EDMR_EL;
+#if defined(CONFIG_R8A77980)
+   edmr |= EDMR_NBST;
+#endif
+   sh_eth_write(port_info, edmr, EDMR);
 
sh_eth_write(port_info, 0, EESIPR);
sh_eth_write(port_info, 0, TRSCER);
@@ -407,7 +413,7 @@ static void sh_eth_mac_regs_config(struct sh_eth_dev *eth, 
unsigned char *mac)
 
 #if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740)
sh_eth_write(port_info, CONFIG_SH_ETHER_SH7734_MII, RMII_MII);
-#elif defined(CONFIG_RCAR_GEN2)
+#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_R8A77980)
sh_eth_write(port_info, sh_eth_read(port_info, RMIIMR) | 0x1, RMIIMR);
 #endif
 }
@@ -426,7 +432,7 @@ static int sh_eth_phy_regs_config(struct sh_eth_dev *eth)
sh_eth_write(port_info, GECMR_100B, GECMR);
 #elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
sh_eth_write(port_info, 1, RTRATE);
-#elif defined(CONFIG_RCAR_GEN2)
+#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_R8A77980)
val = ECMR_RTM;
 #endif
} else if (phy->speed == 10) {
@@ -931,6 +937,7 @@ static const struct udevice_id sh_ether_ids[] = {
{ .compatible = "renesas,ether-r8a7791" },
{ .compatible = "renesas,ether-r8a7793" },
{ .compatible = "renesas,ether-r8a7794" },
+   { .compatible = "renesas,gether-r8a77980" },
{ }
 };
 
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index e1bbd4913f..564cdaccb7 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -358,6 +358,9 @@ static const u16 
sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
 #elif defined(CONFIG_R7S72100)
 #define SH_ETH_TYPE_RZ
 #define BASE_IO_ADDR   0xE8203000
+#elif defined(CONFIG_R8A77980)
+#define SH_ETH_TYPE_GETHER
+#define BASE_IO_ADDR   0xE740
 #endif
 
 /*
@@ -374,6 +377,7 @@ enum EDSR_BIT {
 
 /* EDMR */
 enum DMAC_M_BIT {
+   EDMR_NBST   = 0x80, /* DMA transfer burst mode */
EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
 #if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_RZ)
EDMR_SRST   = 0x03, /* Receive/Send reset */
@@ -563,7 +567,7 @@ enum FELIC_MODE_BIT {
ECMR_PRM = 0x0001,
 #ifdef CONFIG_CPU_SH7724
ECMR_RTM = 0x0010,
-#elif defined(CONFIG_RCAR_GEN2)
+#elif defined(CONFIG_RCAR_GEN2) || defined (CONFIG_R8A77980)
ECMR_RTM = 0x0004,
 #endif
 
-- 
2.20.1

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Re: [U-Boot] [PATCH 3/4] pci: mediatek: Add pci-driver for mt2701

[Ryder Lee]

On Wed, 2019-07-31 at 22:35 +0800, Ryder Lee wrote:
> On Wed, 2019-07-31 at 17:13 +0300, Aleksandr Rybalko wrote:
> > Hello Ryder.
> > 
> > 
> > ср, 31 лип. 2019 о 15:45 Ryder Lee  пише:
> > 
> > + GSS_MTK_Uboot_upstream 
> > 
> > On Wed, 2019-07-31 at 13:51 +0200, Frank Wunderlich wrote:
> > > From: Oleksandr Rybalko 
> > > 
> > > this chip is used in MT7623 and some other Mediatek SoCs for
> > pcie
> > > 
> > > Tested-by: Frank Wunderlich 
> > > Signed-off-by: Frank Wunderlich 
> > > Signed-off-by: Oleksandr Rybalko 
> > > ---
> > >  drivers/pci/Kconfig  |   6 +
> > >  drivers/pci/Makefile |   1 +
> > >  drivers/pci/pci-mt2701.c | 490
> > +++
> > >  3 files changed, 497 insertions(+)
> > >  create mode 100644 drivers/pci/pci-mt2701.c
> > 
> > Rename 'pci-mt2701.c' to 'pcie-mediatek.c' and then change the
> > subject.
> > 
> > 
> > So you promise us, that Mediatek will never produce PCI-E controller
> > which will be totally different from that one? :)
> 
> imho we can use single driver for different IP generation and that is
> what we did in linux now.
> 
> MT7623/MT2701 - mtk_pcie_soc_v1
> MT7622/MT7629 - v2
> gen3 IP - TBD
> >  
> > 
> > Obviously, this is an intermediate version of Linux patch, so
> > I suggest
> > to take a look at the latest version of vanilla Kernel:
> > 
> > https://github.com/torvalds/linux/blob/master/drivers/pci/controller/pcie-mediatek.c
> > 
> > Please see my comments inline: 
> > 
> > > diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> > > index 3fe38f7315..cfe8ba5e52 100644
> > > --- a/drivers/pci/Kconfig
> > > +++ b/drivers/pci/Kconfig
> > > @@ -145,4 +145,10 @@ config PCI_MVEBU
> > > Say Y here if you want to enable PCIe controller
> > support on
> > > Armada XP/38x SoCs.
> > > 
> > > +config PCIE_MT2701
> > > + bool "Mediatek 2701 PCI-E"
> > > + help
> > > +   Say Y here if you want to enable PCIe controller
> > support on
> > > +   Mediatek MT7623
> > > +
> > >  endif
> > > diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
> > > index b5ebd50c85..a4c4002b9c 100644
> > > --- a/drivers/pci/Makefile
> > > +++ b/drivers/pci/Makefile
> > > @@ -38,3 +38,4 @@ obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) +=
> > pcie_layerscape_gen4.o \
> > >   pcie_layerscape_gen4_fixup.o
> > >  obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
> > >  obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
> > > +obj-$(CONFIG_PCIE_MT2701) += pci-mt2701.o
> > > diff --git a/drivers/pci/pci-mt2701.c
> > b/drivers/pci/pci-mt2701.c
> > > new file mode 100644
> > > index 00..5904f15330
> > > --- /dev/null
> > > +++ b/drivers/pci/pci-mt2701.c
> > > @@ -0,0 +1,490 @@
> > > +// SPDX-License-Identifier: GPL-2.0+
> > > +/*
> > > + *  Mediatek MT7623 SoC PCIE support
> > > + *
> > > + *  Copyright (C) 2015 Mediatek
> > > + *  Copyright (C) 2015 John Crispin 
> > > + *  Copyright (C) 2015 Ziv Huang 
> > > + *  Copyright (C) 2019 Oleksandr Rybalko 
> > > + */
> > > +
> > > +#include 
> > > +#include 
> > > +
> > > +#include 
> > > +#include 
> > > +
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +
> > > +#define iowrite32(v, a)  writel(v, a)
> > > +#define iowrite16(v, a)  writew(v, a)
> > > +#define iowrite8(v, a)   writeb(v, a)
> > > +#define ioread32(a)  readl(a)
> > > +#define ioread16(a)  readw(a)
> > > +#define ioread8(a)   readb(a)
> > 
> > Remove these defines.
> > 
> > > +#define RT_HIFSYS_BASE   0x1a00
> > > +#define RT_PCIE_BASE 0x1a14
> > > +#define RT_PCIE_IOWIN_BASE   0x1a16
> > > +#define RT_PCIE_IOWIN_SIZE   0x0001
> > > +#define RT_PCIE_MEMWIN_BASE  0x6000
> > > +#define RT_PCIE_MEMWIN_SIZE  0x1000
> > 
> > Move these base to dts.
> > 
> > 
> > Already there (ranges), just not used yet.
> 
> so it's better remove unused parts, right?
> > 
> > > +#define RD(x)readl(RT_PCIE_BASE | (x))
> > > +#define WR(x, v) writel(v, RT_PCIE_BASE | (x))
> > > +
> > > +#define SYSCFG1  0x14
> > > +#define RSTCTL   0x34
> > 

Re: [U-Boot] [PATCH 3/4] pci: mediatek: Add pci-driver for mt2701

[Ryder Lee]

On Wed, 2019-07-31 at 17:13 +0300, Aleksandr Rybalko wrote:
> Hello Ryder.
> 
> 
> ср, 31 лип. 2019 о 15:45 Ryder Lee  пише:
> 
> + GSS_MTK_Uboot_upstream 
> 
> On Wed, 2019-07-31 at 13:51 +0200, Frank Wunderlich wrote:
> > From: Oleksandr Rybalko 
> > 
> > this chip is used in MT7623 and some other Mediatek SoCs for
> pcie
> > 
> > Tested-by: Frank Wunderlich 
> > Signed-off-by: Frank Wunderlich 
> > Signed-off-by: Oleksandr Rybalko 
> > ---
> >  drivers/pci/Kconfig  |   6 +
> >  drivers/pci/Makefile |   1 +
> >  drivers/pci/pci-mt2701.c | 490
> +++
> >  3 files changed, 497 insertions(+)
> >  create mode 100644 drivers/pci/pci-mt2701.c
> 
> Rename 'pci-mt2701.c' to 'pcie-mediatek.c' and then change the
> subject.
> 
> 
> So you promise us, that Mediatek will never produce PCI-E controller
> which will be totally different from that one? :)

imho we can use single driver for different IP generation and that is
what we did in linux now.

MT7623/MT2701 - mtk_pcie_soc_v1
MT7622/MT7629 - v2
gen3 IP - TBD
>  
> 
> Obviously, this is an intermediate version of Linux patch, so
> I suggest
> to take a look at the latest version of vanilla Kernel:
> 
> https://github.com/torvalds/linux/blob/master/drivers/pci/controller/pcie-mediatek.c
> 
> Please see my comments inline: 
> 
> > diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> > index 3fe38f7315..cfe8ba5e52 100644
> > --- a/drivers/pci/Kconfig
> > +++ b/drivers/pci/Kconfig
> > @@ -145,4 +145,10 @@ config PCI_MVEBU
> > Say Y here if you want to enable PCIe controller
> support on
> > Armada XP/38x SoCs.
> > 
> > +config PCIE_MT2701
> > + bool "Mediatek 2701 PCI-E"
> > + help
> > +   Say Y here if you want to enable PCIe controller
> support on
> > +   Mediatek MT7623
> > +
> >  endif
> > diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
> > index b5ebd50c85..a4c4002b9c 100644
> > --- a/drivers/pci/Makefile
> > +++ b/drivers/pci/Makefile
> > @@ -38,3 +38,4 @@ obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) +=
> pcie_layerscape_gen4.o \
> >   pcie_layerscape_gen4_fixup.o
> >  obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
> >  obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
> > +obj-$(CONFIG_PCIE_MT2701) += pci-mt2701.o
> > diff --git a/drivers/pci/pci-mt2701.c
> b/drivers/pci/pci-mt2701.c
> > new file mode 100644
> > index 00..5904f15330
> > --- /dev/null
> > +++ b/drivers/pci/pci-mt2701.c
> > @@ -0,0 +1,490 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + *  Mediatek MT7623 SoC PCIE support
> > + *
> > + *  Copyright (C) 2015 Mediatek
> > + *  Copyright (C) 2015 John Crispin 
> > + *  Copyright (C) 2015 Ziv Huang 
> > + *  Copyright (C) 2019 Oleksandr Rybalko 
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#include 
> > +#include 
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#define iowrite32(v, a)  writel(v, a)
> > +#define iowrite16(v, a)  writew(v, a)
> > +#define iowrite8(v, a)   writeb(v, a)
> > +#define ioread32(a)  readl(a)
> > +#define ioread16(a)  readw(a)
> > +#define ioread8(a)   readb(a)
> 
> Remove these defines.
> 
> > +#define RT_HIFSYS_BASE   0x1a00
> > +#define RT_PCIE_BASE 0x1a14
> > +#define RT_PCIE_IOWIN_BASE   0x1a16
> > +#define RT_PCIE_IOWIN_SIZE   0x0001
> > +#define RT_PCIE_MEMWIN_BASE  0x6000
> > +#define RT_PCIE_MEMWIN_SIZE  0x1000
> 
> Move these base to dts.
> 
> 
> Already there (ranges), just not used yet.

so it's better remove unused parts, right?
> 
> > +#define RD(x)readl(RT_PCIE_BASE | (x))
> > +#define WR(x, v) writel(v, RT_PCIE_BASE | (x))
> > +
> > +#define SYSCFG1  0x14
> > +#define RSTCTL   0x34
> > +#define RSTSTAT  0x38
> > +#define PCICFG   0x00
> > +#define PCIINT   0x08
> > +#define PCIENA   0x0c
> > +#define CFGADDR  0x20
> > +#define CFGDATA   

[U-Boot] question about spi flash driver for large ST micro

[Valero, Miguel]

Hi there.
I was wondering whether you have plans to add support for the BP3 and 
Top/Bottom bits of the Status Register, making it possible to lock flash 
regions with full flexibility, within the device constrains of course.
That would be the current stm_lock() and friends.

Further, do you have plans to implement the individual sector protection 
(potentially with password protection) for the ST micro compatible devices?

If so, would you please share your roadmap with us?

Thank you.
Miguel Valero
Senior SW Engineer
Aker Solutions

miguel.val...@akersolutions.com |  
www.akersolutions.com

Aker Solutions AS
Visiting address: Joseph Kellersvei 20, 3408 Tranby, Norway
Postal address: PO Box 73, 3401 Lier, Norway
Registered in Norway, registration no. 929 877 950 VAT

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Re: [U-Boot] [PATCH 3/4] pci: mediatek: Add pci-driver for mt2701

[Aleksandr Rybalko]

Hello Ryder.

ср, 31 лип. 2019 о 15:45 Ryder Lee  пише:

> + GSS_MTK_Uboot_upstream 
>
> On Wed, 2019-07-31 at 13:51 +0200, Frank Wunderlich wrote:
> > From: Oleksandr Rybalko 
> >
> > this chip is used in MT7623 and some other Mediatek SoCs for pcie
> >
> > Tested-by: Frank Wunderlich 
> > Signed-off-by: Frank Wunderlich 
> > Signed-off-by: Oleksandr Rybalko 
> > ---
> >  drivers/pci/Kconfig  |   6 +
> >  drivers/pci/Makefile |   1 +
> >  drivers/pci/pci-mt2701.c | 490 +++
> >  3 files changed, 497 insertions(+)
> >  create mode 100644 drivers/pci/pci-mt2701.c
>
> Rename 'pci-mt2701.c' to 'pcie-mediatek.c' and then change the subject.
>

So you promise us, that Mediatek will never produce PCI-E controller which
will be totally different from that one? :)


>
> Obviously, this is an intermediate version of Linux patch, so I suggest
> to take a look at the latest version of vanilla Kernel:
>
> https://github.com/torvalds/linux/blob/master/drivers/pci/controller/pcie-mediatek.c
>
> Please see my comments inline:
>
> > diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> > index 3fe38f7315..cfe8ba5e52 100644
> > --- a/drivers/pci/Kconfig
> > +++ b/drivers/pci/Kconfig
> > @@ -145,4 +145,10 @@ config PCI_MVEBU
> > Say Y here if you want to enable PCIe controller support on
> > Armada XP/38x SoCs.
> >
> > +config PCIE_MT2701
> > + bool "Mediatek 2701 PCI-E"
> > + help
> > +   Say Y here if you want to enable PCIe controller support on
> > +   Mediatek MT7623
> > +
> >  endif
> > diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
> > index b5ebd50c85..a4c4002b9c 100644
> > --- a/drivers/pci/Makefile
> > +++ b/drivers/pci/Makefile
> > @@ -38,3 +38,4 @@ obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) +=
> pcie_layerscape_gen4.o \
> >   pcie_layerscape_gen4_fixup.o
> >  obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
> >  obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
> > +obj-$(CONFIG_PCIE_MT2701) += pci-mt2701.o
> > diff --git a/drivers/pci/pci-mt2701.c b/drivers/pci/pci-mt2701.c
> > new file mode 100644
> > index 00..5904f15330
> > --- /dev/null
> > +++ b/drivers/pci/pci-mt2701.c
> > @@ -0,0 +1,490 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + *  Mediatek MT7623 SoC PCIE support
> > + *
> > + *  Copyright (C) 2015 Mediatek
> > + *  Copyright (C) 2015 John Crispin 
> > + *  Copyright (C) 2015 Ziv Huang 
> > + *  Copyright (C) 2019 Oleksandr Rybalko 
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#include 
> > +#include 
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#define iowrite32(v, a)  writel(v, a)
> > +#define iowrite16(v, a)  writew(v, a)
> > +#define iowrite8(v, a)   writeb(v, a)
> > +#define ioread32(a)  readl(a)
> > +#define ioread16(a)  readw(a)
> > +#define ioread8(a)   readb(a)
>
> Remove these defines.
>
> > +#define RT_HIFSYS_BASE   0x1a00
> > +#define RT_PCIE_BASE 0x1a14
> > +#define RT_PCIE_IOWIN_BASE   0x1a16
> > +#define RT_PCIE_IOWIN_SIZE   0x0001
> > +#define RT_PCIE_MEMWIN_BASE  0x6000
> > +#define RT_PCIE_MEMWIN_SIZE  0x1000
>
> Move these base to dts.
>

Already there (ranges), just not used yet.


>
> > +#define RD(x)readl(RT_PCIE_BASE | (x))
> > +#define WR(x, v) writel(v, RT_PCIE_BASE | (x))
> > +
> > +#define SYSCFG1  0x14
> > +#define RSTCTL   0x34
> > +#define RSTSTAT  0x38
> > +#define PCICFG   0x00
> > +#define PCIINT   0x08
> > +#define PCIENA   0x0c
> > +#define CFGADDR  0x20
> > +#define CFGDATA  0x24
> > +#define MEMBASE  0x28
> > +#define IOBASE   0x2c
> > +
> > +#define BAR0SETUP0x10
> > +#define IMBASEBAR0   0x18
> > +#define PCIE_CLASS   0x34
> > +#define PCIE_SISTAT  0x50
> > +
> > +#define MTK_PCIE_HIGH_PERF   BIT(14)
> > +#define PCIEP0_BASE  0x2000
> > +#define PCIEP1_BASE  0x3000
> > +#define PCIEP2_BASE  0x4000
> > +
> > +#define PHY_P0_CTL   0x9000
> > +#define PHY_P1_CTL   0xa000
> > +#define PHY_P2_CTL   0x4000 /* in USB space */
> > +
> > +#define RSTCTL_PCIE0_RST BIT(24)
> > +#define RSTCTL_PCIE1_RST BIT(25)
> > +#define RSTCTL_PCIE2_RST BIT(26)
> > +#define MAX_PORT_NUM 3
> > +
> > +struct resource {
> > + char *name;
> > + u32 start;
> > + u32 end;
> > +};
> > +
> > +struct mt_pcie {
> > + char name[16];
> > +};
> > +
> > +static struct mtk_pcie_port {
> > + int id;
> > + int enable;
> > + u32 base;
> > + u32 phy_base;
> > + u32 perst_n;
> > + u32 reset;
> > + u32 interrupt_en;
> > + int irq;
> > + u32 link;
> > +} mtk_pcie_port[] = {
> > + { 0, 1, PCIEP0_BASE, PHY_P0_CTL, BIT(1

[U-Boot] [PATCH] Revert "ARM: davinci: da850: Manual pinmux only when PINCTRL not available"

[Adam Ford]

This reverts commit 877ab2423bc257045a06bc23d4b9440b82bda6fb.

The above patch was designed to shrink code by only pin-muxing items
needed for SPL in SPL and relying on driver model or SPL to mux other
items.  Unfortunately, da850evm_direct_nor doesn't use SPL so items
that were only muxed during SPL are not muxed causing the board
to no longer boot.

Signed-off-by: Adam Ford 

diff --git a/board/davinci/da8xxevm/da850evm.c 
b/board/davinci/da8xxevm/da850evm.c
index fcf9334ba9..849905cf8a 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -215,29 +215,21 @@ static const struct pinmux_config gpio_pins[] = {
 };
 
 const struct pinmux_resource pinmuxes[] = {
-#ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_DRIVER_TI_EMAC
PINMUX_ITEM(emac_pins_mdio),
 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
PINMUX_ITEM(emac_pins_rmii),
 #else
PINMUX_ITEM(emac_pins_mii),
-#endif /* CONFIG_DRIVER_TI_EMAC */
-#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
-#endif /* CONFIG_SPL_BUILD */
+#endif
+#endif
 #ifdef CONFIG_SPI_FLASH
-#if !CONFIG_IS_ENABLED(PINCTRL)
PINMUX_ITEM(spi1_pins_base),
PINMUX_ITEM(spi1_pins_scs0),
 #endif
-#endif
-#if !CONFIG_IS_ENABLED(PINCTRL)
PINMUX_ITEM(uart2_pins_txrx),
PINMUX_ITEM(uart2_pins_rtscts),
-#endif
-#if !CONFIG_IS_ENABLED(PINCTRL)
PINMUX_ITEM(i2c0_pins),
-#endif
 #ifdef CONFIG_NAND_DAVINCI
PINMUX_ITEM(emifa_pins_cs3),
PINMUX_ITEM(emifa_pins_cs4),
@@ -248,10 +240,8 @@ const struct pinmux_resource pinmuxes[] = {
 #endif
PINMUX_ITEM(gpio_pins),
 #ifdef CONFIG_MMC_DAVINCI
-#if !CONFIG_IS_ENABLED(PINCTRL)
PINMUX_ITEM(mmc0_pins),
 #endif
-#endif
 };
 
 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
-- 
2.17.1

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Re: [U-Boot] imx7d: CPU core issue in secure mode

[Fabio Estevam]

[Adding Bryan and Breno]

Hi Bryan,

I think you worked on allowing the CAAM driver in Linux to work on
i.MX7D running in non-secure when you created:
commit 22191ac35344 ("drivers/crypto/fsl: assign job-rings to non-TrustZone")

It was reverted later by Breno as it broke secure boot.

If I understand correctly the current solution is to let OP-TEE deal
with job-rings initialization.

Is there any other alternative to use the mainline kernel CAAM driver
in non-secure if someone is not using OP-TEE?

Thanks,

Fabio Estevam

On Fri, Jul 12, 2019 at 5:20 AM Tobias Junghans
 wrote:
>
> Hi Peng,
>
> Am Freitag, 12. Juli 2019, 05:38:21 CEST schrieb Peng Fan:
> > Try "setenv bootm_boot_mode nonsec" in U-Boot stage.
>
> Unfortunately this does not help. I tried the following setups:
>
> CONFIG_SECURE_BOOT=y
> CONFIG_CPU_V7_HAS_NONSEC=y
> CONFIG_CPU_V7_HAS_VIRT=y
> CONFIG_ARCH_SUPPORT_PSCI=y
> CONFIG_ARMV7_NONSEC=y
> CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
> CONFIG_ARMV7_VIRT=y
> CONFIG_ARMV7_PSCI=y
> CONFIG_ARMV7_PSCI_NR_CPUS=2
> CONFIG_FSL_CAAM=y
> CONFIG_SYS_FSL_HAS_SEC=y
> CONFIG_SYS_FSL_SEC_COMPAT_4=y
> # CONFIG_SYS_FSL_SEC_BE is not set
> CONFIG_SYS_FSL_SEC_COMPAT=4
> CONFIG_SYS_FSL_SEC_LE=y
>
>
> Booting with bootm_boot_mode=nonsec
>
>
> U-Boot 2019.07 (Jul 12 2019 - 10:02:31 +0200)
> CPU:   Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz)
> ..
> SEC0: RNG instantiated
> ..
>
>
> [0.00] Booting Linux on physical CPU 0x0
> [0.00] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
> [0.00] CPU: div instructions available: patching division code
> [0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
> instruction cache
> [0.00] percpu: Embedded 16 pages/cpu s34380 r8192 d22964 u65536
> [0.00] pcpu-alloc: s34380 r8192 d22964 u65536 alloc=16*4096
> [0.00] pcpu-alloc: [0] 0 [0] 1
> [0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
> ..
> [0.00] psci: probing for conduit method from DT.
> [0.00] psci: PSCIv1.0 detected in firmware.
> [0.00] psci: Using standard PSCI v0.2 function IDs
> [0.00] psci: Trusted OS migration not required
> [0.00] psci: SMC Calling Convention v1.0
> ..
> [0.002872] CPU: Testing write buffer coherency: ok
> [0.003224] CPU0: update cpu_capacity 1024
> [0.003234] CPU0: thread -1, cpu 0, socket 0, mpidr 8000
> [0.004687] smp: Bringing up secondary CPUs ...
> [0.005424] CPU1: update cpu_capacity 1024
> [0.005432] CPU1: thread -1, cpu 1, socket 0, mpidr 8001
> [0.005553] smp: Brought up 1 node, 2 CPUs
> [0.005568] CPU: All CPU(s) started in HYP mode.
> [0.005571] CPU: Virtualization extensions available.
> ..
> [0.185229] caam 3090.caam: device ID = 0x0a160300 (Era 8)
> [0.185240] caam 3090.caam: job rings = 3, qi = 0
> [0.186894] caam_jr 30901000.jr0: failed to flush job ring 0
> [0.192721] caam_jr: probe of 30901000.jr0 failed with error -5
> [0.192846] caam_jr 30902000.jr1: failed to flush job ring 1
> [0.198796] caam_jr: probe of 30902000.jr1 failed with error -5
> [0.198989] caam_jr 30903000.jr1: failed to flush job ring 2
> [0.204957] caam_jr: probe of 30903000.jr1 failed with error -5
> [0.212619] Job Ring Device allocation for transform failed
>
>
>
> Same configuration with
>
> setenv bootm_boot_mode=sec
>
> [0.00] Booting Linux on physical CPU 0x0
> [0.00] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
> [0.00] CPU: div instructions available: patching division code
> [0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
> instruction cache
> [0.00] percpu: Embedded 16 pages/cpu s34380 r8192 d22964 u65536
> [0.00] pcpu-alloc: s34380 r8192 d22964 u65536 alloc=16*4096
> [0.00] pcpu-alloc: [0] 0 [0] 1
> [0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
> [0.002866] CPU: Testing write buffer coherency: ok
> [0.003217] CPU0: update cpu_capacity 1024
> [0.003226] CPU0: thread -1, cpu 0, socket 0, mpidr 8000
> [0.004673] smp: Bringing up secondary CPUs ...
> [0.005174] smp: Brought up 1 node, 1 CPU
> [0.005188] CPU: All CPU(s) started in SVC mode.
> ..
> [0.185631] caam 3090.caam: device ID = 0x0a160300 (Era 8)
> [0.185643] caam 3090.caam: job rings = 3, qi = 0
> [0.196909] caam algorithms registered in /proc/crypto
> [0.199620] caam_jr 30901000.jr0: registering rng-caam
>
>
> => only 1 CPU core up.
>
>
> Now I tried to disable the CAAM driver and secure boot support in U-Boot
>
> # CONFIG_SECURE_BOOT is not set
> CONFIG_CPU_V7_HAS_NONSEC=y
> CONFIG_CPU_V7_HAS_VIRT=y
> CONFIG_ARCH_SUPPORT_PSCI=y
> CONFIG_ARMV7_NONSEC=y
> CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
> CONFIG_ARMV7_VIRT=y
> CONFIG_ARMV7_PSCI=y
> CONFIG_ARMV7_PSCI_NR_CPUS=2
> # CONFIG_FSL_CAAM is not set
> CONFIG_SYS_FSL_SEC_COMPAT_4=y
> # CONFIG_S

[U-Boot] [PATCH 1/1] sunxi: Fix pll1 clock calculation

[Stefan Mavrodiev]

clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families.
PLL1 clock sets the default system clock, defined as:
  sun6i: 100800
  sun8i: 100800
  sun50i: 81600

With the current calculation, m = 2 and k = 3. Solving for n,
this results 28. Solving back:
  (24MHz * 28 * 3) / 2 = 1008MHz

However if the requested clock is 816, n is 22.66 rounded
to 22, which results:
  (24MHz * 28 * 3) / 2 = 792MHz

Changing k to 4 satisfies both system clocks:
  (24E6 * 21 * 4) / 2 = 1008MHz
  (24E6 * 17 * 4) / 2 = 816MHz

Signed-off-by: Stefan Mavrodiev 
---
 arch/arm/mach-sunxi/clock_sun6i.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-sunxi/clock_sun6i.c 
b/arch/arm/mach-sunxi/clock_sun6i.c
index 1628f3a7b6..6ca38f73d9 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -118,7 +118,7 @@ void clock_set_pll1(unsigned int clk)
if (clk > 115200) {
k = 2;
} else if (clk > 76800) {
-   k = 3;
+   k = 4;
m = 2;
}
 
-- 
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Re: [U-Boot] [PATCH v2 1/2] dm: core: device: switch off power domain after device removal

[Anatolij Gustschin]

Hi Lokesh,

On Tue, 23 Jul 2019 19:35:43 +0530
Lokesh Vutla lokeshvu...@ti.com wrote:
...  
> > +   if (CONFIG_IS_ENABLED(POWER_DOMAIN) && dev->parent &&
> > +   device_get_uclass_id(dev) != UCLASS_POWER_DOMAIN &&
> > +   !(dev->flags & DM_FLAG_REMOVE_WITH_PD_ON)) {  
> 
> This is going to hit every board and all serial drivers needs to be updated. 
> Can
> we add an extra check here for (dev != gd->cur_serial_dev).

Will do it in v3 patch, thanks!

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Re: [U-Boot] [PATCH v1 9/9] apalis-tk1: remove non-esential power rails on boot

[Oleksandr Suvorov]

On Wed, Jul 31, 2019 at 3:07 PM Igor Opaniuk  wrote:
>
> From: Dominik Sliwa 
>
> When mainline kernels reboot TK1 they use SW_RESET,
> that reset mode does not reset PMIC. Some rails
> need to be off for RAM Re-repair to work correctly.
>
> Signed-off-by: Dominik Sliwa 
> Signed-off-by: Igor Opaniuk 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  arch/arm/mach-tegra/tegra124/cpu.c | 45 ++
>  board/toradex/apalis-tk1/as3722_init.c | 23 +
>  2 files changed, 68 insertions(+)
>
> diff --git a/arch/arm/mach-tegra/tegra124/cpu.c 
> b/arch/arm/mach-tegra/tegra124/cpu.c
> index 992c0beb04..abc050c27b 100644
> --- a/arch/arm/mach-tegra/tegra124/cpu.c
> +++ b/arch/arm/mach-tegra/tegra124/cpu.c
> @@ -238,6 +238,45 @@ static bool is_partition_powered(u32 partid)
> return !!(reg & (1 << partid));
>  }
>
> +static void unpower_partition(u32 partid)
> +{
> +   struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
> +
> +   debug("%s: part ID = %08X\n", __func__, partid);
> +   /* Is the partition on? */
> +   if (is_partition_powered(partid)) {
> +   /* Yes, toggle the partition power state (ON -> OFF) */
> +   debug("power_partition, toggling state\n");
> +   writel(START_CP | partid, &pmc->pmc_pwrgate_toggle);
> +
> +   /* Wait for the power to come down */
> +   while (is_partition_powered(partid))
> +   ;
> +
> +   /* Give I/O signals time to stabilize */
> +   udelay(IO_STABILIZATION_DELAY);
> +   }
> +}
> +
> +void unpower_cpus(void)
> +{
> +   debug("%s entry: G cluster\n", __func__);
> +
> +   /* Power down the fast cluster rail partition */
> +   debug("%s: CRAIL\n", __func__);
> +   unpower_partition(CRAIL);
> +
> +   /* Power down the fast cluster non-CPU partition */
> +   debug("%s: C0NC\n", __func__);
> +   unpower_partition(C0NC);
> +
> +   /* Power down the fast cluster CPU0 partition */
> +   debug("%s: CE0\n", __func__);
> +   unpower_partition(CE0);
> +
> +   debug("%s: done\n", __func__);
> +}
> +
>  static void power_partition(u32 partid)
>  {
> struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
> @@ -284,6 +323,12 @@ void start_cpu(u32 reset_vector)
>
> debug("%s entry, reset_vector = %x\n", __func__, reset_vector);
>
> +   /*
> +* High power clusters are on after software reset,
> +* it may interfere with tegra124_ram_repair.
> +* unpower them.
> +*/
> +   unpower_cpus();
> tegra124_init_clocks();
>
> /* Set power-gating timer multiplier */
> diff --git a/board/toradex/apalis-tk1/as3722_init.c 
> b/board/toradex/apalis-tk1/as3722_init.c
> index bd754e5fcf..15f8dce2f1 100644
> --- a/board/toradex/apalis-tk1/as3722_init.c
> +++ b/board/toradex/apalis-tk1/as3722_init.c
> @@ -43,6 +43,29 @@ void pmic_enable_cpu_vdd(void)
> udelay(10 * 1000);
>  #endif
>
> +   /*
> +* Make sure all non-fused regulators are down.
> +* That way we're in known state after software reboot from linux
> +*/
> +   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
> +   tegra_i2c_ll_write_data(0x0003, I2C_SEND_2_BYTES);
> +   udelay(10 * 1000);
> +   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
> +   tegra_i2c_ll_write_data(0x0004, I2C_SEND_2_BYTES);
> +   udelay(10 * 1000);
> +   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
> +   tegra_i2c_ll_write_data(0x001b, I2C_SEND_2_BYTES);
> +   udelay(10 * 1000);
> +   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
> +   tegra_i2c_ll_write_data(0x0014, I2C_SEND_2_BYTES);
> +   udelay(10 * 1000);
> +   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
> +   tegra_i2c_ll_write_data(0x001a, I2C_SEND_2_BYTES);
> +   udelay(10 * 1000);
> +   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
> +   tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES);
> +   udelay(10 * 1000);
> +
> debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__);
> /*
>  * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus.
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH v2 2/2] serial: lpuart: request dm device removal when booting OS

[Anatolij Gustschin]

Hi Peng,

On Mon, 15 Jul 2019 03:02:46 +
Peng Fan peng@nxp.com wrote:
... 
> > +static int lpuart_serial_remove(struct udevice *dev) {
> > +   if (dev == gd->cur_serial_dev)
> > +   dev->flags |= DM_FLAG_REMOVE_WITH_PD_ON;  
> 
> How about introduce a device tree property for DM? Then
> Set the flags in common code, not in specific driver.

we should not add more DT properties which are not describing the
hardware, I think. Current plan is to drop this patch and do additional
check dev != gd->cur_serial_dev in device_remove(), as Lokesh suggested.

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Re: [U-Boot] [PATCH v1 8/9] apalis-tk1: remove default vesa vga mode from vidargs

[Oleksandr Suvorov]

On Wed, Jul 31, 2019 at 3:08 PM Igor Opaniuk  wrote:
>
> From: Marcel Ziswiler 
>
> Remove video=tegrafb0:640x480-16@60 aka VESA VGA mode from vidargs in
> order for the panel specification in the device tree to be used. This
> causes the default to be the 10.1" LVDS display which will be available
> in the Toradex webshop shortly.
>
> Signed-off-by: Marcel Ziswiler 
> Signed-off-by: Igor Opaniuk 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  include/configs/apalis-tk1.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
> index 10f2948c62..843e64e3cc 100644
> --- a/include/configs/apalis-tk1.h
> +++ b/include/configs/apalis-tk1.h
> @@ -137,7 +137,7 @@
> "load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
> "source ${loadaddr}\0" \
> USB_BOOTCMD \
> -   "vidargs=video=tegrafb0:640x480-16@60 fbcon=map:1\0"
> +   "vidargs=fbcon=map:1\0"
>
>  /* Increase console I/O buffer size */
>  #undef CONFIG_SYS_CBSIZE
> --
> 2.17.1
>
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4800 (main line)
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Re: [U-Boot] [PATCH v1 6/9] apalis-tk1: switch to zImage

[Oleksandr Suvorov]

On Wed, Jul 31, 2019 at 3:09 PM Igor Opaniuk  wrote:
>
> From: Igor Opaniuk 
>
> Switch to the generic compressed Kernel image type (zImage) instead of
> the U-Boot specific uImage format.
>
> Signed-off-by: Bhuvanchandra DV 
> Signed-off-by: Igor Opaniuk 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  include/configs/apalis-tk1.h | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
> index 0bde1697bb..10f2948c62 100644
> --- a/include/configs/apalis-tk1.h
> +++ b/include/configs/apalis-tk1.h
> @@ -42,7 +42,7 @@
>  #define DFU_ALT_EMMC_INFO  "apalis-tk1.img raw 0x0 0x500 mmcpart 1; " \
> "boot part 0 1 mmcpart 0; " \
> "rootfs part 0 2 mmcpart 0; " \
> -   "uImage fat 0 1 mmcpart 0; " \
> +   "zImage fat 0 1 mmcpart 0; " \
> "tegra124-apalis-eval.dtb fat 0 1 mmcpart 0"
>
>  #define EMMC_BOOTCMD \
> @@ -54,7 +54,7 @@
> "run emmcdtbload; " \
> "load mmc ${emmcdev}:${emmcbootpart} ${kernel_addr_r} " \
> "${boot_file} && run fdt_fixup && " \
> -   "bootm ${kernel_addr_r} - ${dtbparam}\0" \
> +   "bootz ${kernel_addr_r} - ${dtbparam}\0" \
> "emmcbootpart=1\0" \
> "emmcdev=0\0" \
> "emmcdtbload=setenv dtbparam; load mmc ${emmcdev}:${emmcbootpart} " \
> @@ -68,7 +68,7 @@
> "nfsboot=pci enum; run setup; setenv bootargs ${defargs} ${nfsargs} " 
> \
> "${setupargs} ${vidargs}; echo Booting via DHCP/TFTP/NFS...; 
> " \
> "run nfsdtbload; dhcp ${kernel_addr_r} " \
> -   "&& run fdt_fixup && bootm ${kernel_addr_r} - ${dtbparam}\0" \
> +   "&& run fdt_fixup && bootz ${kernel_addr_r} - ${dtbparam}\0" \
> "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} " \
> "${soc}-apalis-${fdt_board}.dtb " \
> "&& setenv dtbparam ${fdt_addr_r}\0"
> @@ -81,7 +81,7 @@
> "${vidargs}; echo Booting from SD card in 8bit slot...; " \
> "run sddtbload; load mmc ${sddev}:${sdbootpart} " \
> "${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
> -   "bootm ${kernel_addr_r} - ${dtbparam}\0" \
> +   "bootz ${kernel_addr_r} - ${dtbparam}\0" \
> "sdbootpart=1\0" \
> "sddev=1\0" \
> "sddtbload=setenv dtbparam; load mmc ${sddev}:${sdbootpart} " \
> @@ -98,7 +98,7 @@
> "${usbargs} ${vidargs}; echo Booting from USB stick...; " \
> "run usbdtbload; load usb ${usbdev}:${usbbootpart} " \
> "${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
> -   "bootm ${kernel_addr_r} - ${dtbparam}\0" \
> +   "bootz ${kernel_addr_r} - ${dtbparam}\0" \
> "usbbootpart=1\0" \
> "usbdev=0\0" \
> "usbdtbload=setenv dtbparam; load usb ${usbdev}:${usbbootpart} " \
> @@ -108,7 +108,7 @@
> "usbrootpart=2\0"
>
>  #define BOARD_EXTRA_ENV_SETTINGS \
> -   "boot_file=uImage\0" \
> +   "boot_file=zImage\0" \
> "console=ttyS0\0" \
> "defargs=lp0_vec=2064@0xf46ff000 core_edp_mv=1150 core_edp_ma=4000 " \
> "usb_port_owner_info=2 lane_owner_info=6 emc_max_dvfs=0 " \
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH v1 5/9] apalis-tk1: add pcie_aspm=off to defargs

[Oleksandr Suvorov]

On Wed, Jul 31, 2019 at 3:09 PM Igor Opaniuk  wrote:
>
> From: Igor Opaniuk 
>
> Disabling ASPM fixes incompatibilities with some PCIe cards
>
> Signed-off-by: Dominik Sliwa 
> Signed-off-by: Igor Opaniuk 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  include/configs/apalis-tk1.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
> index efc52841d1..0bde1697bb 100644
> --- a/include/configs/apalis-tk1.h
> +++ b/include/configs/apalis-tk1.h
> @@ -112,7 +112,7 @@
> "console=ttyS0\0" \
> "defargs=lp0_vec=2064@0xf46ff000 core_edp_mv=1150 core_edp_ma=4000 " \
> "usb_port_owner_info=2 lane_owner_info=6 emc_max_dvfs=0 " \
> -   "user_debug=30\0" \
> +   "user_debug=30 pcie_aspm=off\0" \
> "dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \
> EMMC_BOOTCMD \
> "fdt_board=eval\0" \
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH v1 3/9] apalis-tk1: provide proper USB vendor id

[Oleksandr Suvorov]

On Wed, Jul 31, 2019 at 3:09 PM Igor Opaniuk  wrote:
>
> From: Igor Opaniuk 
>
> Use unified values for USB Product/Vendor numbers
> when the config block is missing
>
> Signed-off-by: Max Krummenacher 
> Signed-off-by: Igor Opaniuk 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  configs/apalis-tk1_defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
> index 41f3aff149..ceefe4e86a 100644
> --- a/configs/apalis-tk1_defconfig
> +++ b/configs/apalis-tk1_defconfig
> @@ -56,7 +56,7 @@ CONFIG_USB_EHCI_TEGRA=y
>  CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="Toradex"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
> -CONFIG_USB_GADGET_PRODUCT_NUM=0x
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
>  CONFIG_CI_UDC=y
>  CONFIG_USB_GADGET_DOWNLOAD=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH v1 2/9] apalis-tk1: set apalis gpio 8 aka fan_en

[Oleksandr Suvorov]

On Wed, Jul 31, 2019 at 3:07 PM Igor Opaniuk  wrote:
>
> From: Igor Opaniuk 
>
> Make sure the Apalis GPIO 8 aka FAN_EN is on when using Apalis TK1
> modules.
>
> Signed-off-by: Igor Opaniuk 
> Signed-off-by: Dominik Sliwa 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  board/toradex/apalis-tk1/apalis-tk1.c | 10 ++
>  1 file changed, 10 insertions(+)
>
> diff --git a/board/toradex/apalis-tk1/apalis-tk1.c 
> b/board/toradex/apalis-tk1/apalis-tk1.c
> index b87e9e7a3e..d57c5042dd 100644
> --- a/board/toradex/apalis-tk1/apalis-tk1.c
> +++ b/board/toradex/apalis-tk1/apalis-tk1.c
> @@ -19,6 +19,7 @@
>
>  #define LAN_DEV_OFF_N  TEGRA_GPIO(O, 6)
>  #define LAN_RESET_NTEGRA_GPIO(S, 2)
> +#define FAN_EN TEGRA_GPIO(DD, 2)
>  #define LAN_WAKE_N TEGRA_GPIO(O, 5)
>  #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
>  #define PEX_PERST_NTEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
> @@ -241,6 +242,15 @@ void tegra_pcie_board_port_reset(struct tegra_pcie_port 
> *port)
>  }
>  #endif /* CONFIG_PCI_TEGRA */
>
> +/*
> + * Enable/start PWM CPU fan
> + */
> +void start_cpu_fan(void)
> +{
> +   gpio_request(FAN_EN, "FAN_EN");
> +   gpio_direction_output(FAN_EN, 1);
> +}
> +
>  /*
>   * Backlight off before OS handover
>   */
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH v1 1/9] apalis-tk1: do not explicitly release reset_moci#

[Oleksandr Suvorov]

On Wed, Jul 31, 2019 at 3:05 PM Igor Opaniuk  wrote:
>
> From: Marcel Ziswiler 
>
> By keeping RESET_MOCI_CTRL low we avoid explicitly releasing
> RESET_MOCI#.
>
> Please note that module hardware versions up to V1.1A will already
> release RESET_MOCI# in hardware coming out of reset.
>
> Please further note that with this change the USB hub on the Apalis
> Evaluation board is kept in reset in U-Boot and therefore none of its
> ports are operational in U-Boot.
>
> Signed-off-by: Marcel Ziswiler 
> Signed-off-by: Igor Opaniuk 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h 
> b/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h
> index 1584d9b2d3..d2d24c4391 100644
> --- a/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h
> +++ b/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h
> @@ -39,7 +39,7 @@ static const struct tegra_gpio_config 
> apalis_tk1_gpio_inits[] = {
> GPIO_INIT(R,1,   OUT0), /* Shift_CTRL_Dir_In[1] */
> GPIO_INIT(R,2,   OUT0), /* Shift_CTRL_OE[3] */
> GPIO_INIT(S,3,   OUT0), /* Shift_CTRL_Dir_In[2] */
> -   GPIO_INIT(U,4,   OUT1),
> +   GPIO_INIT(U,4,   OUT0), /* RESET_MOCI_CTRL */
> GPIO_INIT(W,3,   IN),
> GPIO_INIT(W,5,   IN),
> GPIO_INIT(BB,   0,  IN),
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH 3/4] pci: mediatek: Add pci-driver for mt2701

[Ryder Lee]

+ GSS_MTK_Uboot_upstream 

On Wed, 2019-07-31 at 13:51 +0200, Frank Wunderlich wrote:
> From: Oleksandr Rybalko 
> 
> this chip is used in MT7623 and some other Mediatek SoCs for pcie
> 
> Tested-by: Frank Wunderlich 
> Signed-off-by: Frank Wunderlich 
> Signed-off-by: Oleksandr Rybalko 
> ---
>  drivers/pci/Kconfig  |   6 +
>  drivers/pci/Makefile |   1 +
>  drivers/pci/pci-mt2701.c | 490 +++
>  3 files changed, 497 insertions(+)
>  create mode 100644 drivers/pci/pci-mt2701.c

Rename 'pci-mt2701.c' to 'pcie-mediatek.c' and then change the subject.

Obviously, this is an intermediate version of Linux patch, so I suggest
to take a look at the latest version of vanilla Kernel:
https://github.com/torvalds/linux/blob/master/drivers/pci/controller/pcie-mediatek.c

Please see my comments inline: 

> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index 3fe38f7315..cfe8ba5e52 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -145,4 +145,10 @@ config PCI_MVEBU
> Say Y here if you want to enable PCIe controller support on
> Armada XP/38x SoCs.
> 
> +config PCIE_MT2701
> + bool "Mediatek 2701 PCI-E"
> + help
> +   Say Y here if you want to enable PCIe controller support on
> +   Mediatek MT7623
> +
>  endif
> diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
> index b5ebd50c85..a4c4002b9c 100644
> --- a/drivers/pci/Makefile
> +++ b/drivers/pci/Makefile
> @@ -38,3 +38,4 @@ obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += 
> pcie_layerscape_gen4.o \
>   pcie_layerscape_gen4_fixup.o
>  obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
>  obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
> +obj-$(CONFIG_PCIE_MT2701) += pci-mt2701.o
> diff --git a/drivers/pci/pci-mt2701.c b/drivers/pci/pci-mt2701.c
> new file mode 100644
> index 00..5904f15330
> --- /dev/null
> +++ b/drivers/pci/pci-mt2701.c
> @@ -0,0 +1,490 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + *  Mediatek MT7623 SoC PCIE support
> + *
> + *  Copyright (C) 2015 Mediatek
> + *  Copyright (C) 2015 John Crispin 
> + *  Copyright (C) 2015 Ziv Huang 
> + *  Copyright (C) 2019 Oleksandr Rybalko 
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define iowrite32(v, a)  writel(v, a)
> +#define iowrite16(v, a)  writew(v, a)
> +#define iowrite8(v, a)   writeb(v, a)
> +#define ioread32(a)  readl(a)
> +#define ioread16(a)  readw(a)
> +#define ioread8(a)   readb(a)

Remove these defines.

> +#define RT_HIFSYS_BASE   0x1a00
> +#define RT_PCIE_BASE 0x1a14
> +#define RT_PCIE_IOWIN_BASE   0x1a16
> +#define RT_PCIE_IOWIN_SIZE   0x0001
> +#define RT_PCIE_MEMWIN_BASE  0x6000
> +#define RT_PCIE_MEMWIN_SIZE  0x1000

Move these base to dts.

> +#define RD(x)readl(RT_PCIE_BASE | (x))
> +#define WR(x, v) writel(v, RT_PCIE_BASE | (x))
> +
> +#define SYSCFG1  0x14
> +#define RSTCTL   0x34
> +#define RSTSTAT  0x38
> +#define PCICFG   0x00
> +#define PCIINT   0x08
> +#define PCIENA   0x0c
> +#define CFGADDR  0x20
> +#define CFGDATA  0x24
> +#define MEMBASE  0x28
> +#define IOBASE   0x2c
> +
> +#define BAR0SETUP0x10
> +#define IMBASEBAR0   0x18
> +#define PCIE_CLASS   0x34
> +#define PCIE_SISTAT  0x50
> +
> +#define MTK_PCIE_HIGH_PERF   BIT(14)
> +#define PCIEP0_BASE  0x2000
> +#define PCIEP1_BASE  0x3000
> +#define PCIEP2_BASE  0x4000
> +
> +#define PHY_P0_CTL   0x9000
> +#define PHY_P1_CTL   0xa000
> +#define PHY_P2_CTL   0x4000 /* in USB space */
> +
> +#define RSTCTL_PCIE0_RST BIT(24)
> +#define RSTCTL_PCIE1_RST BIT(25)
> +#define RSTCTL_PCIE2_RST BIT(26)
> +#define MAX_PORT_NUM 3
> +
> +struct resource {
> + char *name;
> + u32 start;
> + u32 end;
> +};
> +
> +struct mt_pcie {
> + char name[16];
> +};
> +
> +static struct mtk_pcie_port {
> + int id;
> + int enable;
> + u32 base;
> + u32 phy_base;
> + u32 perst_n;
> + u32 reset;
> + u32 interrupt_en;
> + int irq;
> + u32 link;
> +} mtk_pcie_port[] = {
> + { 0, 1, PCIEP0_BASE, PHY_P0_CTL, BIT(1), RSTCTL_PCIE0_RST, BIT(20) },
> + { 1, 1, PCIEP1_BASE, PHY_P1_CTL, BIT(2), RSTCTL_PCIE1_RST, BIT(21) },
> + { 2, 0, PCIEP2_BASE, PHY_P2_CTL, BIT(3), RSTCTL_PCIE2_RST, BIT(22) },
> +};

move some of mtk_pcie_port[] to dts.

> +struct mtk_pcie {
> + struct device *dev;
> + void __iomem *sys_base; /* HIF SYSCTL registers */
> + void __iomem *pcie_base;/* PCIE registers */
> + void __iomem *usb_base; /* USB registers */
> +
> + struct resource io;
> + struc

Re: [U-Boot] Please pull u-boot-video

[Tom Rini]

On Tue, Jul 30, 2019 at 08:07:54PM +0200, Anatolij Gustschin wrote:

> Hi Tom,
> 
> here some more video patches I missed to include in the recent pull request.
> Travis CI: https://travis-ci.org/vdsao/u-boot-video/builds/565440648
> 
> Thanks,
> Anatolij
> 
> The following changes since commit 970baf16d1322d3930a57fc78ddfb15d594d690c:
> 
>   video: arm: rpi: Bail out early if querying video information fails 
> (2019-07-29 10:14:04 +0200)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-video.git 
> tags/video-for-2019.10-rc1
> 
> for you to fetch changes up to 42a7ce27d97022f4abbba142dfa00d1450512f0a:
> 
>   mxc_ipuv3_fb.c: enable a backlight on a panel (2019-07-30 12:58:33 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PULL] u-boot-sh/master

[Tom Rini]

On Tue, Jul 30, 2019 at 02:07:23PM +0200, Marek Vasut wrote:

> The following changes since commit 0de815356474912ef5bef9a69f0327a5a93bb2c2:
> 
>   Merge branch '2019-07-17-master-imports' (2019-07-18 11:31:37 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-sh.git master
> 
> for you to fetch changes up to b5f563e588d134b2cb96a2f54332b7727ee4cdad:
> 
>   pinctrl: renesas: fix R-Car gpio0_00 operation fails with 'gpio
> -input' command (2019-07-29 13:38:55 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [GIT PULL] Xilinx/FPGA patches for v2019.10

[Tom Rini]

On Tue, Jul 30, 2019 at 05:23:20PM +0200, Michal Simek wrote:

> Hi Tom,
> 
> I just came from vacation and didn't catch rc1 merge window. Here are
> patches I have collected in connection to Xilinx and FPGA.
> 
> Thanks,
> Michal
> 
> 
> The following changes since commit d0d07ba86afc8074d79e436b1ba4478fa0f0c1b5:
> 
>   Prepare v2019.10-rc1 (2019-07-29 21:16:16 -0400)
> 
> are available in the Git repository at:
> 
>   g...@gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git
> tags/xilinx-for-v2019.10
> 
> for you to fetch changes up to cd228cc04afc79c1383be707d0b812f45dfd53aa:
> 
>   arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabled
> (2019-07-30 17:09:58 +0200)
> 

Applied to u-boot/master, thanks!




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