Re: [U-Boot] [PATCH v2 4/5] arm: socfpga: Add intermediate driver between flash and FPGA manager
On Jum, 2017-08-11 at 17:09 +0200, Marek Vasut wrote: > On 08/10/2017 06:43 AM, Chee, Tien Fong wrote: > > > > On Rab, 2017-08-09 at 10:29 +0200, Marek Vasut wrote: > > > > > > On 08/09/2017 06:50 AM, Chee, Tien Fong wrote: > > > [...] > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > If this is for some FPGA loading, can this functionality > > > > > > > be > > > > > > > scripted > > > > > > > instead? > > > > > > > > > > > > > Sorry, i'm not getting you. How functionality be scripted? > > > > > > Could > > > > > > you > > > > > > provide some example or details explanation? > > > > > ie. "load" (from fs) + "fpga load" (program FPGA) commands ? > > > > > I think the fpga command already has some support for loading > > > > > from FS > > > > > too. > > > > > > > > > Currently, we already have fpga load commands in fpga driver, > > > > fpga > > > > rbf > > > > is loaded to memory, and programmed to fpga from memory, where > > > > memory > > > > location would be decided by user, it could be OCRAM or SDRAM. > > > > > > > > for fpga loadfs command, i plan to implement it after having > > > > complete > > > > boot to U-boot console, since this is quite complex and > > > > involving > > > > some > > > > hardware workaround issue, and some use case scenarios need to > > > > be > > > > considerd. > > > So the arria10 u-boot port is still unable to boot to console ? > > > > > Still need 2 to 3 more patchsets to get it boot to console. > > > > > > > > > > > > > > > For example reconfiguring fpga with periperal rbf can > > > > corrupt the sdram since sdram IOs is part of the fpga periph > > > > rbf. I > > > > need console to run a lot different scenarios testing. > > > OK > > > > > > > > > > > > > > > We still need cff.c, because most functionality in cff.c are > > > > required > > > > by fpga loadfs command. > > > It seems a lot of stuff from this is common code, so why does it > > > have > > > to > > > be in this driver again ? > > This driver contains a lot "smart" functionality such as: > I start to cringe when I read "smart functionality". > > > > > 1: It having ability to the right memory(OCRAM or SDRAM) to achieve > > the > > best FPGA programing performance. > Did you find significant throughput difference ? > 80% performance improvement with SDRAM. > > > > 2: It can determine the right size buffer for the fpga rbf without > > info > > of buffer size defined by user. > You mean like $filesize variable in the command prompt ? > Yeah. No filesize is required. > > > > 3: It has ability to know what kind of fpga rbf type, and security > > type, such as peripheral, core, combined rbf, encryption and > > unencryption based on any fpga file user pass in . > Is this information used for anything ? I was under the impression > that > the user just needs to load in the correct RBF file into the FPGA. > Yeah, the driver would decode the RBF image to know what type of RBF user loading, and applying correct method(buffer allocation, which memory to use and configuration on FPGA manager) to program FPGA. > > > > 4: It supports the checksum. > What checksum ? Can we have a generic hook into the FPGA framework ? > This checksum is to ensure integrity of RBF file after loading from flash into SDRAM. This can help to prevent possibility system instability caused by programming corrupt rbf into FPGA. So, this should be implemented in cff.c . > > > > 5: support raw flash without fs. > This should go into common code. > raw flash is part of common codes in cff.c because it is part of mechanism like fs to determine how loading rbf from flash and program into fpga. > > > > 6: support the file name defined in DTS and U-boot environment > > variable. > I think you should extend the FPGA LOADFS here instead. > The peripheral rbf filename and DTS are generated from our bsp tool. But user can run fpga loadfs to reconfigure FPGA in U-boot console after i have supported it. > > > > > > > > Also, the ifdeffery is awful and the explicit > > > depedence on VFAT when loading from FS is real bad. > > > > > It is because a lot functions is common to sdmmc, nand and qspi in > > different fs such as vfat, ubi and raw. It is unavoidable to have > > some > > ifdeffery if we want to keep the function common to all flashes and > > fs. > Can the FPGA LOADFS be extended generically ? > Yeah, FPGA loadfs is considered when design cff.c. But, i plan to to support FPGA loadfs after having complete boot to U-boot console. > > > > > > > > [...] > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/5] arm: socfpga: Add checking function on FPGA setting in FDT
On Jum, 2017-08-11 at 17:01 +0200, Marek Vasut wrote:
> On 08/10/2017 06:51 AM, Chee, Tien Fong wrote:
> >
> > On Rab, 2017-08-09 at 10:20 +0200, Marek Vasut wrote:
> > >
> > > On 08/09/2017 07:07 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Sel, 2017-08-08 at 11:29 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 08/08/2017 11:12 AM, tien.fong.c...@intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > Function for checking FPGA early release setting which is
> > > > > > defined
> > > > > > by user in FDT chosen section. This function would be used
> > > > > > by
> > > > > > later driver in decision applying appropriate FPGA
> > > > > > configuration in
> > > > > > early release or full FPGA booting mode.
> > > > > Isn't this a property of the FPGA driver ?
> > This is not property of fpga driver. It acts like passing data flag
> > to
> > u-boot, so u-boot knows how to boot in the mode defined by user.
> So it's a configuration option ? Doing what ... since there's no
> binding
> document, it's not clear.
>
Okay, i can add decription into / doc / device-tree-bindings /
chosen.txt.
> >
> > >
> > > >
> > > > >
> > > > > Shouldn't this have altr, prefix ?
> > This node doesn't represet a real device, it acts like a place for
> > passing data to U-boot. So, this flag name doesn't matter with
> > prefix,
> > right?
> But it's altera-specific, so it should have one ?
>
Yeah, i can add it.
> >
> > >
> > > >
> > > > >
> > > > > Did this go through DT binding review?
> > No, refer my explanation above.
> > >
> > > >
> > > > >
> > > > >
> > > > This is our own define under chosen section. This is flag to
> > > > tell
> > > > U-
> > > > boot what kind of boot and what kind of fpga configuration we
> > > > want
> > > > during boot.
> > > And you didn't answer any of the aforementioned questions :(
> > >
> > Sorry, it could be i misunderstand your question. please refer my
> > asnwer in above.
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > > ---
> > > > > > arch/arm/mach-socfpga/include/mach/misc.h | 1 +
> > > > > > arch/arm/mach-socfpga/misc_arria10.c | 20
> > > > > >
> > > > > > 2 files changed, 21 insertions(+)
> > > > > >
> > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > index 0b65783..e003f8a 100644
> > > > > > --- a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > > > @@ -26,6 +26,7 @@ static inline void socfpga_fpga_add(void)
> > > > > > {}
> > > > > > unsigned int dedicated_uart_com_port(const void *blob);
> > > > > > unsigned int shared_uart_com_port(const void *blob);
> > > > > > unsigned int uart_com_port(const void *blob);
> > > > > > +int is_early_release_fpga_config(const void *blob);
> > > > > > #endif
> > > > > >
> > > > > > #endif /* _MISC_H_ */
> > > > > > diff --git a/arch/arm/mach-socfpga/misc_arria10.c
> > > > > > b/arch/arm/mach-
> > > > > > socfpga/misc_arria10.c
> > > > > > index 9d751f6..2d6e977 100644
> > > > > > --- a/arch/arm/mach-socfpga/misc_arria10.c
> > > > > > +++ b/arch/arm/mach-socfpga/misc_arria10.c
> > > > > > @@ -235,6 +235,26 @@ unsigned int uart_com_port(const void
> > > > > > *blob)
> > > > > > return shared_uart_com_port(blob);
> > > > > > }
> > > > > >
> > > > > > +int is_chosen_boolean_true(const void *blob, const char
> > > > > > *name)
> > > > > > +{
> > > > > > + int node;
> > > > > > + int rval = 0;
> > > > > > +
> > > > > > + node = fdt_subnode_offset(blob, 0, "chosen");
> > > > > > +
> > > > > > + if (node >= 0)
> > > > > > + rval = fdtdec_get_bool(blob, node, name);
> > > > > > +
> > > > > > + return rval;
> > > > > > +}
> > > > > > +
> > > > > > +int is_early_release_fpga_config(const void *blob)
> > > > > > +{
> > > > > > + static const char *name = "early-release-fpga-
> > > > > > config";
> > > > > > +
> > > > > > + return is_chosen_boolean_true(blob, name);
> > > > > > +}
> > > > > > +
> > > > > > /*
> > > > > > * Print CPU information
> > > > > > */
> > > > > >
>
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Re: [U-Boot] [PATCH v2 4/5] arm: socfpga: Add intermediate driver between flash and FPGA manager
On Sab, 2017-08-12 at 18:49 +0200, Marek Vasut wrote: > On 08/12/2017 10:03 AM, Chee, Tien Fong wrote: > [...] > > > > > > > > > > > > > 1: It having ability to the right memory(OCRAM or SDRAM) to > > > > achieve > > > > the > > > > best FPGA programing performance. > > > Did you find significant throughput difference ? > > > > > 80% performance improvement with SDRAM. > This looks more like caches are not enabled ... sort of problem ? > It is because SDRAM size large enough to store whole rbf file and reduce significantly of the repetitive block transfer. It requires one time block transfer from SDRAM to FPGA compare to OCRAM which require more than that. > > > > > > > > > > > > > 2: It can determine the right size buffer for the fpga rbf > > > > without > > > > info > > > > of buffer size defined by user. > > > You mean like $filesize variable in the command prompt ? > > > > > Yeah. No filesize is required. > You can use $filesize instead of reimplementing this functionality > yourself though ? > I'am sorry to have confused you. What i trying to say is user no longer require to specify the file size and location when calling fpga loadfs. So, this would keep the thing simple. The driver in cff.c would handle all these troublesome things and deciding the best route for good performance. > > > > > > > > > > > > > 3: It has ability to know what kind of fpga rbf type, and > > > > security > > > > type, such as peripheral, core, combined rbf, encryption and > > > > unencryption based on any fpga file user pass in . > > > Is this information used for anything ? I was under the > > > impression > > > that > > > the user just needs to load in the correct RBF file into the > > > FPGA. > > > > > Yeah, the driver would decode the RBF image to know what type of > > RBF > > user loading, and applying correct method(buffer allocation, which > > memory to use and configuration on FPGA manager) to program FPGA. > If the code needs to extract some information from the RBF to > correctly > configure something in the FPGA manager, then that's where this > should > go then. > Those functions for extracting info from RBF and configuring the FPGA are actually come from fpga driver which i have submited as in previous patchset. The actualy implementation is in cff.c, as i try to explain cff.c drivers are mainly to handle all activities of loading rbf from flashes to program FPGA. > > > > > > > > > > > > > 4: It supports the checksum. > > > What checksum ? Can we have a generic hook into the FPGA > > > framework ? > > > > > This checksum is to ensure integrity of RBF file after loading from > > flash into SDRAM. This can help to prevent possibility system > > instability caused by programming corrupt rbf into FPGA. So, this > > should be implemented in cff.c . > Or the FPGA manager driver . > This integrity checking is implemented during RBF loading from flash to SDRAM before calling the functions from fpga driver to program FPGA. So cff.c which is designed for handling these operation and it should be appropriate place for checksum. > > > > > > > > > > > > > 5: support raw flash without fs. > > > This should go into common code. > > > > > raw flash is part of common codes in cff.c because it is part of > > mechanism like fs to determine how loading rbf from flash and > > program > > into fpga. > By common code I mean the stuff around FPGA LOADFS , so other FPGAs > can > also benefit from that. > But the raw flash to FPGA implementation is designed fully tied to common codes in cff.c. FPGA loadfs would be acted like a wrapper to it, so i am not sure it can be shared by other FPGA. > > > > > > > > > > > > > 6: support the file name defined in DTS and U-boot environment > > > > variable. > > > I think you should extend the FPGA LOADFS here instead. > > > > > The peripheral rbf filename and DTS are generated from our bsp > > tool. > > But user can run fpga loadfs to reconfigure FPGA in U-boot console > > after i have supported it. > And why don't you rather apply some FPGA LOADFS if this property is > detected in the DT instead of reimplementing it ? > We need to program the FPGA IO ring buffer from very early phase in SPL before SDRAM can be initialized. So we need the peripheral rbf file name from DTS, whic
Re: [U-Boot] [PATCH] libfdt: Initialize the stack variable
On Kha, 2017-08-24 at 21:04 -0400, Tom Rini wrote:
> On Thu, Aug 24, 2017 at 01:53:57PM +0800, tien.fong.c...@intel.com
> wrote:
>
> >
> > From: Tien Fong Chee
> >
> > Report Coverity log:
> > The code uses a variable that has not
> > been initialized, leading to unpredictable
> > or unintended results.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > lib/libfdt/fdt_wip.c |2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
> > index 45fb964..01adad0 100644
> > --- a/lib/libfdt/fdt_wip.c
> > +++ b/lib/libfdt/fdt_wip.c
> > @@ -115,7 +115,7 @@ int fdt_find_regions(const void *fdt, char *
> > const inc[], int inc_count,
> > struct fdt_region region[], int max_regions,
> > char *path, int path_len, int add_string_tab)
> > {
> > - int stack[FDT_MAX_DEPTH];
> > + int stack[FDT_MAX_DEPTH] = { 0 };
> > char *end;
> > int nextoffset = 0;
> > uint32_t tag;
> Since this comes from libfdt, have you checked there as well? And in
> general, we use a Reported-by: Coverity (CID: ) for issues. BTW,
> if
> you would like access to the community version of Coverity, please
> sign
> up at https://scan.coverity.com/projects/das-u-boot?tab=overview
> thanks!
I think we didn't check all of them, our coverity only check against
our socfpga use cases. But, i failed to "Add me to project", i can't
view all the defects. Does community coverity found the similar warning
as this patch?
Thanks.
>
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Re: [U-Boot] [PATCH] libfdt: Initialize the stack variable
On Kha, 2017-08-24 at 21:04 -0400, Tom Rini wrote:
> On Thu, Aug 24, 2017 at 01:53:57PM +0800, tien.fong.c...@intel.com
> wrote:
>
> >
> > From: Tien Fong Chee
> >
> > Report Coverity log:
> > The code uses a variable that has not
> > been initialized, leading to unpredictable
> > or unintended results.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > lib/libfdt/fdt_wip.c |2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
> > index 45fb964..01adad0 100644
> > --- a/lib/libfdt/fdt_wip.c
> > +++ b/lib/libfdt/fdt_wip.c
> > @@ -115,7 +115,7 @@ int fdt_find_regions(const void *fdt, char *
> > const inc[], int inc_count,
> > struct fdt_region region[], int max_regions,
> > char *path, int path_len, int add_string_tab)
> > {
> > - int stack[FDT_MAX_DEPTH];
> > + int stack[FDT_MAX_DEPTH] = { 0 };
> > char *end;
> > int nextoffset = 0;
> > uint32_t tag;
> Since this comes from libfdt, have you checked there as well? And in
> general, we use a Reported-by: Coverity (CID: ) for issues. BTW,
> if
> you would like access to the community version of Coverity, please
> sign
> up at https://scan.coverity.com/projects/das-u-boot?tab=overview
> thanks!
>
Okay, i can add myself to Das U-boot coverity project finally. This
warning is reported by CID: 60519. I will send out another patch with
Reported-by in commit messages.
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Re: [U-Boot] [PATCH 01/19] configs: Add FPGA loadfs config for Arria 10
On Sel, 2017-08-29 at 13:51 +0200, Marek Vasut wrote: > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > This config allow FPGA design loaded from FAT fs to FPGA manager. > > > > Signed-off-by: Tien Fong Chee > > --- > > configs/socfpga_arria10_defconfig |1 + > > 1 files changed, 1 insertions(+), 0 deletions(-) > > > > diff --git a/configs/socfpga_arria10_defconfig > > b/configs/socfpga_arria10_defconfig > > index 53ab66f..d555743 100644 > > --- a/configs/socfpga_arria10_defconfig > > +++ b/configs/socfpga_arria10_defconfig > > @@ -29,3 +29,4 @@ CONFIG_DWAPB_GPIO=y > > CONFIG_DM_MMC=y > > CONFIG_SYS_NS16550=y > > CONFIG_USE_TINY_PRINTF=y > > +CONFIG_CMD_FPGA_LOADFS=y > You should enable stuff only after you add the necessary support bits > ... > I enabled it as early as possible, because i would like to use compiling for detecting any code errors while adding the neccesssary support bits. I can rearrange the patches sequence. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA
On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote:
> On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This driver handles FPGA program operation from flash loading
> > RBF to memory and then to program FPGA.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > .../include/mach/fpga_manager_arria10.h| 27 ++
> > drivers/fpga/socfpga_arria10.c | 386
> > +++-
> > include/altera.h |6 +
> > include/configs/socfpga_common.h |4 +
> > 4 files changed, 422 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/arm/mach-
> > socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-
> > socfpga/include/mach/fpga_manager_arria10.h
> > index 9cbf696..93a9122 100644
> > --- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > @@ -8,6 +8,8 @@
> > #ifndef _FPGA_MANAGER_ARRIA10_H_
> > #define _FPGA_MANAGER_ARRIA10_H_
> >
> > +#include
> > +
> > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK
> > BIT(0)
> > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK
> > BIT(1)
> > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK
> > BIT(2)
> > @@ -89,11 +91,36 @@ struct socfpga_fpga_manager {
> > u32 imgcfg_fifo_status;
> > };
> >
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +enum rbf_type {unknown, periph_section, core_section};
> > +enum rbf_security {invalid, unencrypted, encrypted};
> > +
> > +struct rbf_info {
> > + enum rbf_type section;
> > + enum rbf_security security;
> > +};
> > +
> > +struct flash_info {
> > + char *interface;
> > + char *dev_part;
> > + char *filename;
> > + int fstype;
> > + u32 remaining;
> > + u32 flash_offset;
> > + struct rbf_info rbfinfo;
> > + struct image_header header;
> > +};
> > +#endif
> > +
> > /* Functions */
> > int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
> > int fpgamgr_program_finish(void);
> > int is_fpgamgr_user_mode(void);
> > int fpgamgr_wait_early_user_mode(void);
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +const char *get_cff_filename(const void *fdt, int *len, u32 core);
> > +const char *get_cff_devpart(const void *fdt, int *len);
> > +#endif
> >
> > #endif /* __ASSEMBLY__ */
> >
> > diff --git a/drivers/fpga/socfpga_arria10.c
> > b/drivers/fpga/socfpga_arria10.c
> > index 5c1a68a..90c55e5 100644
> > --- a/drivers/fpga/socfpga_arria10.c
> > +++ b/drivers/fpga/socfpga_arria10.c
> > @@ -13,6 +13,12 @@
> > #include
> > #include
> > #include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > #include
> > #include
> >
> > @@ -22,6 +28,10 @@
> > #define COMPRESSION_OFFSET 229
> > #define FPGA_TIMEOUT_MSEC 1000 /* timeout in ms */
> > #define FPGA_TIMEOUT_CNT 0x100
> > +#define RBF_UNENCRYPTED0xa65c
> > +#define RBF_ENCRYPTED 0xa65d
> > +#define ARRIA10RBF_PERIPH 0x0001
> > +#define ARRIA10RBF_CORE0x8001
> >
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -118,7 +128,7 @@ static int
> > wait_for_nconfig_pin_and_nstatus_pin(void)
> > return wait_for_bit(__func__,
> > &fpga_manager_base->imgcfg_stat,
> > mask,
> > - false, FPGA_TIMEOUT_MSEC, false);
> > + true, FPGA_TIMEOUT_MSEC, false);
> > }
> >
> > static int wait_for_f2s_nstatus_pin(unsigned long value)
> > @@ -453,6 +463,281 @@ int fpgamgr_program_finish(void)
> > return 0;
> > }
> >
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +const char *get_cff_filename(const void *fdt, int *len, u32 core)
> > +{
> > + const char *cff_filename = NULL;
> > + const char *cell;
> > + int nodeoffset;
> > + nodeoffset = fdt_subnode_offset(fdt, 0, "chosen");
> > +
> > + if (nodeoffset >= 0) {
> > + if (core)
> > + cell = fdt_getprop(fdt,
> > + nodeoffset,
> > + "cffcore-file",
> > + len);
> > + else
> > + cell = fdt_getprop(fdt, nodeoffset, "cff-
> > file", len);
> This should be a property of the FPGA , not the system . You can have
> multiple FPGAs and then this would become a problem.
>
This setting is for the only one FPGA inside our SoCFPGA. For external
multiple FPGAs programming, user is adviced to store the FPGA filename
in environment variable and programming FPGA with fpga loadfs command.
Please note that, peripheral rbf and partition are required in SPL to
set up DDR before booting to U-boot.
> >
> > +
> > + if (cell)
> > + cff_filename = cell;
> > + }
> > +
> > + return cff_filename;
> > +}
> > +
> > +const char *get_cff_devpart(const void *fdt, int *len)
> > +{
> > + const char *cff
Re: [U-Boot] [PATCH 04/19] arm: socfpga: Add FPGA loadfs command support
On Sel, 2017-08-29 at 13:57 +0200, Marek Vasut wrote:
> On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This patch enables FPGA loadfs command support to U-boot console.
> >
> > Signed-off-by: Tien Fong Chee
> But you enabled support for this in patch 1/19 ... ordering issue ?
> Patch changelog doesn't match what the patch does ...
>
This patch is adding the FPGA loadfs command support for Arria 10.
I enabled FPGA loadfs in patch 1/19, so i can compile the changes in
this patch immediately.
So, you want me to improve the commit message and reordering?
> >
> > ---
> > cmd/fpga.c|2 +-
> > drivers/fpga/altera.c | 38 ++---
> > -
> > drivers/fpga/fpga.c |8
> > include/fpga.h|2 ++
> > 4 files changed, 41 insertions(+), 9 deletions(-)
> >
> > diff --git a/cmd/fpga.c b/cmd/fpga.c
> > index 016349f..28e6628 100644
> > --- a/cmd/fpga.c
> > +++ b/cmd/fpga.c
> > @@ -363,7 +363,7 @@ U_BOOT_CMD(fpga, 6, 1, do_fpga,
> > "(Xilinx only)\n"
> > #endif
> > #if defined(CONFIG_CMD_FPGA_LOADFS)
> > - "Load device from filesystem (FAT by default) (Xilinx
> > only)\n"
> > + "Load device from filesystem (FAT by default)\n"
> > " loadfs [dev] [address] [image size] [blocksize]
> > \n"
> > "[] \n"
> > #endif
> > diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
> > index 135a357..8b60bd5 100644
> > --- a/drivers/fpga/altera.c
> > +++ b/drivers/fpga/altera.c
> > @@ -23,25 +23,30 @@ static const struct altera_fpga {
> > enum altera_family family;
> > const char *name;
> > int (*load)(Altera_desc *, const
> > void *, size_t);
> > + int (*loadfs)(Altera_desc *, const
> > void *, size_t,
> > + fpga_fs_info *);
> > int (*dump)(Altera_desc *, const
> > void *, size_t);
> > int (*info)(Altera_desc *);
> > } altera_fpga[] = {
> > #if defined(CONFIG_FPGA_ACEX1K)
> > - { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump,
> > ACEX1K_info },
> > - { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump,
> > ACEX1K_info },
> > + { Altera_ACEX1K, "ACEX1K", ACEX1K_load, NULL, ACEX1K_dump,
> > ACEX1K_info },
> > + { Altera_CYC2, "ACEX1K", ACEX1K_load, NULL, ACEX1K_dump,
> > ACEX1K_info },
> > #elif defined(CONFIG_FPGA_CYCLON2)
> > - { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump,
> > CYC2_info },
> > - { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump,
> > CYC2_info },
> > + { Altera_ACEX1K, "CycloneII", CYC2_load, NULL, CYC2_dump,
> > CYC2_info },
> > + { Altera_CYC2, "CycloneII", CYC2_load, NULL, CYC2_dump,
> > CYC2_info },
> > #endif
> > #if defined(CONFIG_FPGA_STRATIX_II)
> > - { Altera_StratixII, "StratixII", StratixII_load,
> > + { Altera_StratixII, "StratixII", StratixII_load, NULL,
> > StratixII_dump, StratixII_info },
> > #endif
> > #if defined(CONFIG_FPGA_STRATIX_V)
> > - { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL
> > },
> > + { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL,
> > NULL },
> > #endif
> > -#if defined(CONFIG_FPGA_SOCFPGA)
> > - { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
> > +#if defined(CONFIG_FPGA_SOCFPGA) &&
> > !defined(CONFIG_CMD_FPGA_LOADFS)
> > + { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL,
> > NULL },
> > +#endif
> > +#if defined(CONFIG_FPGA_SOCFPGA) &&
> > defined(CONFIG_CMD_FPGA_LOADFS)
> > + { Altera_SoCFPGA, "SoC FPGA", socfpga_load,
> > socfpga_loadfs, NULL, NULL },
> > #endif
> > };
> >
> > @@ -174,3 +179,20 @@ int altera_info(Altera_desc *desc)
> >
> > return FPGA_SUCCESS;
> > }
> > +
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +int altera_loadfs(Altera_desc *desc, const void *buf, size_t
> > bsize,
> > + fpga_fs_info *fpga_fsinfo)
> > +{
> > + const struct altera_fpga *fpga = altera_desc_to_fpga(desc,
> > __func__);
> > +
> > + if (!fpga)
> > + return FPGA_FAIL;
> > +
> > + debug_cond(FPGA_DEBUG, "%s: Launching the %s FS
> > Loader...\n",
> > + __func__, fpga->name);
> > + if (fpga->loadfs)
> > + return fpga->loadfs(desc, buf, bsize,
> > fpga_fsinfo);
> > + return 0;
> > +}
> > +#endif
> > diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
> > index e0fb1b4..42e901e 100644
> > --- a/drivers/fpga/fpga.c
> > +++ b/drivers/fpga/fpga.c
> > @@ -198,6 +198,14 @@ int fpga_fsload(int devnum, const void *buf,
> > size_t size,
> > fpga_no_sup((char *)__func__, "Xilinx
> > devices");
> > #endif
> > break;
> > +#if defined(CONFIG_FPGA_ALTERA)
> > + case fpga_altera:
> > + ret_val = altera_loadfs(desc->devdesc,
> > buf, size,
> > + fpga_fsinfo);
> Why is this not a generic code ? Load stuff from FS and pr
Re: [U-Boot] [PATCH 05/19] arm: socfpga: Enhance FPGA program support with at least 4 byte data
On Sel, 2017-08-29 at 13:58 +0200, Marek Vasut wrote:
> On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This patch enables FPGA program with minimum 4 byte data size.
> What does that mean ? Expand the description, it's inobvious
>
The exisitng FPGA program function only support the FPGA data which
size is >= 32 bytes. For the size smaller than that, the operation
would have failed.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > drivers/fpga/socfpga.c | 14 --
> > 1 files changed, 8 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
> > index 28fa16b..6e14ebd 100644
> > --- a/drivers/fpga/socfpga.c
> > +++ b/drivers/fpga/socfpga.c
> > @@ -1,5 +1,5 @@
> > /*
> > - * Copyright (C) 2012 Altera Corporation
> > + * Copyright (C) 2012-2017 Altera Corporation
> > * All rights reserved.
> > *
> > * SPDX-License-Identifier:BSD-3-Clause
> > @@ -55,18 +55,20 @@ void fpgamgr_program_write(const void
> > *rbf_data, size_t rbf_size)
> > uint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);
> >
> > asm volatile(
> > + " cmp %2, #0\n"
> > + " beq 2f\n"
> > "1: ldmia %0!,{r0-r7}\n"
> > " stmia %1!,{r0-r7}\n"
> > " sub %1, #32\n"
> > " subs%2, #1\n"
> > " bne 1b\n"
> > - " cmp %3, #0\n"
> > - " beq 3f\n"
> > - "2: ldr %2, [%0], #4\n
> > "
> > + "2: cmp %3, #0\n"
> > + " beq 4f\n"
> > + "3: ldr %2, [%0], #4\n
> > "
> > " str %2, [%1]\n"
> > " subs%3, #1\n"
> > - " bne 2b\n"
> > - "3: nop\n"
> > + " bne 3b\n"
> > + "4: nop\n"
> > : "+r"(src), "+r"(dst), "+r"(loops32),
> > "+r"(loops4) :
> > : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
> > "cc");
> > }
> >
>
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Re: [U-Boot] [PATCH 06/19] arm: socfpga: Rename the gen5 sdram driver to more specific name
On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:
> On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Current sdram driver is only applied to gen5 device, hence it is
> > better
> > to rename sdram driver to more specific name which is related to
> > gen5
> > device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/mach-socfpga/include/mach/sdram.h | 436 +---
> >
> > .../include/mach/{sdram.h => sdram_gen5.h} |6 +-
> > drivers/ddr/altera/Makefile|2 +-
> > drivers/ddr/altera/{sdram.c => sdram_gen5.c} |0
> > 4 files changed, 9 insertions(+), 435 deletions(-)
> > copy arch/arm/mach-socfpga/include/mach/{sdram.h => sdram_gen5.h}
> > (99%)
> > rename drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)
> >
> > diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
> > b/arch/arm/mach-socfpga/include/mach/sdram.h
> > index b11228f..f471913 100644
> > --- a/arch/arm/mach-socfpga/include/mach/sdram.h
> > +++ b/arch/arm/mach-socfpga/include/mach/sdram.h
> > @@ -1,442 +1,16 @@
> > /*
> > - * Copyright Altera Corporation (C) 2014-2015
> > + * Copyright (C) 2017 Intel Corporation
> > *
> > - * SPDX-License-Identifier:GPL-2.0+
> > + * SPDX-License-Identifier:GPL-2.0
> NAK, do NOT change the license.
>
> Also, use git format-patch -M -C for renames
>
Okay.
> >
> > */
> > #ifndef_SDRAM_H_
> > #define_SDRAM_H_
> >
> > #ifndef __ASSEMBLY__
> >
> > -unsigned long sdram_calculate_size(void);
> > -int sdram_mmr_init_full(unsigned int sdr_phy_reg);
> > -int sdram_calibration_full(void);
> > -
> > -const struct socfpga_sdram_config *socfpga_get_sdram_config(void);
> > -
> > -void socfpga_get_seq_ac_init(const u32 **init, unsigned int
> > *nelem);
> > -void socfpga_get_seq_inst_init(const u32 **init, unsigned int
> > *nelem);
> > -const struct socfpga_sdram_rw_mgr_config
> > *socfpga_get_sdram_rwmgr_config(void);
> > -const struct socfpga_sdram_io_config
> > *socfpga_get_sdram_io_config(void);
> > -const struct socfpga_sdram_misc_config
> > *socfpga_get_sdram_misc_config(void);
> > -
> > -#define SDR_CTRLGRP_ADDRESS(SOCFPGA_SDR_ADDRESS | 0x5000)
> > -
> > -struct socfpga_sdr_ctrl {
> > - u32 ctrl_cfg;
> > - u32 dram_timing1;
> > - u32 dram_timing2;
> > - u32 dram_timing3;
> > - u32 dram_timing4; /* 0x10 */
> > - u32 lowpwr_timing;
> > - u32 dram_odt;
> > - u32 extratime1;
> > - u32 __padding0[3];
> > - u32 dram_addrw; /* 0x2c */
> > - u32 dram_if_width; /* 0x30 */
> > - u32 dram_dev_width;
> > - u32 dram_sts;
> > - u32 dram_intr;
> > - u32 sbe_count; /* 0x40 */
> > - u32 dbe_count;
> > - u32 err_addr;
> > - u32 drop_count;
> > - u32 drop_addr; /* 0x50 */
> > - u32 lowpwr_eq;
> > - u32 lowpwr_ack;
> > - u32 static_cfg;
> > - u32 ctrl_width; /* 0x60 */
> > - u32 cport_width;
> > - u32 cport_wmap;
> > - u32 cport_rmap;
> > - u32 rfifo_cmap; /* 0x70 */
> > - u32 wfifo_cmap;
> > - u32 cport_rdwr;
> > - u32 port_cfg;
> > - u32 fpgaport_rst; /* 0x80 */
> > - u32 __padding1;
> > - u32 fifo_cfg;
> > - u32 protport_default;
> > - u32 prot_rule_addr; /* 0x90 */
> > - u32 prot_rule_id;
> > - u32 prot_rule_data;
> > - u32 prot_rule_rdwr;
> > - u32 __padding2[3];
> > - u32 mp_priority;/* 0xac */
> > - u32 mp_weight0; /* 0xb0 */
> > - u32 mp_weight1;
> > - u32 mp_weight2;
> > - u32 mp_weight3;
> > - u32 mp_pacing0; /* 0xc0 */
> > - u32 mp_pacing1;
> > - u32 mp_pacing2;
> > - u32 mp_pacing3;
> > - u32 mp_threshold0; /* 0xd0 */
> > - u32 mp_threshold1;
> > - u32 mp_threshold2;
> > - u32 __padding3[29];
> > - u32 phy_ctrl0; /* 0x150 */
> > - u32 phy_ctrl1;
> > - u32 phy_ctrl2;
> > -};
> > -
> > -/* SDRAM configuration structure for the SPL. */
> > -struct socfpga_sdram_config {
> > - u32 ctrl_cfg;
> > - u32 dram_timing1;
> > - u32 dram_timing2;
> > - u32 dram_timing3;
> > - u32 dram_timing4;
> > - u32 lowpwr_timing;
> > - u32 dram_odt;
> > - u32 extratime1;
> > - u32 dram_addrw;
> > - u32 dram_if_width;
> > - u32 dram_dev_width;
> > - u32 dram_intr;
> > - u32 lowpwr_eq;
> > - u32 static_cfg;
> > - u32 ctrl_width;
> > - u32 cport_width;
> > - u32 cport_wmap;
> > - u32 cport_rmap;
> > - u32 rfifo_cmap;
> > - u32 wfifo_cmap;
> > - u32 cport_rdwr;
> > - u32 port_cfg;
> > - u32 fpgaport_rst;
> > - u32 fifo_cfg;
> > - u32 mp_priority;
> > - u32 mp_weight0;
> > - u32 mp_weight1;
> > - u32 mp_weight2;
> > - u32 mp_weight3;
>
Re: [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function
On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:
> On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add function for both multiple DRAM bank and single DRAM bank size
> > initialization. This common functionality could be used by every
> > single
> > SOCFPGA board.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/mach-socfpga/board.c| 12
> > include/configs/socfpga_common.h |1 +
> > 2 files changed, 13 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > socfpga/board.c
> > index a41d089..3f2e30a 100644
> > --- a/arch/arm/mach-socfpga/board.c
> > +++ b/arch/arm/mach-socfpga/board.c
> > @@ -29,6 +29,18 @@ int board_init(void)
> > return 0;
> > }
> >
> > +int dram_init_banksize(void)
> > +{
> > +#if !defined(CONFIG_SYS_SDRAM_BASE) &&
> > !defined(CONFIG_SYS_SDRAM_SIZE)
> > + fdtdec_setup_memory_banksize();
> This should work on al boards, so why do you need this macro ?
> Also, this should go into arch/arm/ , not board/
>
In case these macros are not defined, then we need to get the info from
DTS. This is in arch/arm/mach-socpfga/board.c . I found some in
arch/arm, and other in board/ .
> >
> > +#else
> > + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
> > + gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
> > +#endif
> > +
> > + return 0;
> > +}
> > +
> > #ifdef CONFIG_USB_GADGET
> > struct dwc2_plat_otg_data socfpga_otg_data = {
> > .usb_gusbcfg= 0x1417,
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > index c15d244..05b03bd 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -47,6 +47,7 @@
> > (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> >
> > #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> > +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
> > #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > #define CONFIG_SYS_TEXT_BASE 0x0840
> > #else
> >
>
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Re: [U-Boot] [PATCH 01/19] configs: Add FPGA loadfs config for Arria 10
On Rab, 2017-08-30 at 10:45 +0200, Marek Vasut wrote: > On 08/30/2017 07:59 AM, Chee, Tien Fong wrote: > > > > On Sel, 2017-08-29 at 13:51 +0200, Marek Vasut wrote: > > > > > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > This config allow FPGA design loaded from FAT fs to FPGA > > > > manager. > > > > > > > > Signed-off-by: Tien Fong Chee > > > > --- > > > > configs/socfpga_arria10_defconfig |1 + > > > > 1 files changed, 1 insertions(+), 0 deletions(-) > > > > > > > > diff --git a/configs/socfpga_arria10_defconfig > > > > b/configs/socfpga_arria10_defconfig > > > > index 53ab66f..d555743 100644 > > > > --- a/configs/socfpga_arria10_defconfig > > > > +++ b/configs/socfpga_arria10_defconfig > > > > @@ -29,3 +29,4 @@ CONFIG_DWAPB_GPIO=y > > > > CONFIG_DM_MMC=y > > > > CONFIG_SYS_NS16550=y > > > > CONFIG_USE_TINY_PRINTF=y > > > > +CONFIG_CMD_FPGA_LOADFS=y > > > You should enable stuff only after you add the necessary support > > > bits > > > ... > > > > > I enabled it as early as possible, because i would like to use > > compiling for detecting any code errors while adding the > > neccesssary > > support bits. I can rearrange the patches sequence. > > > Except you enable feature which cannot work, so this is wrong. If you > need this for debugging purposes, great, but in the series it should > go > after the groundwork is laid. > Okay, i will reorder the series of patches. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA
On Rab, 2017-08-30 at 10:52 +0200, Marek Vasut wrote:
> On 08/30/2017 10:05 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote:
> > >
> > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This driver handles FPGA program operation from flash loading
> > > > RBF to memory and then to program FPGA.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > .../include/mach/fpga_manager_arria10.h| 27 ++
> > > > drivers/fpga/socfpga_arria10.c | 386
> > > > +++-
> > > > include/altera.h |6 +
> > > > include/configs/socfpga_common.h |4 +
> > > > 4 files changed, 422 insertions(+), 1 deletions(-)
> > > >
> > > > diff --git a/arch/arm/mach-
> > > > socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-
> > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > index 9cbf696..93a9122 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > > > @@ -8,6 +8,8 @@
> > > > #ifndef _FPGA_MANAGER_ARRIA10_H_
> > > > #define _FPGA_MANAGER_ARRIA10_H_
> > > >
> > > > +#include
> > > > +
> > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK
> > > > BIT(0)
> > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK
> > > > BIT(1)
> > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK
> > > > BIT(2)
> > > > @@ -89,11 +91,36 @@ struct socfpga_fpga_manager {
> > > > u32 imgcfg_fifo_status;
> > > > };
> > > >
> > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > +enum rbf_type {unknown, periph_section, core_section};
> > > > +enum rbf_security {invalid, unencrypted, encrypted};
> > > > +
> > > > +struct rbf_info {
> > > > + enum rbf_type section;
> > > > + enum rbf_security security;
> > > > +};
> > > > +
> > > > +struct flash_info {
> > > > + char *interface;
> > > > + char *dev_part;
> > > > + char *filename;
> > > > + int fstype;
> > > > + u32 remaining;
> > > > + u32 flash_offset;
> > > > + struct rbf_info rbfinfo;
> > > > + struct image_header header;
> > > > +};
> > > > +#endif
> > > > +
> > > > /* Functions */
> > > > int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
> > > > int fpgamgr_program_finish(void);
> > > > int is_fpgamgr_user_mode(void);
> > > > int fpgamgr_wait_early_user_mode(void);
> > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > +const char *get_cff_filename(const void *fdt, int *len, u32
> > > > core);
> > > > +const char *get_cff_devpart(const void *fdt, int *len);
> > > > +#endif
> > > >
> > > > #endif /* __ASSEMBLY__ */
> > > >
> > > > diff --git a/drivers/fpga/socfpga_arria10.c
> > > > b/drivers/fpga/socfpga_arria10.c
> > > > index 5c1a68a..90c55e5 100644
> > > > --- a/drivers/fpga/socfpga_arria10.c
> > > > +++ b/drivers/fpga/socfpga_arria10.c
> > > > @@ -13,6 +13,12 @@
> > > > #include
> > > > #include
> > > > #include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > #include
> > > > #include
> > > >
> > > > @@ -22,6 +28,10 @@
> > > > #define COMPRESSION_OFFSET 229
> > > > #define FPGA_TIMEOUT_MSEC 1000 /* timeout in ms */
> > > > #define FPGA_TIMEOUT_CNT 0x100
> > > > +#define RBF_UNENCRYPTED0xa65c
> > > > +#define RBF_ENCRYPTED 0xa65d
> > > > +#define ARRIA10RBF_PERIPH 0x0001
> > > > +#define ARRIA10RBF_CORE0x8001
> > > >
> > > > DECLARE_GLOBAL_DATA_
Re: [U-Boot] [PATCH 05/19] arm: socfpga: Enhance FPGA program support with at least 4 byte data
On Rab, 2017-08-30 at 10:55 +0200, Marek Vasut wrote:
> On 08/30/2017 10:24 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-08-29 at 13:58 +0200, Marek Vasut wrote:
> > >
> > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This patch enables FPGA program with minimum 4 byte data size.
> > > What does that mean ? Expand the description, it's inobvious
> > >
> > The exisitng FPGA program function only support the FPGA data which
> > size is >= 32 bytes. For the size smaller than that, the operation
> > would have failed.
> Because ... ?
>
> And you fix it how ... ?
>
> That should be in the commit message, describe the problem and how
> you
> fix it.
>
Okay.
> >
> > >
> > > >
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > drivers/fpga/socfpga.c | 14 --
> > > > 1 files changed, 8 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
> > > > index 28fa16b..6e14ebd 100644
> > > > --- a/drivers/fpga/socfpga.c
> > > > +++ b/drivers/fpga/socfpga.c
> > > > @@ -1,5 +1,5 @@
> > > > /*
> > > > - * Copyright (C) 2012 Altera Corporation
> > > > + * Copyright (C) 2012-2017 Altera Corporation
> > > > * All rights reserved.
> > > > *
> > > > * SPDX-License-Identifier:BSD-3-Clause
> > > > @@ -55,18 +55,20 @@ void fpgamgr_program_write(const void
> > > > *rbf_data, size_t rbf_size)
> > > > uint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);
> > > >
> > > > asm volatile(
> > > > + " cmp %2, #0\n"
> > > > + " beq 2f\n"
> > > > "1: ldmia %0!,{r0-r7}\n"
> > > > " stmia %1!,{r0-r7}\n"
> > > > " sub %1, #32\n"
> > > > " subs%2, #1\n"
> > > > " bne 1b\n"
> > > > - " cmp %3, #0\n"
> > > > - " beq 3f\n"
> > > > - "2: ldr %2, [%0],
> > > > #4\n
> > > > "
> > > > + "2: cmp %3, #0\n"
> > > > + " beq 4f\n"
> > > > + "3: ldr %2, [%0],
> > > > #4\n
> > > > "
> > > > " str %2, [%1]\n"
> > > > " subs%3, #1\n"
> > > > - " bne 2b\n"
> > > > - "3: nop\n"
> > > > + " bne 3b\n"
> > > > + "4: nop\n"
> > > > : "+r"(src), "+r"(dst), "+r"(loops32),
> > > > "+r"(loops4) :
> > > > : "r0", "r1", "r2", "r3", "r4", "r5", "r6",
> > > > "r7",
> > > > "cc");
> > > > }
> > > >
>
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Re: [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function
On Rab, 2017-08-30 at 10:56 +0200, Marek Vasut wrote:
> On 08/30/2017 10:36 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:
> > >
> > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Add function for both multiple DRAM bank and single DRAM bank
> > > > size
> > > > initialization. This common functionality could be used by
> > > > every
> > > > single
> > > > SOCFPGA board.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > arch/arm/mach-socfpga/board.c| 12
> > > > include/configs/socfpga_common.h |1 +
> > > > 2 files changed, 13 insertions(+), 0 deletions(-)
> > > >
> > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > > > socfpga/board.c
> > > > index a41d089..3f2e30a 100644
> > > > --- a/arch/arm/mach-socfpga/board.c
> > > > +++ b/arch/arm/mach-socfpga/board.c
> > > > @@ -29,6 +29,18 @@ int board_init(void)
> > > > return 0;
> > > > }
> > > >
> > > > +int dram_init_banksize(void)
> > > > +{
> > > > +#if !defined(CONFIG_SYS_SDRAM_BASE) &&
> > > > !defined(CONFIG_SYS_SDRAM_SIZE)
> > > > + fdtdec_setup_memory_banksize();
> > > This should work on al boards, so why do you need this macro ?
> > > Also, this should go into arch/arm/ , not board/
> > >
> > In case these macros are not defined, then we need to get the info
> > from
> > DTS. This is in arch/arm/mach-socpfga/board.c . I found some in
> > arch/arm, and other in board/ .
> Every socfpga platform in u-boot has a dts, so you can always extract
> the memory config from it and it's the preferred method.
>
This implementation supports both method, from header or DTS.
> >
> > >
> > > >
> > > >
> > > > +#else
> > > > + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
> > > > + gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
> > > > +#endif
> > > > +
> > > > + return 0;
> > > > +}
> > > > +
> > > > #ifdef CONFIG_USB_GADGET
> > > > struct dwc2_plat_otg_data socfpga_otg_data = {
> > > > .usb_gusbcfg= 0x1417,
> > > > diff --git a/include/configs/socfpga_common.h
> > > > b/include/configs/socfpga_common.h
> > > > index c15d244..05b03bd 100644
> > > > --- a/include/configs/socfpga_common.h
> > > > +++ b/include/configs/socfpga_common.h
> > > > @@ -47,6 +47,7 @@
> > > > (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> > > >
> > > > #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> > > > +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
> > > > #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > > > #define CONFIG_SYS_TEXT_BASE 0x0840
> > > > #else
> > > >
>
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Re: [U-Boot] [PATCH] libfdt: Initialize the stack variable
On Rab, 2017-08-30 at 06:31 -0700, J. William Campbell wrote:
> On 8/29/2017 10:15 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Report Coverity log:
> > The code uses a variable that has not
> > been initialized, leading to unpredictable
> > or unintended results.
> >
> > Reported-by: Coverity (CID: 60519)
> > Signed-off-by: Tien Fong Chee
> > ---
> > lib/libfdt/fdt_wip.c |2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
> > index 45fb964..01adad0 100644
> > --- a/lib/libfdt/fdt_wip.c
> > +++ b/lib/libfdt/fdt_wip.c
> > @@ -115,7 +115,7 @@ int fdt_find_regions(const void *fdt, char *
> > const inc[], int inc_count,
> > struct fdt_region region[], int max_regions,
> > char *path, int path_len, int
> > add_string_tab)
> > {
> > - int stack[FDT_MAX_DEPTH];
> > + int stack[FDT_MAX_DEPTH] = { 0 };
> It seems to me that one of three things must be true. 1) Coverity
> can't
> correctly analyze the code and stack[] is not used in an un-
> initialized
> manner, 2) stack is used in an un-initialized manner but the result
> is
> not used in that case and is a "don't care" or 3) there is a bug in
> the
> code. It seems that just initializing the variable to 0 is a "Bad
> Idea(tm)". If it is case 1 or 2, there should be a Coverity code
> annotation comment added to that effect, and if it is case 3, it
> should
> be fixed. Initializing this variable makes the binary larger to no
> purpose unless there is a bug already.
>
> Best Regards,
> J. William Campbell
Yeah, i agree with you, state machine design should ensure stack[] is
not used in a uninitialized manner. Hence, i need input from whom
familiar with this function, whether this warning fall in anyone of
these conditions. If we just direct init the stack[], and this solution
will make extra 128 bytes in binary, but having variable with default
value is also good pratice from software quality perspective.
> >
> > char *end;
> > int nextoffset = 0;
> > uint32_t tag;
>
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Re: [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function
On Isn, 2017-09-04 at 11:40 +0200, Marek Vasut wrote:
> On 09/04/2017 09:11 AM, Chee, Tien Fong wrote:
> >
> > On Rab, 2017-08-30 at 10:56 +0200, Marek Vasut wrote:
> > >
> > > On 08/30/2017 10:36 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > Add function for both multiple DRAM bank and single DRAM
> > > > > > bank
> > > > > > size
> > > > > > initialization. This common functionality could be used by
> > > > > > every
> > > > > > single
> > > > > > SOCFPGA board.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > > ---
> > > > > > arch/arm/mach-socfpga/board.c| 12
> > > > > > include/configs/socfpga_common.h |1 +
> > > > > > 2 files changed, 13 insertions(+), 0 deletions(-)
> > > > > >
> > > > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > > > > > socfpga/board.c
> > > > > > index a41d089..3f2e30a 100644
> > > > > > --- a/arch/arm/mach-socfpga/board.c
> > > > > > +++ b/arch/arm/mach-socfpga/board.c
> > > > > > @@ -29,6 +29,18 @@ int board_init(void)
> > > > > > return 0;
> > > > > > }
> > > > > >
> > > > > > +int dram_init_banksize(void)
> > > > > > +{
> > > > > > +#if !defined(CONFIG_SYS_SDRAM_BASE) &&
> > > > > > !defined(CONFIG_SYS_SDRAM_SIZE)
> > > > > > + fdtdec_setup_memory_banksize();
> > > > > This should work on al boards, so why do you need this macro
> > > > > ?
> > > > > Also, this should go into arch/arm/ , not board/
> > > > >
> > > > In case these macros are not defined, then we need to get the
> > > > info
> > > > from
> > > > DTS. This is in arch/arm/mach-socpfga/board.c . I found some in
> > > > arch/arm, and other in board/ .
> > > Every socfpga platform in u-boot has a dts, so you can always
> > > extract
> > > the memory config from it and it's the preferred method.
> > >
> > This implementation supports both method, from header or DTS.
> We want to support only the DT method, so drop the other one.
>
Okay, noted.
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Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA
On Isn, 2017-09-04 at 11:39 +0200, Marek Vasut wrote:
> On 09/04/2017 09:08 AM, Chee, Tien Fong wrote:
> >
> > On Rab, 2017-08-30 at 10:52 +0200, Marek Vasut wrote:
> > >
> > > On 08/30/2017 10:05 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > This driver handles FPGA program operation from flash
> > > > > > loading
> > > > > > RBF to memory and then to program FPGA.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > > ---
> > > > > > .../include/mach/fpga_manager_arria10.h| 27
> > > > > > ++
> > > > > > drivers/fpga/socfpga_arria10.c | 386
> > > > > > +++-
> > > > > > include/altera.h |6
> > > > > > +
> > > > > > include/configs/socfpga_common.h |4
> > > > > > +
> > > > > > 4 files changed, 422 insertions(+), 1 deletions(-)
> > > > > >
> > > > > > diff --git a/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > b/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > index 9cbf696..93a9122 100644
> > > > > > --- a/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > +++ b/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > @@ -8,6 +8,8 @@
> > > > > > #ifndef _FPGA_MANAGER_ARRIA10_H_
> > > > > > #define _FPGA_MANAGER_ARRIA10_H_
> > > > > >
> > > > > > +#include
> > > > > > +
> > > > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK
> > > > > >
> > > > > > BIT(0)
> > > > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK
> > > > > >
> > > > > > BIT(1)
> > > > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK
> > > > > >
> > > > > > BIT(2)
> > > > > > @@ -89,11 +91,36 @@ struct socfpga_fpga_manager {
> > > > > > u32 imgcfg_fifo_status;
> > > > > > };
> > > > > >
> > > > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > > > +enum rbf_type {unknown, periph_section, core_section};
> > > > > > +enum rbf_security {invalid, unencrypted, encrypted};
> > > > > > +
> > > > > > +struct rbf_info {
> > > > > > + enum rbf_type section;
> > > > > > + enum rbf_security security;
> > > > > > +};
> > > > > > +
> > > > > > +struct flash_info {
> > > > > > + char *interface;
> > > > > > + char *dev_part;
> > > > > > + char *filename;
> > > > > > + int fstype;
> > > > > > + u32 remaining;
> > > > > > + u32 flash_offset;
> > > > > > + struct rbf_info rbfinfo;
> > > > > > + struct image_header header;
> > > > > > +};
> > > > > > +#endif
> > > > > > +
> > > > > > /* Functions */
> > > > > > int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
> > > > > > int fpgamgr_program_finish(void);
> > > > > > int is_fpgamgr_user_mode(void);
> > > > > > int fpgamgr_wait_early_user_mode(void);
> > > > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > > > +const char *get_cff_filename(const void *fdt, int *len,
> > > > > > u32
> > > > > > core);
> > > > > > +const char *get_cff_devpart(const void *fdt, int *len);
> > > > > > +#endif
> > > > > >
> > > > > > #endif
Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA
On Sel, 2017-09-05 at 11:04 +0200, Marek Vasut wrote:
> On 09/05/2017 07:53 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-04 at 11:39 +0200, Marek Vasut wrote:
> > >
> > > On 09/04/2017 09:08 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Rab, 2017-08-30 at 10:52 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 08/30/2017 10:05 AM, Chee, Tien Fong wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote:
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > > > > >
> > > > > > > >
> > > > > > > >
> > > > > > > >
> > > > > > > > From: Tien Fong Chee
> > > > > > > >
> > > > > > > > This driver handles FPGA program operation from flash
> > > > > > > > loading
> > > > > > > > RBF to memory and then to program FPGA.
> > > > > > > >
> > > > > > > > Signed-off-by: Tien Fong Chee > > > > > > > >
> > > > > > > > ---
> > > > > > > > .../include/mach/fpga_manager_arria10.h|
> > > > > > > > 27
> > > > > > > > ++
> > > > > > > > drivers/fpga/socfpga_arria10.c |
> > > > > > > > 386
> > > > > > > > +++-
> > > > > > > > include/altera.h |
> > > > > > > > 6
> > > > > > > > +
> > > > > > > > include/configs/socfpga_common.h |
> > > > > > > > 4
> > > > > > > > +
> > > > > > > > 4 files changed, 422 insertions(+), 1 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/arch/arm/mach-
> > > > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > > > b/arch/arm/mach-
> > > > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > > > index 9cbf696..93a9122 100644
> > > > > > > > --- a/arch/arm/mach-
> > > > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > > > +++ b/arch/arm/mach-
> > > > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > > > @@ -8,6 +8,8 @@
> > > > > > > > #ifndef _FPGA_MANAGER_ARRIA10_H_
> > > > > > > > #define _FPGA_MANAGER_ARRIA10_H_
> > > > > > > >
> > > > > > > > +#include
> > > > > > > > +
> > > > > > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK
> > > > > > > >
> > > > > > > > BIT(0)
> > > > > > > > #define
> > > > > > > > ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK
> > > > > > > >
> > > > > > > > BIT(1)
> > > > > > > > #define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK
> > > > > > > >
> > > > > > > > BIT(2)
> > > > > > > > @@ -89,11 +91,36 @@ struct socfpga_fpga_manager {
> > > > > > > > u32 imgcfg_fifo_status;
> > > > > > > > };
> > > > > > > >
> > > > > > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > > > > > +enum rbf_type {unknown, periph_section, core_section};
> > > > > > > > +enum rbf_security {invalid, unencrypted, encrypted};
> > > > > > > > +
> > > > > > > > +struct rbf_info {
> > > > > > > > + enum rbf_type section;
> > > > > > > > + enum rbf_security security;
> > > > > > > > +};
> > > > > > > > +
> > > > > > > > +struct flash_info {
> > > >
Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA
On Sel, 2017-09-05 at 11:36 +0200, Marek Vasut wrote: > On 09/05/2017 11:23 AM, Chee, Tien Fong wrote: > > > > On Sel, 2017-09-05 at 11:04 +0200, Marek Vasut wrote: > > > > > > On 09/05/2017 07:53 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > On Isn, 2017-09-04 at 11:39 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > On 09/04/2017 09:08 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > > > > > > > > > > > > > On Rab, 2017-08-30 at 10:52 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > On 08/30/2017 10:05 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com > > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > > > > > > > > > > > > > This driver handles FPGA program operation from > > > > > > > > > > flash > > > > > > > > > > loading > > > > > > > > > > RBF to memory and then to program FPGA. > > > > > > > > > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > > > > > > .com > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > --- > > > > > > > > > > .../include/mach/fpga_manager_arria10.h > > > > > > > > > > | > > > > > > > > > > 27 > > > > > > > > > > ++ > > > > > > > > > > drivers/fpga/socfpga_arria10.c > > > > > > > > > > | > > > > > > > > > > 386 > > > > > > > > > > +++- > > > > > > > > > > include/altera.h > > > > > > > > > > | > > > > > > > > > > 6 > > > > > > > > > > + > > > > > > > > > > include/configs/socfpga_common.h > > > > > > > > > > | > > > > > > > > > > 4 > > > > > > > > > > + > > > > > > > > > > 4 files changed, 422 insertions(+), 1 deletions(-) > > > > > > > > > > > > > > > > > > > > diff --git a/arch/arm/mach- > > > > > > > > > > socfpga/include/mach/fpga_manager_arria10.h > > > > > > > > > > b/arch/arm/mach- > > > > > > > > > > socfpga/include/mach/fpga_manager_arria10.h > > > > > > > > > > index 9cbf696..93a9122 100644 > > > > > > > > > > --- a/arch/arm/mach- > > > > > > > > > > socfpga/include/mach/fpga_manager_arria10.h > > > > > > > > > > +++ b/arch/arm/mach- > > > > > > > > > > socfpga/include/mach/fpga_manager_arria10.h > > > > > > > > > > @@ -8,6 +8,8 @@ > > > > > > > > > > #ifndef _FPGA_MANAGER_ARRIA10_H_ > > > > > > > > > > #define _FPGA_MANAGER_ARRIA10_H_ > > > > > > > > > > > > > > > > > > > > +#include > > > > > > > > > > + > > > > > > > > > > #define > > > > > > > > > > ALT
Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA
On Rab, 2017-09-06 at 09:10 +0200, Marek Vasut wrote: > On 09/06/2017 07:06 AM, Chee, Tien Fong wrote: > [...] > > > > > > > > > > > > > > > > > > > > > > > > > > The BSP tool is used to describe internal FPGA in SOCFPGA. > > > > > > Other > > > > > > external FPGAs other than SOCFPGA itself, it can be > > > > > > programmed > > > > > > through > > > > > > U-boot. > > > > > The BSP tool is broken if it generates broken DT, do I have > > > > > to > > > > > repeat > > > > > myself ? > > > > > > > > > BSP tool is only generate the RBF filename for FPGA inside > > > > SOCFPGA. > > > > Multiple external FPGA are configured through U-boot. > > > What happens if you have FPGA connector over SPI ? > > > > > I assume you are saying FPGA connected to EPCQ > No, I mean FPGA connected over SPI bus. > > > > > , and this is one of the > > external FPGA configuration, like PCIE. For any external FPGA > > configuration, FPGA itself/external HOST would get the FPGA data > > from > > storage such as EPCQ and configuring the FPGA without > > HPS/Bootloader > > intervine. SPL/U-boot would skip the FPGA configuration process > > when > > they see the mode is set to external FPGA configuration. > > > > I know you want a DT to describe all FPGAs with FPGA node and their > > own > > data filename in every node. But, at this moment, all external > > FPGAs > > chip other than SOCFPGA itself are configured through U-boot(script > > & > > env variable), or external FPGA configuration method. > I want DT which describes hardware and is not misdesigned crap. > Just because the BSP tool is broken does not mean I can allow > upstream > to accept that, no way. > > > > > How about i just create a FPGA node for SOCFPGA, with FPGA data > > filename within the node? > Isn't that what the FPGA manager in mainline Linux does already ? > Yeah, i will port from Linux DTS, and filenames added into the node. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot
On Isn, 2017-09-25 at 11:24 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Enable SPL loading U-boot from SDMMC to DDR and booting U-boot.
> This patch seems to be doing more than just one thing ...
>
I can split into two patches:
1) Enable DDR up by configuring FPGA so SPL able loading U-boot to DDR
2) Setting up configs so SPL can boot U-boot from FAT.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/mach-socfpga/spl.c | 55
> > +
> > common/spl/spl_mmc.c | 2 +-
> > configs/socfpga_arria10_defconfig | 57
> > ++-
> > include/spl.h | 2 ++
> > 4 files changed, 108 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-
> > socfpga/spl.c
> > index aba116d..9b381bb 100644
> > --- a/arch/arm/mach-socfpga/spl.c
> > +++ b/arch/arm/mach-socfpga/spl.c
> > @@ -15,6 +15,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -22,6 +23,10 @@
> > #include
> > #include
> > #include
> > +#include
> > +#include
> > +#include
> > +#include
> > #include
> > #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > #include
> > @@ -29,6 +34,9 @@
> >
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > +#define BSIZE 4096
> > +#define PERIPH_RBF 0
> > +
> > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > static struct pl310_regs *const pl310 =
> > (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
> > @@ -197,6 +205,12 @@ void board_init_f(ulong dummy)
> > #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > void spl_board_init(void)
> > {
> > + int rval = 0;
> > + int len = 0;
> > + u32 buffer[BSIZE] __aligned(ARCH_DMA_MINALIGN);
> > + struct spl_boot_device bootdev;
> > + fpga_fs_info fpga_fsinfo;
> > +
> > /* configuring the clock based on handoff */
> > cm_basic_init(gd->fdt_blob);
> > WATCHDOG_RESET();
> > @@ -214,6 +228,47 @@ void spl_board_init(void)
> >
> > /* Add device descriptor to FPGA device table */
> > socfpga_fpga_add();
> > +
> > + bootdev.boot_device = spl_boot_device();
> > +
> > + if (BOOT_DEVICE_MMC1 == bootdev.boot_device) {
> > + struct mmc *mmc = NULL;
> > + int err = 0;
> > +
> > + spl_mmc_find_device(&mmc, bootdev.boot_device);
> > +
> > + err = mmc_init(mmc);
> > +
> > + if (err) {
> > +#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
> > + printf("spl: mmc init failed with error:
> > %d\n", err);
> > +#endif
> > + }
> > +
> > + fpga_fsinfo.dev_part = (char *)get_cff_devpart(gd-
> > >fdt_blob,
> > + &
> > len);
> > +
> > + fpga_fsinfo.filename = (char
> > *)get_cff_filename(gd->fdt_blob,
> > + &
> > len,
> > + PE
> > RIPH_RBF);
> > +
> > + fpga_fsinfo.interface = "mmc";
> > +
> > + fpga_fsinfo.fstype = FS_TYPE_FAT;
> > + } else {
> > + printf("Invalid boot device!\n");
> > + return;
> > + }
> > +
> > + /* Program peripheral RBF */
> > + if (fpga_fsinfo.filename && fpga_fsinfo.dev_part && (len >
> > 0))
> > + rval = fpga_fsload(0, buffer, BSIZE,
> > &fpga_fsinfo);
> > +
> > + if (rval > 0) {
> > + config_pins(gd->fdt_blob, "shared");
> > +
> > + ddr_calibration_sequence();
> > + }
> > }
> >
> > void board_init_f(ulong dummy)
> > diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
> > index b26..159443f 100644
> > --- a/common/spl/spl_mmc.c
> > +++ b/common/spl/spl_mmc.c
> > @@ -113,7 +113,7 @@ static int spl_mmc_get_device_index(u32
> > boot_device)
> > return -ENODEV;
> > }
> >
> > -static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
> > +int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
> > {
> > #if CONFIG_IS_ENABLED(DM_MMC)
> > struct udevice *dev;
> > diff --git a/configs/socfpga_arria10_defconfig
> > b/configs/socfpga_arria10_defconfig
> > index 4c73d73..2ff9801 100644
> > --- a/configs/socfpga_arria10_defconfig
> > +++ b/configs/socfpga_arria10_defconfig
> > @@ -2,33 +2,76 @@ CONFIG_ARM=y
> > CONFIG_ARCH_SOCFPGA=y
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
> > +CONFIG_SPL_STACK_R_ADDR=0x0080
> > CONFIG_IDENT_STRING="socfpga_arria10"
> > CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
> > -CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyS0,115200"
> > CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
> > +CONFIG_FIT=y
> > +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
> > +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
> > +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
> > +CONFIG_SPL_ENV_SUPPORT=y
> > +CONFIG_VERSION_VARIABLE=y
> > CONFIG_SP
Re: [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot
On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > Clock frequency info is required in U-boot. > > > > Signed-off-by: Tien Fong Chee > I want a TB on Gen 5 > What is TB? > > > > --- > > arch/arm/mach-socfpga/board.c | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach- > > socfpga/board.c > > index 965f9dc..a00f63b 100644 > > --- a/arch/arm/mach-socfpga/board.c > > +++ b/arch/arm/mach-socfpga/board.c > > @@ -8,7 +8,10 @@ > > > > #include > > #include > > +#include > > #include > > +#include > > +#include > > #include > > > > #include > > @@ -26,6 +29,9 @@ int board_init(void) > > /* Address of boot parameters for ATAG (if ATAG is used) > > */ > > gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; > > > > + /* configuring the clock based on handoff */ > > + cm_basic_init(gd->fdt_blob); > > + > > return 0; > > } > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > Enhance preloader header with both additional program length and > > program > > entry offset attributes, which offset is relative to the start of > > program > > header. > > > > Signed-off-by: Tien Fong Chee > > --- > > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > > b/arch/arm/mach-socfpga/include/mach/boot0.h > > index 22d9e7f..33c9368 100644 > > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > > @@ -11,8 +11,15 @@ > > .balignl 64,0xf33db33f; > > > > .word 0x1337c0d3; /* SoCFPGA preloader > > validation word */ > > - .word 0xc01df00d; /* Version, flags, length > > */ > > - .word 0xcafec0d3; /* Checksum, zero-pad */ > > + .word 0xc01df00d; /* Header > > length(2B),flags(1B),version(1B) */ > > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > > + .word 0xfeedface; /* Program length(4B) */ > Keep this indent intact, then it won't generate these crappy - > entries. > Are you saying to keep the comment indent intact, and allign with 1st comment /* SoCFPGA preloader validation word */ ? > > > > + .word 0xf00dcafe; /* > > + * Program entry offset(4B),relative > > to > > + * the start of program header > > + */ > > +#endif > > + .word 0xcafec0d3; /* Simple > > checksum(2B),spare offset(2B) */ > > nop; > > > > b reset;/* SoCFPGA jumps here */ > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 14/19] arm: socfpga: Enable build for DDR Arria 10
On Isn, 2017-09-25 at 11:20 +0200, Marek Vasut wrote: > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > This patch is for enabling the DDR support on Arria 10. > > > > Signed-off-by: Tien Fong Chee > > --- > > drivers/ddr/altera/Makefile | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/ddr/altera/Makefile > > b/drivers/ddr/altera/Makefile > > index ac4ab85..02f8b7c 100644 > > --- a/drivers/ddr/altera/Makefile > > +++ b/drivers/ddr/altera/Makefile > > @@ -10,4 +10,5 @@ > > > > ifdef CONFIG_ALTERA_SDRAM > > obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o > > +obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o > > endif > > > This should be part of the patch which added the sdram_arria10.c > Okay. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 15/19] arm: socfpga: Add support to memory allocation in SPL
On Isn, 2017-09-25 at 11:21 +0200, Marek Vasut wrote: > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > Add support to memory allocation in SPL for preparation to enable > > FAT > > in SPL. Memory allocation is needed by FAT to work properly. > > > > Signed-off-by: Tien Fong Chee > Gen 5 does have malloc support in SPL, so what's the deal here ? > For FAT to work properly in Arria 10 SPL, SPL malloc need to be enabled, and the min of SPL malloc size is 0x2000. FAT needed in Arria 10 SPL, because u-boot.img is stored in FAT partition. > > > > --- > > include/configs/socfpga_common.h | 23 ++- > > 1 file changed, 22 insertions(+), 1 deletion(-) > > > > diff --git a/include/configs/socfpga_common.h > > b/include/configs/socfpga_common.h > > index 7549ee8..9b6719e 100644 > > --- a/include/configs/socfpga_common.h > > +++ b/include/configs/socfpga_common.h > > @@ -280,17 +280,34 @@ unsigned int > > cm_get_qspi_controller_clk_hz(void); > > /* > > * SPL > > * > > - * SRAM Memory layout: > > + * SRAM Memory layout for gen 5: > > * > > * 0x_ .. Start of SRAM > > * 0x_ .. Top of stack (grows down) > > * 0x_ .. Malloc area > > * 0x_ .. Global Data > > * 0x_FF00 .. End of SRAM > > + * > > + * SRAM Memory layout for Arria 10: > > + * 0xFFE0_ .. Start of SRAM (bottom) > > + * 0xFFEx_ .. Top of stack (grows down to bottom) > > + * 0xFFEy_ .. Malloc area (grows up to top) > > + * 0xFFEz_ .. Global Data > > + * 0xFFE3_ .. End of SRAM (top) > > */ > > #define CONFIG_SPL_FRAMEWORK > > #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_AD > > DR > > #define CONFIG_SPL_MAX_SIZECONFIG_SYS_INIT_RAM_SIZ > > E > > +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) > > +/* SPL memory allocation configuration, it is required by FAT > > feature */ > > +#ifndef CONFIG_SYS_SPL_MALLOC_START > > +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 > > +#define CONFIG_SYS_SPL_MALLOC_START(CONFIG_SYS_INIT_RAM_SI > > ZE - \ > > + GENERATED_GBL_DATA_SIZE - > > \ > > + CONFIG_SYS_SPL_MALLOC_SIZ > > E + \ > > + CONFIG_SYS_INIT_RAM_ADDR) > > +#endif > > +#endif > > > > /* SPL SDMMC boot support */ > > #ifdef CONFIG_SPL_MMC_SUPPORT > > @@ -320,7 +337,11 @@ unsigned int > > cm_get_qspi_controller_clk_hz(void); > > /* > > * Stack setup > > */ > > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) > > #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR > > +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) > > +#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_STA > > RT - 1) > > +#endif > > > > /* Extra Environment */ > > #ifndef CONFIG_SPL_BUILD > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 12/19] arm: socfpga: Add DDR driver for Arria 10
On Isn, 2017-09-25 at 11:19 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add DDR driver suppport for Arria 10.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/mach-socfpga/include/mach/sdram.h | 2 +
> > arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 103 ++-
> > drivers/ddr/altera/sdram_arria10.c | 735
> > +
> > 3 files changed, 839 insertions(+), 1 deletion(-)
> > create mode 100644 drivers/ddr/altera/sdram_arria10.c
> >
> > diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
> > b/arch/arm/mach-socfpga/include/mach/sdram.h
> > index 4a9754e..b833fc2 100644
> > --- a/arch/arm/mach-socfpga/include/mach/sdram.h
> > +++ b/arch/arm/mach-socfpga/include/mach/sdram.h
> > @@ -10,6 +10,8 @@
> >
> > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > #include
> > +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > +#include
> > #endif
> >
> > #endif
> > diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > index 1d7b7c1..7af9431 100644
> > --- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > +++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > @@ -1,5 +1,5 @@
> > /*
> > - * Copyright (C) 2015-2017 Intel Corporation
> > + * Copyright (C) 2017 Intel Corporation
> > *
> > * SPDX-License-Identifier:GPL-2.0
> > */
> > @@ -8,6 +8,7 @@
> > #define _SOCFPGA_SDRAM_ARRIA10_H_
> >
> > #ifndef __ASSEMBLY__
> > +int ddr_calibration_sequence(void);
> >
> > struct socfpga_ecc_hmc {
> > u32 ip_rev_id;
> > @@ -204,6 +205,106 @@ struct socfpga_io48_mmr {
> > u32 niosreserve1;
> > u32 niosreserve2;
> > };
> > +
> > +union dramaddrw_reg {
> > + struct {
> > + u32 cfg_col_addr_width:5;
> > + u32 cfg_row_addr_width:5;
> > + u32 cfg_bank_addr_width:4;
> > + u32 cfg_bank_group_addr_width:2;
> > + u32 cfg_cs_addr_width:3;
> > + u32 reserved:13;
> > + };
> Use regular macros for bitfields, not this crap.
>
Why regular macros is prefered? Above implementation improve
readability, simplify the implementation and saving memory.
> >
> > + u32 word;
> > +};
> > +
> > +union ctrlcfg0_reg {
> > + struct {
> > + u32 cfg_mem_type:4;
> > + u32 cfg_dimm_type:3;
> > + u32 cfg_ac_pos:2;
> > + u32 cfg_ctrl_burst_len:5;
> > + u32 reserved:18; /* Other fields unused */
> > + };
> > + u32 word;
> > +};
> [...]
>
> >
> > diff --git a/drivers/ddr/altera/sdram_arria10.c
> > b/drivers/ddr/altera/sdram_arria10.c
> > new file mode 100644
> > index 000..f22a726
> > --- /dev/null
> > +++ b/drivers/ddr/altera/sdram_arria10.c
> > @@ -0,0 +1,735 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> Why does an SDRAM init driver need access to ns16550 UART , MMC and
> NAND ?
>
I will remove them.
> >
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +static void sdram_mmr_init(void);
> > +static unsigned long long sdram_size_calc(void);
> > +
> > +/* FAWBANK - Number of Bank of a given device involved in the FAW
> > period. */
> > +#define ARRIA10_SDR_ACTIVATE_FAWBANK (0x1)
> > +
> > +#define ARRIA_DDR_CONFIG(A, B, C, R) ((A<<24)|(B<<16)|(C<<8
> > )|R)
> Missing parenthesis around (A), (B) etc. ...
>
Okay.
> >
> > +#define DDR_CONFIG_ELEMENTS(sizeof(ddr_config)/sizeof(u32)
> > )
> So this is ARRAY_SIZE() ?
>
Yes. i will use ARRAY_SIZE().
> >
> > +#define DDR_REG_SEQ2CORE0xFFD0507C
> > +#define DDR_REG_CORE2SEQ0xFFD05078
> > +#define DDR_READ_LATENCY_DELAY 40
> > +#define DDR_SIZE_2GB_HEX 0x8000
> > +#define DDR_MAX_TRIES 0x0010
> > +
> > +#define IO48_MMR_DRAMSTS 0xFFCFA0EC
> > +#define IO48_MMR_NIOS2_RESERVE00xFFCFA110
> > +#define IO48_MMR_NIOS2_RESERVE10xFFCFA114
> > +#define IO48_MMR_NIOS2_RESERVE20xFFCFA118
> > +
> > +#define SEQ2CORE_MASK 0xF
> > +#define CORE2SEQ_INT_REQ 0xF
> > +#define SEQ2CORE_INT_RESP_BIT 3
> > +
> > +static const struct socfpga_ecc_hmc *socfpga_ecc_hmc_base =
> > + (void *)SOCFPGA_SDR_ADDRESS;
> > +static const struct socfpga_noc_ddr_scheduler
> > *socfpga_noc_ddr_scheduler_base =
> > + (void *)SOCFPGA_SDR_SCHEDULER_ADDRESS;
> > +static const struct socfpga_noc_fw_ddr_mpu_fpga2sdram
> > + *socfpga_noc_fw_ddr_mpu_fpga2sdram_base =
> > + (void *)SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS;
> > +static const struct socfpga_noc_fw_ddr_l3
> > *socfpga_noc_fw_ddr_l3_base =
> > + (void *)SOCFPGA_SDR_FIREWALL_L3_ADDRESS;
> > +static const struct socfpga_io48_m
Re: [U-Boot] [PATCH v2 11/19] arm: socfpga: Add DRAM bank size initialization function
On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add function for both multiple DRAM bank and single DRAM bank size
> > initialization. This common functionality could be used by every
> > single
> > SOCFPGA board.
> >
> > Signed-off-by: Tien Fong Chee
> I'd like TB on Gen5.
>
What is TB?
> >
> > ---
> > arch/arm/mach-socfpga/board.c| 7 +++
> > include/configs/socfpga_common.h | 1 +
> > 2 files changed, 8 insertions(+)
> >
> > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > socfpga/board.c
> > index a41d089..965f9dc 100644
> > --- a/arch/arm/mach-socfpga/board.c
> > +++ b/arch/arm/mach-socfpga/board.c
> > @@ -29,6 +29,13 @@ int board_init(void)
> > return 0;
> > }
> >
> > +int dram_init_banksize(void)
> > +{
> > + fdtdec_setup_memory_banksize();
> > +
> > + return 0;
> > +}
> > +
> > #ifdef CONFIG_USB_GADGET
> > struct dwc2_plat_otg_data socfpga_otg_data = {
> > .usb_gusbcfg= 0x1417,
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > index eadce2d..7549ee8 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -47,6 +47,7 @@
> > (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> >
> > #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> > +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
> > #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > #define CONFIG_SYS_TEXT_BASE 0x0840
> > #else
> >
>
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Re: [U-Boot] [PATCH v2 10/19] arm: socfpga: Rename the gen5 sdram driver to more specific name
On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Current sdram driver is only applied to gen5 device, hence it is
> > better
> > to rename sdram driver to more specific name which is related to
> > gen5
> > device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/mach-socfpga/include/mach/sdram.h | 434 +--
> > --
> > .../include/mach/{sdram.h => sdram_gen5.h} | 6 +-
> > drivers/ddr/altera/Makefile| 2 +-
> > drivers/ddr/altera/{sdram.c => sdram_gen5.c} | 0
> > 4 files changed, 8 insertions(+), 434 deletions(-)
> > copy arch/arm/mach-socfpga/include/mach/{sdram.h => sdram_gen5.h}
> > (99%)
> > rename drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)
> >
> > diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
> > b/arch/arm/mach-socfpga/include/mach/sdram.h
> > index b11228f..4a9754e 100644
> > --- a/arch/arm/mach-socfpga/include/mach/sdram.h
> > +++ b/arch/arm/mach-socfpga/include/mach/sdram.h
> > @@ -1,5 +1,5 @@
> > /*
> > - * Copyright Altera Corporation (C) 2014-2015
> > + * Copyright (C) 2017 Intel Corporation
> Retain the old copyright ?
>
Okay.
> >
> > *
> > * SPDX-License-Identifier:GPL-2.0+
> > */
> > @@ -8,435 +8,9 @@
> >
> > #ifndef __ASSEMBLY__
> What's with this massive deletion here ?
>
Move to sdram_gen5.h . This header should contain common stuff.
> >
> > -unsigned long sdram_calculate_size(void);
> > -int sdram_mmr_init_full(unsigned int sdr_phy_reg);
> > -int sdram_calibration_full(void);
> > -
> > -const struct socfpga_sdram_config *socfpga_get_sdram_config(void);
> > -
> > -void socfpga_get_seq_ac_init(const u32 **init, unsigned int
> > *nelem);
> > -void socfpga_get_seq_inst_init(const u32 **init, unsigned int
> > *nelem);
> > -const struct socfpga_sdram_rw_mgr_config
> > *socfpga_get_sdram_rwmgr_config(void);
> [...]
>
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Re: [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash
On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > These drivers handle FPGA program operation from flash loading
> > RBF to memory and then to program FPGA.
> >
> > Signed-off-by: Tien Fong Chee
> Did you run checkpatch on this before submitting ? I presume no ...
>
Yeah, i run checkpatch for all patches. What's the issue here?
> >
> > ---
> > .../include/mach/fpga_manager_arria10.h| 27 ++
> > drivers/fpga/socfpga_arria10.c | 391
> > -
> > include/altera.h | 6 +
> > include/configs/socfpga_common.h | 4 +
> > 4 files changed, 425 insertions(+), 3 deletions(-)
> [...]
>
> >
> > @@ -112,13 +122,14 @@ static int
> > wait_for_nconfig_pin_and_nstatus_pin(void)
> > unsigned long mask =
> > ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
> > ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATU
> > S_PIN_SET_MSK;
> >
> > - /* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop
> > until de-asserted,
> > - * timeout at 1000ms
> > + /*
> > + * Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop
> > until
> > + * de-asserted, timeout at 1000ms
> > */
> > return wait_for_bit(__func__,
> > &fpga_manager_base->imgcfg_stat,
> > mask,
> > - false, FPGA_TIMEOUT_MSEC, false);
> > + true, FPGA_TIMEOUT_MSEC, false);
> > }
> Seems more like a fix, split this out.
>
Okay.
> >
> > static int wait_for_f2s_nstatus_pin(unsigned long value)
> > @@ -469,6 +480,7 @@ int socfpga_load(Altera_desc *desc, const void
> > *rbf_data, size_t rbf_size)
> >
> > /* Initialize the FPGA Manager */
> > status = fpgamgr_program_init((u32 *)rbf_data, rbf_size);
> > +
> > if (status)
> > return status;
> >
> > @@ -477,3 +489,376 @@ int socfpga_load(Altera_desc *desc, const
> > void *rbf_data, size_t rbf_size)
> >
> > return fpgamgr_program_finish();
> > }
> > +
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +const char *get_cff_filename(const void *fdt, int *len, u32 core)
> > +{
> > + const char *cff_filename = NULL;
> > + const char *cell;
> > + int nodeoffset;
> > + nodeoffset = fdtdec_next_compatible(fdt, 0,
> > + COMPAT_ALTERA_SOCFPGA_FPGA0);
> > +
> > + if (nodeoffset >= 0) {
> > + if (core)
> > + cell = fdt_getprop(fdt,
> > + nodeoffset,
> > + "bitstream_core",
> > + len);
> > + else
> > + cell = fdt_getprop(fdt, nodeoffset,
> > "bitstream_periph",
> > + len);
> > +
> > + if (cell)
> > + cff_filename = cell;
> > + }
> > +
> > + return cff_filename;
> > +}
> > +
> > +const char *get_cff_devpart(const void *fdt, int *len)
> > +{
> > + const char *cff_devpart = NULL;
> > + const char *cell;
> > + int nodeoffset;
> > + nodeoffset = fdtdec_next_compatible(fdt, 0,
> > + COMPAT_ALTERA_SOCFPGA_FPGA0);
> > +
> > + cell = fdt_getprop(fdt, nodeoffset, "bitstream_devpart",
> > len);
> > +
> > + if (cell)
> > + cff_devpart = cell;
> > +
> > + return cff_devpart;
> > +}
> Take a look at splash*.c , I believe that can be reworked into
> generic
> firmware loader , which you could then use here.
>
> [...]
>
> >
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > index 9897e11..eadce2d 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -27,7 +27,11 @@
> > */
> > #define CONFIG_NR_DRAM_BANKS 1
> > #define PHYS_SDRAM_1 0x0
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
> > +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > +#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
> > +#endif
> You definitely don't need 128 MiB of malloc area.
>
Okay, i will try out with smaller size.
> >
> > #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
> > #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE
> > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >
>
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Re: [U-Boot] [PATCH v2 02/19] doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA manager
On Isn, 2017-09-25 at 11:01 +0200, Marek Vasut wrote: > On 09/25/2017 10:39 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > This patch adds description on properties about location of FPGA > > RBFs are > > stored, type and functionality of RBF used to configure FPGA. > > > > Signed-off-by: Tien Fong Chee > > --- > > doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | 11 > > +++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga- > > mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga- > > mgr.txt > > index 2fd8e7a..7abb746 100644 > > --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > > +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > > @@ -7,6 +7,14 @@ Required properties: > > - The second index is for writing FPGA > > configuration data. > > - resets : Phandle and reset specifier for the device's reset. > > - clocks : Clocks used by the device. > > +- bitstream_periph : FPGA peripheral raw binary file which is used > > to > > + initialize FPGA IOs, PLL, IO48 and DDR. > > +- bitstream_core : FPGA core raw binary file contains FPGA design > > which is used > > + to program FPGA CRAM and ERAM. > > +- bitstream_devpart : Partition of flash device where bitstream > > files are > > + stored. > > + - dev is flash device number, > > part is flash > > + device partition. > > > > Example: > > > > @@ -16,4 +24,7 @@ Example: > > 0xffcfe400 0x20>; > > clocks = <&l4_mp_clk>; > > resets = <&rst FPGAMGR_RESET>; > > + bitstream_periph = > > "ghrd_10as066n2.periph.rbf.mkimage"; > > + bitstream_core = > > "ghrd_10as066n2.core.rbf.mkimage"; > > + bitstream_devpart = "0:1"; > These should probably be altr,something-something ... they are > definitely not generic bindings > Okay. > > > > }; > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/19] doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA manager
On Isn, 2017-09-25 at 11:00 +0200, Marek Vasut wrote: > On 09/25/2017 10:39 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > This patch adds description on properties about location of FPGA > > RBFs are > > stored, type and functionality of RBF used to configure FPGA. > > > > Signed-off-by: Tien Fong Chee > Why does this patch have different tags than 1/19 ? Please keep > things > consistent ... > Not get you. What's you means for tags? > > > > --- > > doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | 11 > > +++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga- > > mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga- > > mgr.txt > > index 2fd8e7a..7abb746 100644 > > --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > > +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > > @@ -7,6 +7,14 @@ Required properties: > > - The second index is for writing FPGA > > configuration data. > > - resets : Phandle and reset specifier for the device's reset. > > - clocks : Clocks used by the device. > > +- bitstream_periph : FPGA peripheral raw binary file which is used > > to > > + initialize FPGA IOs, PLL, IO48 and DDR. > > +- bitstream_core : FPGA core raw binary file contains FPGA design > > which is used > > + to program FPGA CRAM and ERAM. > > +- bitstream_devpart : Partition of flash device where bitstream > > files are > > + stored. > > + - dev is flash device number, > > part is flash > > + device partition. > > > > Example: > > > > @@ -16,4 +24,7 @@ Example: > > 0xffcfe400 0x20>; > > clocks = <&l4_mp_clk>; > > resets = <&rst FPGAMGR_RESET>; > > + bitstream_periph = > > "ghrd_10as066n2.periph.rbf.mkimage"; > > + bitstream_core = > > "ghrd_10as066n2.core.rbf.mkimage"; > > + bitstream_devpart = "0:1"; > > }; > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash
On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > These drivers handle FPGA program operation from flash loading
> > RBF to memory and then to program FPGA.
> >
> > Signed-off-by: Tien Fong Chee
> Did you run checkpatch on this before submitting ? I presume no ...
>
> >
> > ---
> > .../include/mach/fpga_manager_arria10.h| 27 ++
> > drivers/fpga/socfpga_arria10.c | 391
> > -
> > include/altera.h | 6 +
> > include/configs/socfpga_common.h | 4 +
> > 4 files changed, 425 insertions(+), 3 deletions(-)
> [...]
>
> >
> > @@ -112,13 +122,14 @@ static int
> > wait_for_nconfig_pin_and_nstatus_pin(void)
> > unsigned long mask =
> > ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
> > ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATU
> > S_PIN_SET_MSK;
> >
> > - /* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop
> > until de-asserted,
> > - * timeout at 1000ms
> > + /*
> > + * Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop
> > until
> > + * de-asserted, timeout at 1000ms
> > */
> > return wait_for_bit(__func__,
> > &fpga_manager_base->imgcfg_stat,
> > mask,
> > - false, FPGA_TIMEOUT_MSEC, false);
> > + true, FPGA_TIMEOUT_MSEC, false);
> > }
> Seems more like a fix, split this out.
>
> >
> > static int wait_for_f2s_nstatus_pin(unsigned long value)
> > @@ -469,6 +480,7 @@ int socfpga_load(Altera_desc *desc, const void
> > *rbf_data, size_t rbf_size)
> >
> > /* Initialize the FPGA Manager */
> > status = fpgamgr_program_init((u32 *)rbf_data, rbf_size);
> > +
> > if (status)
> > return status;
> >
> > @@ -477,3 +489,376 @@ int socfpga_load(Altera_desc *desc, const
> > void *rbf_data, size_t rbf_size)
> >
> > return fpgamgr_program_finish();
> > }
> > +
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +const char *get_cff_filename(const void *fdt, int *len, u32 core)
> > +{
> > + const char *cff_filename = NULL;
> > + const char *cell;
> > + int nodeoffset;
> > + nodeoffset = fdtdec_next_compatible(fdt, 0,
> > + COMPAT_ALTERA_SOCFPGA_FPGA0);
> > +
> > + if (nodeoffset >= 0) {
> > + if (core)
> > + cell = fdt_getprop(fdt,
> > + nodeoffset,
> > + "bitstream_core",
> > + len);
> > + else
> > + cell = fdt_getprop(fdt, nodeoffset,
> > "bitstream_periph",
> > + len);
> > +
> > + if (cell)
> > + cff_filename = cell;
> > + }
> > +
> > + return cff_filename;
> > +}
> > +
> > +const char *get_cff_devpart(const void *fdt, int *len)
> > +{
> > + const char *cff_devpart = NULL;
> > + const char *cell;
> > + int nodeoffset;
> > + nodeoffset = fdtdec_next_compatible(fdt, 0,
> > + COMPAT_ALTERA_SOCFPGA_FPGA0);
> > +
> > + cell = fdt_getprop(fdt, nodeoffset, "bitstream_devpart",
> > len);
> > +
> > + if (cell)
> > + cff_devpart = cell;
> > +
> > + return cff_devpart;
> > +}
> Take a look at splash*.c , I believe that can be reworked into
> generic
> firmware loader , which you could then use here.
>
the devpart is hard coded in splash*.c. The function here is getting
devpart info from DTS. So, is there any similar function in splash*.c?
May be you can share more about your idea.
> [...]
>
> >
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > index 9897e11..eadce2d 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -27,7 +27,11 @@
> > */
> > #define CONFIG_NR_DRAM_BANKS 1
> > #define PHYS_SDRAM_1 0x0
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
> > +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > +#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
> > +#endif
> You definitely don't need 128 MiB of malloc area.
>
> >
> > #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
> > #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE
> > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >
>
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Re: [U-Boot] [PATCH v2 02/19] doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA manager
On Sel, 2017-09-26 at 12:30 +0200, Marek Vasut wrote: > On 09/26/2017 10:54 AM, Chee, Tien Fong wrote: > > > > On Isn, 2017-09-25 at 11:00 +0200, Marek Vasut wrote: > > > > > > On 09/25/2017 10:39 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > This patch adds description on properties about location of > > > > FPGA > > > > RBFs are > > > > stored, type and functionality of RBF used to configure FPGA. > > > > > > > > Signed-off-by: Tien Fong Chee > > > Why does this patch have different tags than 1/19 ? Please keep > > > things > > > consistent ... > > > > > Not get you. What's you means for tags? > ARM: socfpga: , not the random doc: dtbinding: . > Heck, the first and second patch change the same file, yet have > different tags, why ? > I ported patch 01 from Linux, so i keep everything intact. For patch 02, i put doc:dtbinding because i think that is more descriptive to the file i changed. I can change to ARM:socfpga . > > > > > > > > > > > > > --- > > > > doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt > > > > | 11 > > > > +++ > > > > 1 file changed, 11 insertions(+) > > > > > > > > diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10- > > > > fpga- > > > > mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10- > > > > fpga- > > > > mgr.txt > > > > index 2fd8e7a..7abb746 100644 > > > > --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga- > > > > mgr.txt > > > > +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga- > > > > mgr.txt > > > > @@ -7,6 +7,14 @@ Required properties: > > > > - The second index is for writing FPGA > > > > configuration data. > > > > - resets : Phandle and reset specifier for the device's > > > > reset. > > > > - clocks : Clocks used by the device. > > > > +- bitstream_periph : FPGA peripheral raw binary file which is > > > > used > > > > to > > > > + initialize FPGA IOs, PLL, IO48 and DDR. > > > > +- bitstream_core : FPGA core raw binary file contains FPGA > > > > design > > > > which is used > > > > + to program FPGA CRAM and ERAM. > > > > +- bitstream_devpart : Partition of flash device where > > > > bitstream > > > > files are > > > > + stored. > > > > + - dev is flash device > > > > number, > > > > part is flash > > > > + device partition. > > > > > > > > Example: > > > > > > > > @@ -16,4 +24,7 @@ Example: > > > > 0xffcfe400 0x20>; > > > > clocks = <&l4_mp_clk>; > > > > resets = <&rst FPGAMGR_RESET>; > > > > + bitstream_periph = > > > > "ghrd_10as066n2.periph.rbf.mkimage"; > > > > + bitstream_core = > > > > "ghrd_10as066n2.core.rbf.mkimage"; > > > > + bitstream_devpart = "0:1"; > > > > }; > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 19/19] arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot
On Sel, 2017-09-26 at 12:38 +0200, Marek Vasut wrote:
> On 09/26/2017 06:31 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:24 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Enable SPL loading U-boot from SDMMC to DDR and booting U-boot.
> > > This patch seems to be doing more than just one thing ...
> > >
> > I can split into two patches:
> > 1) Enable DDR up by configuring FPGA so SPL able loading U-boot to
> > DDR
> > 2) Setting up configs so SPL can boot U-boot from FAT.
> Split it so that one patch does one thing.
>
Okay.
> >
> > >
> > > >
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > arch/arm/mach-socfpga/spl.c | 55
> > > > +
> > > > common/spl/spl_mmc.c | 2 +-
> > > > configs/socfpga_arria10_defconfig | 57
> > > > ++-
> > > > include/spl.h | 2 ++
> > > > 4 files changed, 108 insertions(+), 8 deletions(-)
> > > >
> > > > diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-
> > > > socfpga/spl.c
> > > > index aba116d..9b381bb 100644
> > > > --- a/arch/arm/mach-socfpga/spl.c
> > > > +++ b/arch/arm/mach-socfpga/spl.c
> > > > @@ -15,6 +15,7 @@
> > > > #include
> > > > #include
> > > > #include
> > > > +#include
> > > > #include
> > > > #include
> > > > #include
> > > > @@ -22,6 +23,10 @@
> > > > #include
> > > > #include
> > > > #include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > #include
> > > > #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > > > #include
> > > > @@ -29,6 +34,9 @@
> > > >
> > > > DECLARE_GLOBAL_DATA_PTR;
> > > >
> > > > +#define BSIZE 4096
> > > > +#define PERIPH_RBF 0
> > > > +
> > > > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > > > static struct pl310_regs *const pl310 =
> > > > (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
> > > > @@ -197,6 +205,12 @@ void board_init_f(ulong dummy)
> > > > #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > > > void spl_board_init(void)
> > > > {
> > > > + int rval = 0;
> > > > + int len = 0;
> > > > + u32 buffer[BSIZE] __aligned(ARCH_DMA_MINALIGN);
> > > > + struct spl_boot_device bootdev;
> > > > + fpga_fs_info fpga_fsinfo;
> > > > +
> > > > /* configuring the clock based on handoff */
> > > > cm_basic_init(gd->fdt_blob);
> > > > WATCHDOG_RESET();
> > > > @@ -214,6 +228,47 @@ void spl_board_init(void)
> > > >
> > > > /* Add device descriptor to FPGA device table */
> > > > socfpga_fpga_add();
> > > > +
> > > > + bootdev.boot_device = spl_boot_device();
> > > > +
> > > > + if (BOOT_DEVICE_MMC1 == bootdev.boot_device) {
> > > > + struct mmc *mmc = NULL;
> > > > + int err = 0;
> > > > +
> > > > + spl_mmc_find_device(&mmc,
> > > > bootdev.boot_device);
> > > > +
> > > > + err = mmc_init(mmc);
> > > > +
> > > > + if (err) {
> > > > +#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
> > > > + printf("spl: mmc init failed with
> > > > error:
> > > > %d\n", err);
> > > > +#endif
> > > > + }
> > > > +
> > > > + fpga_fsinfo.dev_part = (char
> > > > *)get_cff_devpart(gd-
> > > > >
> > > > > fdt_blob,
> > > > +
> > > > &
> > > > len);
> > > > +
> > > > + fpga_fsinfo.filename = (char
> > > > *)get_cff_filename(gd->fdt_blob,
> > > > +
Re: [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot
On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > Clock frequency info is required in U-boot. > > > > Signed-off-by: Tien Fong Chee > I want a TB on Gen 5 > Okay. > > > > --- > > arch/arm/mach-socfpga/board.c | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach- > > socfpga/board.c > > index 965f9dc..a00f63b 100644 > > --- a/arch/arm/mach-socfpga/board.c > > +++ b/arch/arm/mach-socfpga/board.c > > @@ -8,7 +8,10 @@ > > > > #include > > #include > > +#include > > #include > > +#include > > +#include > > #include > > > > #include > > @@ -26,6 +29,9 @@ int board_init(void) > > /* Address of boot parameters for ATAG (if ATAG is used) > > */ > > gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; > > > > + /* configuring the clock based on handoff */ > > + cm_basic_init(gd->fdt_blob); > > + > > return 0; > > } > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: > On 09/26/2017 06:42 AM, Chee, Tien Fong wrote: > > > > On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > > > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > Enhance preloader header with both additional program length > > > > and > > > > program > > > > entry offset attributes, which offset is relative to the start > > > > of > > > > program > > > > header. > > > > > > > > Signed-off-by: Tien Fong Chee > > > > --- > > > > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- > > > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > index 22d9e7f..33c9368 100644 > > > > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > @@ -11,8 +11,15 @@ > > > > .balignl 64,0xf33db33f; > > > > > > > > .word 0x1337c0d3; /* SoCFPGA preloader > > > > validation word */ > > > > - .word 0xc01df00d; /* Version, flags, > > > > length > > > > */ > > > > - .word 0xcafec0d3; /* Checksum, zero-pad > > > > */ > > > > + .word 0xc01df00d; /* Header > > > > length(2B),flags(1B),version(1B) */ > > > > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > > > > + .word 0xfeedface; /* Program length(4B) */ > > > Keep this indent intact, then it won't generate these crappy - > > > entries. > > > > > Are you saying to keep the comment indent intact, and allign with > > 1st > > comment /* SoCFPGA preloader validation word */ ? > Just look at the diff and make sure that it only changes the relevant > parts, not extras due to indent changes. > Not get you, which particular change is due to indent changes only? Some changes are for re-writing more descriptive comment. And some new adding header attributes to support Arria 10. > > > > > > > > > > > > > > > > > + .word 0xf00dcafe; /* > > > > + * Program entry > > > > offset(4B),relative > > > > to > > > > + * the start of program header > > > > + */ > > > > +#endif > > > > + .word 0xcafec0d3; /* Simple > > > > checksum(2B),spare offset(2B) */ > > > > nop; > > > > > > > > b reset;/* SoCFPGA jumps here */ > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 12/19] arm: socfpga: Add DDR driver for Arria 10
On Sel, 2017-09-26 at 12:35 +0200, Marek Vasut wrote:
> On 09/26/2017 10:20 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:19 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Add DDR driver suppport for Arria 10.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > arch/arm/mach-socfpga/include/mach/sdram.h | 2 +
> > > > arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 103 ++-
> > > > drivers/ddr/altera/sdram_arria10.c | 735
> > > > +
> > > > 3 files changed, 839 insertions(+), 1 deletion(-)
> > > > create mode 100644 drivers/ddr/altera/sdram_arria10.c
> > > >
> > > > diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > b/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > index 4a9754e..b833fc2 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > @@ -10,6 +10,8 @@
> > > >
> > > > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > > > #include
> > > > +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > > > +#include
> > > > #endif
> > > >
> > > > #endif
> > > > diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > > > b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > > > index 1d7b7c1..7af9431 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
> > > > @@ -1,5 +1,5 @@
> > > > /*
> > > > - * Copyright (C) 2015-2017 Intel Corporation
> > > > + * Copyright (C) 2017 Intel Corporation
> > > > *
> > > > * SPDX-License-Identifier:GPL-2.0
> > > > */
> > > > @@ -8,6 +8,7 @@
> > > > #define _SOCFPGA_SDRAM_ARRIA10_H_
> > > >
> > > > #ifndef __ASSEMBLY__
> > > > +int ddr_calibration_sequence(void);
> > > >
> > > > struct socfpga_ecc_hmc {
> > > > u32 ip_rev_id;
> > > > @@ -204,6 +205,106 @@ struct socfpga_io48_mmr {
> > > > u32 niosreserve1;
> > > > u32 niosreserve2;
> > > > };
> > > > +
> > > > +union dramaddrw_reg {
> > > > + struct {
> > > > + u32 cfg_col_addr_width:5;
> > > > + u32 cfg_row_addr_width:5;
> > > > + u32 cfg_bank_addr_width:4;
> > > > + u32 cfg_bank_group_addr_width:2;
> > > > + u32 cfg_cs_addr_width:3;
> > > > + u32 reserved:13;
> > > > + };
> > > Use regular macros for bitfields, not this crap.
> > >
> > Why regular macros is prefered? Above implementation improve
> > readability, simplify the implementation and saving memory.
> Because that's how U-Boot does it (and the above afair breaks on
> different endianness).
>
Okay.
> >
> > >
> > > >
> > > >
> > > > + u32 word;
> > > > +};
> > > > +
> > > > +union ctrlcfg0_reg {
> > > > + struct {
> > > > + u32 cfg_mem_type:4;
> > > > + u32 cfg_dimm_type:3;
> > > > + u32 cfg_ac_pos:2;
> > > > + u32 cfg_ctrl_burst_len:5;
> > > > + u32 reserved:18; /* Other fields unused */
> > > > + };
> > > > + u32 word;
> > > > +};
> > > [...]
> [...]
>
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Re: [U-Boot] [PATCH v2 10/19] arm: socfpga: Rename the gen5 sdram driver to more specific name
On Sel, 2017-09-26 at 12:33 +0200, Marek Vasut wrote:
> On 09/26/2017 10:23 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Current sdram driver is only applied to gen5 device, hence it
> > > > is
> > > > better
> > > > to rename sdram driver to more specific name which is related
> > > > to
> > > > gen5
> > > > device.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > arch/arm/mach-socfpga/include/mach/sdram.h | 434 +--
> > > >
> > > > --
> > > > .../include/mach/{sdram.h => sdram_gen5.h} | 6 +-
> > > > drivers/ddr/altera/Makefile| 2 +-
> > > > drivers/ddr/altera/{sdram.c => sdram_gen5.c} | 0
> > > > 4 files changed, 8 insertions(+), 434 deletions(-)
> > > > copy arch/arm/mach-socfpga/include/mach/{sdram.h =>
> > > > sdram_gen5.h}
> > > > (99%)
> > > > rename drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)
> > > >
> > > > diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > b/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > index b11228f..4a9754e 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/sdram.h
> > > > @@ -1,5 +1,5 @@
> > > > /*
> > > > - * Copyright Altera Corporation (C) 2014-2015
> > > > + * Copyright (C) 2017 Intel Corporation
> > > Retain the old copyright ?
> > >
> > Okay.
> > >
> > > >
> > > >
> > > > *
> > > > * SPDX-License-Identifier:GPL-2.0+
> > > > */
> > > > @@ -8,435 +8,9 @@
> > > >
> > > > #ifndef __ASSEMBLY__
> > > What's with this massive deletion here ?
> > >
> > Move to sdram_gen5.h . This header should contain common stuff.
> Then where did the + part go ?
>
I'm not sure why the patch didn't showing "+" portion, i suspect the
patch use below instead of "+".
copy arch/arm/mach-socfpga/include/mach/{sdram.h =>
> > > > sdram_gen5.h}> > > > (99%)> > > > rename
drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)
> >
> > >
> > > >
> > > >
> > > > -unsigned long sdram_calculate_size(void);
> > > > -int sdram_mmr_init_full(unsigned int sdr_phy_reg);
> > > > -int sdram_calibration_full(void);
> > > > -
> > > > -const struct socfpga_sdram_config
> > > > *socfpga_get_sdram_config(void);
> > > > -
> > > > -void socfpga_get_seq_ac_init(const u32 **init, unsigned int
> > > > *nelem);
> > > > -void socfpga_get_seq_inst_init(const u32 **init, unsigned int
> > > > *nelem);
> > > > -const struct socfpga_sdram_rw_mgr_config
> > > > *socfpga_get_sdram_rwmgr_config(void);
> > > [...]
>
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Re: [U-Boot] [PATCH v2 15/19] arm: socfpga: Add support to memory allocation in SPL
On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: > On 09/26/2017 07:06 AM, Chee, Tien Fong wrote: > > > > On Isn, 2017-09-25 at 11:21 +0200, Marek Vasut wrote: > > > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > Add support to memory allocation in SPL for preparation to > > > > enable > > > > FAT > > > > in SPL. Memory allocation is needed by FAT to work properly. > > > > > > > > Signed-off-by: Tien Fong Chee > > > Gen 5 does have malloc support in SPL, so what's the deal here ? > > > > > For FAT to work properly in Arria 10 SPL, SPL malloc need to be > > enabled, > It is already enabled on Gen 5 > I think i have confused you, this patch is for getting the malloc area mapping to Arria 10 SRAM memory correctly. I will improve the commit message. > > > > and the min of SPL malloc size is 0x2000. > Where did you find about this minimum ? That can be configured ... > I having issue to boot u-boot successful(Hung or reset), after debuging through debugger, just found that 0x2000 is min required. > > > > FAT needed in Arria > > 10 SPL, because u-boot.img is stored in FAT partition. > It can also be stored on ext partition (which is preferred, patent- > wise) > > > > > > > > > > > > > > > > > > --- > > > > include/configs/socfpga_common.h | 23 ++- > > > > 1 file changed, 22 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/include/configs/socfpga_common.h > > > > b/include/configs/socfpga_common.h > > > > index 7549ee8..9b6719e 100644 > > > > --- a/include/configs/socfpga_common.h > > > > +++ b/include/configs/socfpga_common.h > > > > @@ -280,17 +280,34 @@ unsigned int > > > > cm_get_qspi_controller_clk_hz(void); > > > > /* > > > > * SPL > > > > * > > > > - * SRAM Memory layout: > > > > + * SRAM Memory layout for gen 5: > > > > * > > > > * 0x_ .. Start of SRAM > > > > * 0x_ .. Top of stack (grows down) > > > > * 0x_ .. Malloc area > > > > * 0x_ .. Global Data > > > > * 0x_FF00 .. End of SRAM > > > > + * > > > > + * SRAM Memory layout for Arria 10: > > > > + * 0xFFE0_ .. Start of SRAM (bottom) > > > > + * 0xFFEx_ .. Top of stack (grows down to bottom) > > > > + * 0xFFEy_ .. Malloc area (grows up to top) > > > > + * 0xFFEz_ .. Global Data > > > > + * 0xFFE3_ .. End of SRAM (top) > > > > */ > > > > #define CONFIG_SPL_FRAMEWORK > > > > #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RA > > > > M_AD > > > > DR > > > > #define CONFIG_SPL_MAX_SIZECONFIG_SYS_INIT_RAM > > > > _SIZ > > > > E > > > > +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) > > > > +/* SPL memory allocation configuration, it is required by FAT > > > > feature */ > > > > +#ifndef CONFIG_SYS_SPL_MALLOC_START > > > > +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 > > > > +#define CONFIG_SYS_SPL_MALLOC_START(CONFIG_SYS_INIT_RA > > > > M_SI > > > > ZE - \ > > > > + GENERATED_GBL_DATA_SI > > > > ZE - > > > > \ > > > > + CONFIG_SYS_SPL_MALLOC > > > > _SIZ > > > > E + \ > > > > + CONFIG_SYS_INIT_RAM_A > > > > DDR) > > > > +#endif > > > > +#endif > > > > > > > > /* SPL SDMMC boot support */ > > > > #ifdef CONFIG_SPL_MMC_SUPPORT > > > > @@ -320,7 +337,11 @@ unsigned int > > > > cm_get_qspi_controller_clk_hz(void); > > > > /* > > > > * Stack setup > > > > */ > > > > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) > > > > #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADD > > > > R > > > > +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) > > > > +#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC > > > > _STA > > > > RT - 1) > > > > +#endif > > > > > > > > /* Extra Environment */ > > > > #ifndef CONFIG_SPL_BUILD > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash
On Sel, 2017-09-26 at 12:32 +0200, Marek Vasut wrote:
> On 09/26/2017 10:30 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > These drivers handle FPGA program operation from flash loading
> > > > RBF to memory and then to program FPGA.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > Did you run checkpatch on this before submitting ? I presume no
> > > ...
> > >
> > Yeah, i run checkpatch for all patches. What's the issue here?
> It should definitely indicate problem with ie. yoda-notation
> +if (0 == flashinfo->remaining) {
> and indent ...
>
No complaint from checkpath. I know someone saying bad for readbility,
but yoda-notation at this simple implementation doesn't impact the
readbility, and having benefit to leverage detection of compiler on
missing "=". Overall, this can help to improve coding quality. I can
remove it if this doesn't favored in U-boot.
> >
> > >
> > > >
> > > >
> > > > ---
> > > > .../include/mach/fpga_manager_arria10.h| 27 ++
> > > > drivers/fpga/socfpga_arria10.c | 391
> > > > -
> > > > include/altera.h | 6 +
> > > > include/configs/socfpga_common.h | 4 +
> > > > 4 files changed, 425 insertions(+), 3 deletions(-)
> > > [...]
> > >
> > > >
> > > >
> > > > @@ -112,13 +122,14 @@ static int
> > > > wait_for_nconfig_pin_and_nstatus_pin(void)
> > > > unsigned long mask =
> > > > ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
> > > > ALT_FPGAMGR_IMGCFG_STAT_F2S_NS
> > > > TATU
> > > > S_PIN_SET_MSK;
> > > >
> > > > - /* Poll until f2s_nconfig_pin and f2s_nstatus_pin;
> > > > loop
> > > > until de-asserted,
> > > > - * timeout at 1000ms
> > > > + /*
> > > > + * Poll until f2s_nconfig_pin and f2s_nstatus_pin;
> > > > loop
> > > > until
> > > > + * de-asserted, timeout at 1000ms
> > > > */
> > > > return wait_for_bit(__func__,
> > > > &fpga_manager_base->imgcfg_stat,
> > > > mask,
> > > > - false, FPGA_TIMEOUT_MSEC, false);
> > > > + true, FPGA_TIMEOUT_MSEC, false);
> > > > }
> > > Seems more like a fix, split this out.
> > >
> > Okay.
> > >
> > > >
> > > >
> > > > static int wait_for_f2s_nstatus_pin(unsigned long value)
> > > > @@ -469,6 +480,7 @@ int socfpga_load(Altera_desc *desc, const
> > > > void
> > > > *rbf_data, size_t rbf_size)
> > > >
> > > > /* Initialize the FPGA Manager */
> > > > status = fpgamgr_program_init((u32 *)rbf_data,
> > > > rbf_size);
> > > > +
> > > > if (status)
> > > > return status;
> > > >
> > > > @@ -477,3 +489,376 @@ int socfpga_load(Altera_desc *desc, const
> > > > void *rbf_data, size_t rbf_size)
> > > >
> > > > return fpgamgr_program_finish();
> > > > }
> > > > +
> > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > +const char *get_cff_filename(const void *fdt, int *len, u32
> > > > core)
> > > > +{
> > > > + const char *cff_filename = NULL;
> > > > + const char *cell;
> > > > + int nodeoffset;
> > > > + nodeoffset = fdtdec_next_compatible(fdt, 0,
> > > > + COMPAT_ALTERA_SOCFPGA_FPGA0);
> > > > +
> > > > + if (nodeoffset >= 0) {
> > > > + if (core)
> > > > + cell = fdt_getprop(fdt,
> > > > + nodeoffset,
> > > > + "bitstream_core",
> > > > + len);
> > > > +
Re: [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash
On Sel, 2017-09-26 at 12:39 +0200, Marek Vasut wrote:
> On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > These drivers handle FPGA program operation from flash loading
> > > > RBF to memory and then to program FPGA.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> [...]
>
> >
> > >
> > > >
> > > > +const char *get_cff_devpart(const void *fdt, int *len)
> > > > +{
> > > > + const char *cff_devpart = NULL;
> > > > + const char *cell;
> > > > + int nodeoffset;
> > > > + nodeoffset = fdtdec_next_compatible(fdt, 0,
> > > > + COMPAT_ALTERA_SOCFPGA_FPGA0);
> > > > +
> > > > + cell = fdt_getprop(fdt, nodeoffset,
> > > > "bitstream_devpart",
> > > > len);
> > > > +
> > > > + if (cell)
> > > > + cff_devpart = cell;
> > > > +
> > > > + return cff_devpart;
> > > > +}
> > > Take a look at splash*.c , I believe that can be reworked into
> > > generic
> > > firmware loader , which you could then use here.
> > >
> > the devpart is hard coded in splash*.c. The function here is
> > getting
> > devpart info from DTS. So, is there any similar function in
> > splash*.c?
> > May be you can share more about your idea.
> The generic loader could use some work of course ...
>
Sorry, i am still confusing. Allow me to ask you more:
1. Is the generic firmware loader already exists in splash*.c?
2. Are you talking about get_cff_devpart or whole fpga laodfs?
3. You want me integrate get_cff_devpart function into splash*.c?
4. Are you means to hard code the devpart instead providing dynamic
devpart described in DTS?
Current implementation are located in spl_board_init func
(arcg/arm/mach-socfpga/spl.c). Based on boot device such as mmc, nand
and QSPI, then reading some info from DTS, setting dev and partition
with generic fs functions, and reading with generic fs function before
programming RBF into FPGA. All these are in patch 19.
Thanks.
> [...]
>
___
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Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On Rab, 2017-09-27 at 10:33 +0200, Marek Vasut wrote: > On 09/27/2017 05:30 AM, Chee, Tien Fong wrote: > > > > On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: > > > > > > On 09/26/2017 06:42 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > > > > > Enhance preloader header with both additional program > > > > > > length > > > > > > and > > > > > > program > > > > > > entry offset attributes, which offset is relative to the > > > > > > start > > > > > > of > > > > > > program > > > > > > header. > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > > > --- > > > > > > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +- > > > > > > - > > > > > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > > > > > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > index 22d9e7f..33c9368 100644 > > > > > > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > @@ -11,8 +11,15 @@ > > > > > > .balignl 64,0xf33db33f; > > > > > > > > > > > > .word 0x1337c0d3; /* SoCFPGA > > > > > > preloader > > > > > > validation word */ > > > > > > - .word 0xc01df00d; /* Version, flags, > > > > > > length > > > > > > */ > > > > > > - .word 0xcafec0d3; /* Checksum, zero- > > > > > > pad > > > > > > */ > > > > > > + .word 0xc01df00d; /* Header > > > > > > length(2B),flags(1B),version(1B) */ > > > > > > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > > > > > > + .word 0xfeedface; /* Program length(4B) */ > > > > > Keep this indent intact, then it won't generate these crappy > > > > > - > > > > > entries. > > > > > > > > > Are you saying to keep the comment indent intact, and allign > > > > with > > > > 1st > > > > comment /* SoCFPGA preloader validation word */ ? > > > Just look at the diff and make sure that it only changes the > > > relevant > > > parts, not extras due to indent changes. > > > > > Not get you, which particular change is due to indent changes only? > > Some changes are for re-writing more descriptive comment. And some > > new > > adding header attributes to support Arria 10. > Aaargh, then don't do two things in one patch. > I can split them. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > + .word 0xf00dcafe; /* > > > > > > + * Program entry > > > > > > offset(4B),relative > > > > > > to > > > > > > + * the start of program header > > > > > > + */ > > > > > > +#endif > > > > > > + .word 0xcafec0d3; /* Simple > > > > > > checksum(2B),spare offset(2B) */ > > > > > > nop; > > > > > > > > > > > > b reset;/* SoCFPGA jumps here */ > > > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash
On Rab, 2017-09-27 at 10:30 +0200, Marek Vasut wrote:
> On 09/27/2017 08:05 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-09-26 at 12:32 +0200, Marek Vasut wrote:
> > >
> > > On 09/26/2017 10:30 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > These drivers handle FPGA program operation from flash
> > > > > > loading
> > > > > > RBF to memory and then to program FPGA.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > Did you run checkpatch on this before submitting ? I presume
> > > > > no
> > > > > ...
> > > > >
> > > > Yeah, i run checkpatch for all patches. What's the issue here?
> > > It should definitely indicate problem with ie. yoda-notation
> > > +if (0 == flashinfo->remaining) {
> > > and indent ...
> > >
> > No complaint from checkpath. I know someone saying bad for
> > readbility,
> > but yoda-notation at this simple implementation doesn't impact the
> > readbility, and having benefit to leverage detection of compiler on
> > missing "=". Overall, this can help to improve coding quality. I
> > can
> > remove it if this doesn't favored in U-boot.
> It is not welcome and modern gcc warns you about such things .
>
Okay.
> >
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > ---
> > > > > > .../include/mach/fpga_manager_arria10.h| 27
> > > > > > ++
> > > > > > drivers/fpga/socfpga_arria10.c | 391
> > > > > > -
> > > > > > include/altera.h | 6 +
> > > > > > include/configs/socfpga_common.h | 4 +
> > > > > > 4 files changed, 425 insertions(+), 3 deletions(-)
> > > > > [...]
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > @@ -112,13 +122,14 @@ static int
> > > > > > wait_for_nconfig_pin_and_nstatus_pin(void)
> > > > > > unsigned long mask =
> > > > > > ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
> > > > > > ALT_FPGAMGR_IMGCFG_STAT_F2
> > > > > > S_NS
> > > > > > TATU
> > > > > > S_PIN_SET_MSK;
> > > > > >
> > > > > > - /* Poll until f2s_nconfig_pin and f2s_nstatus_pin;
> > > > > > loop
> > > > > > until de-asserted,
> > > > > > - * timeout at 1000ms
> > > > > > + /*
> > > > > > + * Poll until f2s_nconfig_pin and f2s_nstatus_pin;
> > > > > > loop
> > > > > > until
> > > > > > + * de-asserted, timeout at 1000ms
> > > > > > */
> > > > > > return wait_for_bit(__func__,
> > > > > > &fpga_manager_base-
> > > > > > >imgcfg_stat,
> > > > > > mask,
> > > > > > - false, FPGA_TIMEOUT_MSEC,
> > > > > > false);
> > > > > > + true, FPGA_TIMEOUT_MSEC,
> > > > > > false);
> > > > > > }
> > > > > Seems more like a fix, split this out.
> > > > >
> > > > Okay.
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > static int wait_for_f2s_nstatus_pin(unsigned long value)
> > > > > > @@ -469,6 +480,7 @@ int socfpga_load(Altera_desc *desc,
> > > > > > const
> > > > > > void
> > > > > > *rbf_data, size_t rbf_size)
> > > > > >
> > > > > > /* Initiali
Re: [U-Boot] [PATCH v2 02/19] doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA manager
On Rab, 2017-09-27 at 10:29 +0200, Marek Vasut wrote: > On 09/27/2017 05:12 AM, Chee, Tien Fong wrote: > > > > On Sel, 2017-09-26 at 12:30 +0200, Marek Vasut wrote: > > > > > > On 09/26/2017 10:54 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > On Isn, 2017-09-25 at 11:00 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > On 09/25/2017 10:39 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > > > > > This patch adds description on properties about location of > > > > > > FPGA > > > > > > RBFs are > > > > > > stored, type and functionality of RBF used to configure > > > > > > FPGA. > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > > Why does this patch have different tags than 1/19 ? Please > > > > > keep > > > > > things > > > > > consistent ... > > > > > > > > > Not get you. What's you means for tags? > > > ARM: socfpga: , not the random doc: dtbinding: . > > > Heck, the first and second patch change the same file, yet have > > > different tags, why ? > > > > > I ported patch 01 from Linux, so i keep everything intact. For > > patch > > 02, i put doc:dtbinding because i think that is more descriptive to > > the > > file i changed. > > I can change to ARM:socfpga . > The tags are standardized ... inventing new random ones only messes > things up. > Okay. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > --- > > > > > > doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga- > > > > > > mgr.txt > > > > > > > > > > > > > > 11 > > > > > > +++ > > > > > > 1 file changed, 11 insertions(+) > > > > > > > > > > > > diff --git a/doc/device-tree-bindings/fpga/altera-socfpga- > > > > > > a10- > > > > > > fpga- > > > > > > mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10- > > > > > > fpga- > > > > > > mgr.txt > > > > > > index 2fd8e7a..7abb746 100644 > > > > > > --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10- > > > > > > fpga- > > > > > > mgr.txt > > > > > > +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10- > > > > > > fpga- > > > > > > mgr.txt > > > > > > @@ -7,6 +7,14 @@ Required properties: > > > > > > - The second index is for writing FPGA > > > > > > configuration data. > > > > > > - resets : Phandle and reset specifier for the > > > > > > device's > > > > > > reset. > > > > > > - clocks : Clocks used by the device. > > > > > > +- bitstream_periph : FPGA peripheral raw binary file which > > > > > > is > > > > > > used > > > > > > to > > > > > > + initialize FPGA IOs, PLL, IO48 and > > > > > > DDR. > > > > > > +- bitstream_core : FPGA core raw binary file contains FPGA > > > > > > design > > > > > > which is used > > > > > > + to program FPGA CRAM and ERAM. > > > > > > +- bitstream_devpart : Partition of flash device where > > > > > > bitstream > > > > > > files are > > > > > > + stored. > > > > > > + - dev is flash device > > > > > > number, > > > > > > part is flash > > > > > > + device partition. > > > > > > > > > > > > Example: > > > > > > > > > > > > @@ -16,4 +24,7 @@ Example: > > > > > > 0xffcfe400 0x20>; > > > > > > clocks = <&l4_mp_clk>; > > > > > > resets = <&rst FPGAMGR_RESET>; > > > > > > + bitstream_periph = > > > > > > "ghrd_10as066n2.periph.rbf.mkimage"; > > > > > > + bitstream_core = > > > > > > "ghrd_10as066n2.core.rbf.mkimage"; > > > > > > + bitstream_devpart = "0:1"; > > > > > > }; > > > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 15/19] arm: socfpga: Add support to memory allocation in SPL
On Rab, 2017-09-27 at 10:32 +0200, Marek Vasut wrote: > On 09/27/2017 07:43 AM, Chee, Tien Fong wrote: > > > > On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: > > > > > > On 09/26/2017 07:06 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > On Isn, 2017-09-25 at 11:21 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > > > > > Add support to memory allocation in SPL for preparation to > > > > > > enable > > > > > > FAT > > > > > > in SPL. Memory allocation is needed by FAT to work > > > > > > properly. > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > > Gen 5 does have malloc support in SPL, so what's the deal > > > > > here ? > > > > > > > > > For FAT to work properly in Arria 10 SPL, SPL malloc need to be > > > > enabled, > > > It is already enabled on Gen 5 > > > > > I think i have confused you, this patch is for getting the malloc > > area > > mapping to Arria 10 SRAM memory correctly. I will improve the > > commit > > message. > > > > > > > > > > > > > > > and the min of SPL malloc size is 0x2000. > > > Where did you find about this minimum ? That can be configured > > > ... > > > > > I having issue to boot u-boot successful(Hung or reset), after > > debuging > > through debugger, just found that 0x2000 is min required. > You can set the value much lower and depending on the requirements, > it > will work, so the problem must be elsewhere ... > Okay, i will test it out. > > > > > > > > > > > > > > > > > FAT needed in Arria > > > > 10 SPL, because u-boot.img is stored in FAT partition. > > > It can also be stored on ext partition (which is preferred, > > > patent- > > > wise) > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > --- > > > > > > include/configs/socfpga_common.h | 23 > > > > > > ++- > > > > > > 1 file changed, 22 insertions(+), 1 deletion(-) > > > > > > > > > > > > diff --git a/include/configs/socfpga_common.h > > > > > > b/include/configs/socfpga_common.h > > > > > > index 7549ee8..9b6719e 100644 > > > > > > --- a/include/configs/socfpga_common.h > > > > > > +++ b/include/configs/socfpga_common.h > > > > > > @@ -280,17 +280,34 @@ unsigned int > > > > > > cm_get_qspi_controller_clk_hz(void); > > > > > > /* > > > > > > * SPL > > > > > > * > > > > > > - * SRAM Memory layout: > > > > > > + * SRAM Memory layout for gen 5: > > > > > > * > > > > > > * 0x_ .. Start of SRAM > > > > > > * 0x_ .. Top of stack (grows down) > > > > > > * 0x_ .. Malloc area > > > > > > * 0x_ .. Global Data > > > > > > * 0x_FF00 .. End of SRAM > > > > > > + * > > > > > > + * SRAM Memory layout for Arria 10: > > > > > > + * 0xFFE0_ .. Start of SRAM (bottom) > > > > > > + * 0xFFEx_ .. Top of stack (grows down to bottom) > > > > > > + * 0xFFEy_ .. Malloc area (grows up to top) > > > > > > + * 0xFFEz_ .. Global Data > > > > > > + * 0xFFE3_ .. End of SRAM (top) > > > > > > */ > > > > > > #define CONFIG_SPL_FRAMEWORK > > > > > > #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INI > > > > > > T_RA > > > > > > M_AD > > > > > > DR > > > > > > #define CONFIG_SPL_MAX_SIZECONFIG_SYS_INIT > > > > > > _RAM > > > > > > _SIZ > > > > > > E > > > > > > +#if defined(CONFIG_TA
Re: [U-Boot] [PATCH v2 09/19] arm: socfpga: Add drivers for programing FPGA from flash
On Rab, 2017-09-27 at 11:23 +0200, Marek Vasut wrote:
> On 09/27/2017 11:13 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-09-26 at 12:39 +0200, Marek Vasut wrote:
> > >
> > > On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > These drivers handle FPGA program operation from flash
> > > > > > loading
> > > > > > RBF to memory and then to program FPGA.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > [...]
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > > +const char *get_cff_devpart(const void *fdt, int *len)
> > > > > > +{
> > > > > > + const char *cff_devpart = NULL;
> > > > > > + const char *cell;
> > > > > > + int nodeoffset;
> > > > > > + nodeoffset = fdtdec_next_compatible(fdt, 0,
> > > > > > + COMPAT_ALTERA_SOCFPGA_FPGA0);
> > > > > > +
> > > > > > + cell = fdt_getprop(fdt, nodeoffset,
> > > > > > "bitstream_devpart",
> > > > > > len);
> > > > > > +
> > > > > > + if (cell)
> > > > > > + cff_devpart = cell;
> > > > > > +
> > > > > > + return cff_devpart;
> > > > > > +}
> > > > > Take a look at splash*.c , I believe that can be reworked
> > > > > into
> > > > > generic
> > > > > firmware loader , which you could then use here.
> > > > >
> > > > the devpart is hard coded in splash*.c. The function here is
> > > > getting
> > > > devpart info from DTS. So, is there any similar function in
> > > > splash*.c?
> > > > May be you can share more about your idea.
> > > The generic loader could use some work of course ...
> > >
> > Sorry, i am still confusing. Allow me to ask you more:
> > 1. Is the generic firmware loader already exists in splash*.c?
> No
>
> >
> > 2. Are you talking about get_cff_devpart or whole fpga laodfs?
> > 3. You want me integrate get_cff_devpart function into splash*.c?
> > 4. Are you means to hard code the devpart instead providing dynamic
> > devpart described in DTS?
> I am talking about factoring out generic firmware loader from
> splash*c ,
> since it already contains most of the parts for such a thing.
>
> >
> > Current implementation are located in spl_board_init func
> > (arcg/arm/mach-socfpga/spl.c). Based on boot device such as mmc,
> > nand
> > and QSPI, then reading some info from DTS, setting dev and
> > partition
> > with generic fs functions, and reading with generic fs function
> > before
> > programming RBF into FPGA. All these are in patch 19.
> That's what splash*c also does, so adding separate parallel
> implementation of the same functionality is a no-no.
>
After reading through splash*c, i found there are two functions bear a
close similarity to.
1st function -->
In /common/splash.c :
static struct splash_location default_splash_locations[] = {
{
.name = "sf",
.storage = SPLASH_STORAGE_SF,
.flags = SPLASH_STORAGE_RAW,
.offset = 0x0,
},
{
.name = "mmc_fs",
.storage = SPLASH_STORAGE_MMC,
.flags = SPLASH_STORAGE_FS,
.devpart = "0:1",
},
{
.name = "usb_fs",
.storage = SPLASH_STORAGE_USB,
.flags = SPLASH_STORAGE_FS,
.devpart = "0:1",
},
{
.name = "sata_fs",
.storage = SPLASH_STORAGE_SATA,
.flags = SPLASH_STORAGE_FS,
.devpart = "0:1",
},
};
In my /arch/arm/mach-socfpga/spl.c (spl_board_init(void))
bootdev.boot_device = spl_boot_device();
if (BOOT_DEVICE_MMC1 == bootdev.boot_device) {
struct mmc *mmc = NULL;
Re: [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA programming interface
On Isn, 2017-09-25 at 11:03 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add code necessary into the FPGA driver framework in U-Boot
> > so it can be used via the 'fpga' command for programing Arria 10
> > SoCFPGA.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> [...]
>
> >
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +int altera_loadfs(Altera_desc *desc, const void *buf, size_t
> > bsize,
> > + fpga_fs_info *fpga_fsinfo)
> > +{
> > + const struct altera_fpga *fpga = altera_desc_to_fpga(desc,
> > __func__);
> > +
> > + if (!fpga)
> > + return FPGA_FAIL;
> > +
> > + debug_cond(FPGA_DEBUG, "%s: Launching the %s FS
> > Loader...\n",
> > + __func__, fpga->name);
> > + if (fpga->loadfs)
> > + return fpga->loadfs(desc, buf, bsize,
> > fpga_fsinfo);
> > + return 0;
> return -EINVAL , since the loader could not be started ?
>
Okay.
> >
> > +}
> > +#endif
> [...]
>
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Re: [U-Boot] [PATCH v2 11/19] arm: socfpga: Add DRAM bank size initialization function
On Sel, 2017-09-26 at 12:33 +0200, Marek Vasut wrote:
> On 09/26/2017 10:20 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Add function for both multiple DRAM bank and single DRAM bank
> > > > size
> > > > initialization. This common functionality could be used by
> > > > every
> > > > single
> > > > SOCFPGA board.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > I'd like TB on Gen5.
> > >
> > What is TB?
> Tested-by
> Tested-by: Tien Fong Chee
You want me resend the patch with Tested-by?
> >
> > >
> > > >
> > > >
> > > > ---
> > > > arch/arm/mach-socfpga/board.c| 7 +++
> > > > include/configs/socfpga_common.h | 1 +
> > > > 2 files changed, 8 insertions(+)
> > > >
> > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > > > socfpga/board.c
> > > > index a41d089..965f9dc 100644
> > > > --- a/arch/arm/mach-socfpga/board.c
> > > > +++ b/arch/arm/mach-socfpga/board.c
> > > > @@ -29,6 +29,13 @@ int board_init(void)
> > > > return 0;
> > > > }
> > > >
> > > > +int dram_init_banksize(void)
> > > > +{
> > > > + fdtdec_setup_memory_banksize();
> > > > +
> > > > + return 0;
> > > > +}
> > > > +
> > > > #ifdef CONFIG_USB_GADGET
> > > > struct dwc2_plat_otg_data socfpga_otg_data = {
> > > > .usb_gusbcfg= 0x1417,
> > > > diff --git a/include/configs/socfpga_common.h
> > > > b/include/configs/socfpga_common.h
> > > > index eadce2d..7549ee8 100644
> > > > --- a/include/configs/socfpga_common.h
> > > > +++ b/include/configs/socfpga_common.h
> > > > @@ -47,6 +47,7 @@
> > > > (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> > > >
> > > > #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> > > > +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
> > > > #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > > > #define CONFIG_SYS_TEXT_BASE 0x0840
> > > > #else
> > > >
>
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Re: [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot
On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > Clock frequency info is required in U-boot. > > > > Signed-off-by: Tien Fong Chee > I want a TB on Gen 5 > This patch break the gen5, because cm_basic_init is exclusive for Arria 10. #ifdef is required. > > > > --- > > arch/arm/mach-socfpga/board.c | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach- > > socfpga/board.c > > index 965f9dc..a00f63b 100644 > > --- a/arch/arm/mach-socfpga/board.c > > +++ b/arch/arm/mach-socfpga/board.c > > @@ -8,7 +8,10 @@ > > > > #include > > #include > > +#include > > #include > > +#include > > +#include > > #include > > > > #include > > @@ -26,6 +29,9 @@ int board_init(void) > > /* Address of boot parameters for ATAG (if ATAG is used) > > */ > > gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; > > > > + /* configuring the clock based on handoff */ > > + cm_basic_init(gd->fdt_blob); > > + > > return 0; > > } > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 11/19] arm: socfpga: Add DRAM bank size initialization function
On Isn, 2017-10-02 at 12:04 +0200, Marek Vasut wrote:
> On 10/02/2017 12:01 PM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-09-26 at 12:33 +0200, Marek Vasut wrote:
> > >
> > > On 09/26/2017 10:20 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > Add function for both multiple DRAM bank and single DRAM
> > > > > > bank
> > > > > > size
> > > > > > initialization. This common functionality could be used by
> > > > > > every
> > > > > > single
> > > > > > SOCFPGA board.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > I'd like TB on Gen5.
> > > > >
> > > > What is TB?
> > > Tested-by
> > > Tested-by: Tien Fong Chee
> > You want me resend the patch with Tested-by?
> Uh no, that's not how TB works. You should get TB on your patches
> from
> someone else , not yourself .
>
oo...okay, i will ask ley foon help to verify.
> >
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > ---
> > > > > > arch/arm/mach-socfpga/board.c| 7 +++
> > > > > > include/configs/socfpga_common.h | 1 +
> > > > > > 2 files changed, 8 insertions(+)
> > > > > >
> > > > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > > > > > socfpga/board.c
> > > > > > index a41d089..965f9dc 100644
> > > > > > --- a/arch/arm/mach-socfpga/board.c
> > > > > > +++ b/arch/arm/mach-socfpga/board.c
> > > > > > @@ -29,6 +29,13 @@ int board_init(void)
> > > > > > return 0;
> > > > > > }
> > > > > >
> > > > > > +int dram_init_banksize(void)
> > > > > > +{
> > > > > > + fdtdec_setup_memory_banksize();
> > > > > > +
> > > > > > + return 0;
> > > > > > +}
> > > > > > +
> > > > > > #ifdef CONFIG_USB_GADGET
> > > > > > struct dwc2_plat_otg_data socfpga_otg_data = {
> > > > > > .usb_gusbcfg= 0x1417,
> > > > > > diff --git a/include/configs/socfpga_common.h
> > > > > > b/include/configs/socfpga_common.h
> > > > > > index eadce2d..7549ee8 100644
> > > > > > --- a/include/configs/socfpga_common.h
> > > > > > +++ b/include/configs/socfpga_common.h
> > > > > > @@ -47,6 +47,7 @@
> > > > > > (CONFIG_SYS_INIT_RAM_ADDR +
> > > > > > CONFIG_SYS_INIT_SP_OFFSET)
> > > > > >
> > > > > > #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> > > > > > +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_
> > > > > > SIZE
> > > > > > #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > > > > > #define CONFIG_SYS_TEXT_BASE 0x0840
> > > > > > #else
> > > > > >
>
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Re: [U-Boot] [PATCH v2 17/19] arm: socfpga: Adding clock frequency info for U-boot
On Isn, 2017-10-02 at 12:10 +0200, Marek Vasut wrote: > On 10/02/2017 12:04 PM, Chee, Tien Fong wrote: > > > > On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > > > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > Clock frequency info is required in U-boot. > > > > > > > > Signed-off-by: Tien Fong Chee > > > I want a TB on Gen 5 > > > > > This patch break the gen5, because cm_basic_init is exclusive for > > Arria > > 10. #ifdef is required. > Can you at least build-test your patches before submitting ? > Heck, you can also set up the travisci [1] to do all that stuff for > you. > > [1] https://travis-ci.org/marex/u-boot-socfpga/branches > Okay. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 07/20] common: Generic firmware loader for file system
On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Tue, 5 Dec 2017 15:57:57 +0800 tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/Makefile | 1 +
> > common/fs_loader.c | 304
> >
> > include/fs_loader.h | 30 ++
> > 3 files changed, 335 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 include/fs_loader.h
> >
> > diff --git a/common/Makefile b/common/Makefile
> > index 801ea31..419e915 100644
> > --- a/common/Makefile
> > +++ b/common/Makefile
> > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > obj-y += command.o
> > obj-y += s_record.o
> > obj-y += xyzModem.o
> > +obj-y += fs_loader.o
> > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > new file mode 100644
> > index 000..04f682b
> > --- /dev/null
> > +++ b/common/fs_loader.c
> > @@ -0,0 +1,304 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +static struct device_location default_locations[] = {
> > + {
> > + .name = "mmc",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "usb",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "sata",
> > + .devpart = "0:1",
> > + },
> > +};
> > +
> > +/* USB build is not supported yet in SPL */
> > +#ifndef CONFIG_SPL_BUILD
> > +#ifdef CONFIG_USB_STORAGE
> > +static int init_usb(void)
> > +{
> > + int err = 0;
> >
> Useless initialization.
>
noted.
> >
> > + err = usb_init();
> > +
> > + if (err)
> >
> Unnecessary blank line.
>
Sorry, i'm not catching you because there is no blank line between "if"
and "return"
> >
> > + return err;
> > +
> > +#ifndef CONFIG_DM_USB
> > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> > +#endif
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_usb(void)
> > +{
> > + printf("Error: Cannot load flash image: no USB
> > support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +#endif
> > +
> > +#ifdef CONFIG_SATA
> > +static int init_storage_sata(void)
> > +{
> > + return sata_probe(0);
> > +}
> > +#else
> > +static int init_storage_sata(void)
> > +{
> > + printf("Error: Cannot load image: no SATA support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +
> > +#ifdef CONFIG_CMD_UBIFS
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + int ret = 0;
> >
> Useless initialization.
>
noted.
> >
> > + char cmd[32];
> > +
> > + sprintf(cmd, "ubi part %s", location->mtdpart);
> > +
> > + ret = run_command(cmd, 0);
> > +
> > + if (ret)
> Unnecessary blank line.
>
> >
> > + return ret;
> > +
> > + sprintf(cmd, "ubifsmount %s", location->ubivol);
> > +
> > + ret = run_command(cmd, 0);
> > +
> > + return res;
> >
> s/res/ret/
> You obviously never compiled this code with CONFIG_CMD_UBIFS enabled.
>
Good catch!! I will rectify.
> >
> > +}
> > +
> > +static int umount_ubifs(void)
> > +{
> > + return run_command("ubifsumount", 0);
> > +}
> > +#else
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + printf("Error: Cannot load image: no UBIFS support\n");
> > + return -ENOSYS;
> > +}
> > +
> > +static int umount_ubifs(void)
> > +{
> > + printf("Error: Cannot unmount UBIFS: no UBIFS support\n");
> >
> This error message is useless, since umount_ubifs() would
> probably never be called when mount_ubifs() failed.
>
Yeah, you are right, i will remove it.
> >
> > +}
> > +#endif
> > +
> > +#if defined(CONFIG_SPL_MMC_SUPPORT) && defined(CONFIG_SPL_BUILD)
> > +static int init_mmc(void)
> > +{
> > + /* Just for the case MMC is not yet initialized */
> > + struct mmc *mmc = NULL;
> > + int err = 0;
> >
> Useless initialization.
>
noted.
> >
> > +
> > + spl_mmc_find_device(&mmc, spl_boot_device());
> > +
> > + err = mmc_init(mmc);
> > +
> > + if (err) {
> > + printf("spl: mmc init failed with error: %d\n",
> > err);
> > + return err;
> > + }
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_mmc(void)
> > +{
> > + /* Expect somewhere already initialize MMC */
> > + return 0;
> > +}
> > +#endif
> > +
> > +static int select_fs_dev(struct device_location *location)
> > +{
> > + int ret = 0;
> >
> Useless initialization. Omitting the initialization here makes sure,
> that 'ret' is properly set in each of the below if/else clauses.
> Otherwise the compiler will co
Re: [U-Boot] [PATCH v5 07/20] common: Generic firmware loader for file system
On Rab, 2017-12-06 at 12:00 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Wed, 6 Dec 2017 10:06:21 +0000 Chee, Tien Fong wrote:
> >
> > On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> > >
> > > Hi,
> > >
> > > On Tue, 5 Dec 2017 15:57:57 +0800 tien.fong.c...@intel.com
> > > wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This is file system generic loader which can be used to load
> > > > the file image from the storage into target such as memory.
> > > > The consumer driver would then use this loader to program
> > > > whatever,
> > > > ie. the FPGA device.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > common/Makefile | 1 +
> > > > common/fs_loader.c | 304
> > > >
> > > > include/fs_loader.h | 30 ++
> > > > 3 files changed, 335 insertions(+)
> > > > create mode 100644 common/fs_loader.c
> > > > create mode 100644 include/fs_loader.h
> > > >
> > > > diff --git a/common/Makefile b/common/Makefile
> > > > index 801ea31..419e915 100644
> > > > --- a/common/Makefile
> > > > +++ b/common/Makefile
> > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > > > obj-y += command.o
> > > > obj-y += s_record.o
> > > > obj-y += xyzModem.o
> > > > +obj-y += fs_loader.o
> > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > new file mode 100644
> > > > index 000..04f682b
> > > > --- /dev/null
> > > > +++ b/common/fs_loader.c
> > > > @@ -0,0 +1,304 @@
> > > > +/*
> > > > + * Copyright (C) 2017 Intel Corporation
> > > > + *
> > > > + * SPDX-License-Identifier:GPL-2.0
> > > > + */
> > > > +
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +
> > > > +static struct device_location default_locations[] = {
> > > > + {
> > > > + .name = "mmc",
> > > > + .devpart = "0:1",
> > > > + },
> > > > + {
> > > > + .name = "usb",
> > > > + .devpart = "0:1",
> > > > + },
> > > > + {
> > > > + .name = "sata",
> > > > + .devpart = "0:1",
> > > > + },
> > > > +};
> > > > +
> > > > +/* USB build is not supported yet in SPL */
> > > > +#ifndef CONFIG_SPL_BUILD
> > > > +#ifdef CONFIG_USB_STORAGE
> > > > +static int init_usb(void)
> > > > +{
> > > > + int err = 0;
> > > >
> > > Useless initialization.
> > >
> > noted.
> > >
> > > >
> > > >
> > > > + err = usb_init();
> > > > +
> > > > + if (err)
> > > >
> > > Unnecessary blank line.
> > >
> > Sorry, i'm not catching you because there is no blank line between
> > "if"
> > and "return"
> >
> I meant the blank line between 'err = ...' and 'if (err)'
>
Okay, i can change that.
> >
> > >
> > > >
> > > >
> > > > + if (!strcmp(default_locations[i].name, name))
> > > > + default_locations[i].devpart =
> > > > devpart;
> > > > + }
> > > > +
> > > > + return;
> > > > +}
> > > > +
> > > > +/*
> > > > + * Prepare firmware struct;
> > > > + * return -ve if fail.
> > > > + */
> > > > +static int _request_firmware_prepare(struct firmware
> > > > **firmware_p,
> > > > + const char *name, void
> > > > *dbuf,
> > > > + size_t size, u32 offset)
> > > > +{
> > > > + struct firmware *firmware = NULL;
> > > > + int ret = 0;
> > > > +
> > > > + if (!name || name[0] == '\0')
> > > > + ret = -EINVAL;
> > > > +
> > > Is it really useful to continue here initializing the 'firmware'
> > > struct and returning an error at the end?
> > >
> > I try to keep it very close to Linux firmware loader. When more API
> > ported in from Linux in future, this can be helper function.
> > Anyway, i
> > have no strong opinion, i can move to caller if you guys think that
> > is
> > better.
> The Linux firmware loader has this:
> >
> > if (!name || name[0] == '\0') {
> > ret = -EINVAL;
> > goto out;
> > }
> Note the 'goto out' which is missing in your code.
> If following the Linux code closely, you would have to set
> *firmware_p
> to NULL and exit in this case.
>
I can set the *firmware_p to NUll in failing case. But, i checked the
static int _request_firmware_prepare in Linux, there is no goto out
error handling method in the function. Fyi, there is no allocated
memory release in U-Boot.
https://elixir.free-electrons.com/linux/v4.13.15/source/drivers/base/fi
rmware_class.c#L1191
>
> Lothar Waßmann
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 07/20] common: Generic firmware loader for file system
On Kha, 2017-12-07 at 08:49 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Thu, 7 Dec 2017 05:29:24 +0000 Chee, Tien Fong wrote:
> >
> > On Rab, 2017-12-06 at 12:00 +0100, Lothar Waßmann wrote:
> > >
> > > Hi,
> > >
> > > On Wed, 6 Dec 2017 10:06:21 + Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> > > > >
> > > > >
> > > > > Hi,
> > > > >
> > > > > On Tue, 5 Dec 2017 15:57:57 +0800 tien.fong.c...@intel.com
> > > > > wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > This is file system generic loader which can be used to
> > > > > > load
> > > > > > the file image from the storage into target such as memory.
> > > > > > The consumer driver would then use this loader to program
> > > > > > whatever,
> > > > > > ie. the FPGA device.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > > ---
> > > > > > common/Makefile | 1 +
> > > > > > common/fs_loader.c | 304
> > > > > >
> > > > > > include/fs_loader.h | 30 ++
> > > > > > 3 files changed, 335 insertions(+)
> > > > > > create mode 100644 common/fs_loader.c
> > > > > > create mode 100644 include/fs_loader.h
> > > > > >
> > > > > > diff --git a/common/Makefile b/common/Makefile
> > > > > > index 801ea31..419e915 100644
> > > > > > --- a/common/Makefile
> > > > > > +++ b/common/Makefile
> > > > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > > > > > obj-y += command.o
> > > > > > obj-y += s_record.o
> > > > > > obj-y += xyzModem.o
> > > > > > +obj-y += fs_loader.o
> > > > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > > > new file mode 100644
> > > > > > index 000..04f682b
> > > > > > --- /dev/null
> > > > > > +++ b/common/fs_loader.c
> > > > > > @@ -0,0 +1,304 @@
> > > > > > +/*
> > > > > > + * Copyright (C) 2017 Intel Corporation
> > > > > > + *
> > > > > > + * SPDX-License-Identifier:GPL-2.0
> > > > > > + */
> > > > > > +
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +
> > > > > > +static struct device_location default_locations[] = {
> > > > > > + {
> > > > > > + .name = "mmc",
> > > > > > + .devpart = "0:1",
> > > > > > + },
> > > > > > + {
> > > > > > + .name = "usb",
> > > > > > + .devpart = "0:1",
> > > > > > + },
> > > > > > + {
> > > > > > + .name = "sata",
> > > > > > + .devpart = "0:1",
> > > > > > + },
> > > > > > +};
> > > > > > +
> > > > > > +/* USB build is not supported yet in SPL */
> > > > > > +#ifndef CONFIG_SPL_BUILD
> > > > > > +#ifdef CONFIG_USB_STORAGE
> > > > > > +static int init_usb(void)
> > > > > > +{
> > > > > > + int err = 0;
> > > > > >
> > > > > Useless initialization.
> > > > >
> > > > noted.
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > + err = usb_init();
> > > > > > +
> > > >
Re: [U-Boot] [PATCH v5 07/20] common: Generic firmware loader for file system
On Kha, 2017-12-07 at 10:00 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Thu, 7 Dec 2017 08:10:06 +0000 Chee, Tien Fong wrote:
> >
> > On Kha, 2017-12-07 at 08:49 +0100, Lothar Waßmann wrote:
> > >
> > > Hi,
> > >
> > > On Thu, 7 Dec 2017 05:29:24 + Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Rab, 2017-12-06 at 12:00 +0100, Lothar Waßmann wrote:
> > > > >
> > > > >
> > > > > Hi,
> > > > >
> > > > > On Wed, 6 Dec 2017 10:06:21 + Chee, Tien Fong wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > On Sel, 2017-12-05 at 09:53 +0100, Lothar Waßmann wrote:
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > Hi,
> > > > > > >
> > > > > > > On Tue, 5 Dec 2017 15:57:57 +0800 tien.fong.chee@intel.c
> > > > > > > om
> > > > > > > wrote:
> > > > > > > >
> > > > > > > >
> > > > > > > >
> > > > > > > >
> > > > > > > > From: Tien Fong Chee
> > > > > > > >
> > > > > > > > This is file system generic loader which can be used to
> > > > > > > > load
> > > > > > > > the file image from the storage into target such as
> > > > > > > > memory.
> > > > > > > > The consumer driver would then use this loader to
> > > > > > > > program
> > > > > > > > whatever,
> > > > > > > > ie. the FPGA device.
> > > > > > > >
> > > > > > > > Signed-off-by: Tien Fong Chee > > > > > > > >
> > > > > > > > ---
> > > > > > > > common/Makefile | 1 +
> > > > > > > > common/fs_loader.c | 304
> > > > > > > >
> > > > > > > > include/fs_loader.h | 30 ++
> > > > > > > > 3 files changed, 335 insertions(+)
> > > > > > > > create mode 100644 common/fs_loader.c
> > > > > > > > create mode 100644 include/fs_loader.h
> > > > > > > >
> > > > > > > > diff --git a/common/Makefile b/common/Makefile
> > > > > > > > index 801ea31..419e915 100644
> > > > > > > > --- a/common/Makefile
> > > > > > > > +++ b/common/Makefile
> > > > > > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > > > > > > > obj-y += command.o
> > > > > > > > obj-y += s_record.o
> > > > > > > > obj-y += xyzModem.o
> > > > > > > > +obj-y += fs_loader.o
> > > > > > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > > > > > new file mode 100644
> > > > > > > > index 000..04f682b
> > > > > > > > --- /dev/null
> > > > > > > > +++ b/common/fs_loader.c
> > > > > > > > @@ -0,0 +1,304 @@
> > > > > > > > +/*
> > > > > > > > + * Copyright (C) 2017 Intel Corporation > > > > > > > >
> > > > > > > > + *
> > > > > > > > + * SPDX-License-Identifier:GPL-2.0
> > > > > > > > + */
> > > > > > > > +
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +#include
> > > > > > > > +
> > > > > > > > +static struct device_location default_locations[] = {
> > > > > > > > + {
> > > > > > > > + .name = "mmc",
> > > > > &
Re: [U-Boot] [PATCH v6 07/20] common: Generic firmware loader for file system
On Isn, 2017-12-11 at 18:06 +0800, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This is file system generic loader which can be used to load
> the file image from the storage into target such as memory.
> The consumer driver would then use this loader to program whatever,
> ie. the FPGA device.
>
> Signed-off-by: Tien Fong Chee
> ---
> common/Makefile | 1 +
> common/fs_loader.c | 299
>
> include/fs_loader.h | 30 ++
> 3 files changed, 330 insertions(+)
> create mode 100644 common/fs_loader.c
> create mode 100644 include/fs_loader.h
>
> diff --git a/common/Makefile b/common/Makefile
> index cec506f..2934221 100644
> --- a/common/Makefile
> +++ b/common/Makefile
> @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> obj-y += command.o
> obj-y += s_record.o
> obj-y += xyzModem.o
> +obj-y += fs_loader.o
> diff --git a/common/fs_loader.c b/common/fs_loader.c
> new file mode 100644
> index 000..269af25
> --- /dev/null
> +++ b/common/fs_loader.c
> @@ -0,0 +1,299 @@
> +/*
> + * Copyright (C) 2017 Intel Corporation
> + *
> + * SPDX-License-Identifier:GPL-2.0
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +static struct device_location default_locations[] = {
> + {
> + .name = "mmc",
> + .devpart = "0:1",
> + },
> + {
> + .name = "usb",
> + .devpart = "0:1",
> + },
> + {
> + .name = "sata",
> + .devpart = "0:1",
> + },
> +};
> +
> +/* USB build is not supported yet in SPL */
> +#ifndef CONFIG_SPL_BUILD
> +#ifdef CONFIG_USB_STORAGE
> +static int init_usb(void)
> +{
> + int err;
> +
> + err = usb_init();
> + if (err)
> + return err;
> +
> +#ifndef CONFIG_DM_USB
> + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> +#endif
> +
> + return err;
> +}
> +#else
> +static int init_usb(void)
> +{
> + printf("Error: Cannot load flash image: no USB support\n");
> + return -ENOSYS;
> +}
> +#endif
> +#endif
> +
> +#ifdef CONFIG_SATA
> +static int init_storage_sata(void)
> +{
> + return sata_probe(0);
> +}
> +#else
> +static int init_storage_sata(void)
> +{
> + printf("Error: Cannot load image: no SATA support\n");
> + return -ENOSYS;
> +}
> +#endif
> +
> +#ifdef CONFIG_CMD_UBIFS
> +static int mount_ubifs(struct device_location *location)
> +{
> + int ret;
> + char cmd[32];
> +
> + sprintf(cmd, "ubi part %s", location->mtdpart);
> +
> + ret = run_command(cmd, 0);
> + if (ret)
> + return ret;
> +
> + sprintf(cmd, "ubifsmount %s", location->ubivol);
> +
> + ret = run_command(cmd, 0);
> +
> + return ret;
> +}
> +
> +static int umount_ubifs(void)
> +{
> + return run_command("ubifsumount", 0);
> +}
> +#else
> +static int mount_ubifs(struct device_location *location)
> +{
> + printf("Error: Cannot load image: no UBIFS support\n");
> + return -ENOSYS;
> +}
> +#endif
> +
> +#if defined(CONFIG_SPL_MMC_SUPPORT) && defined(CONFIG_SPL_BUILD)
> +static int init_mmc(void)
> +{
> + /* Just for the case MMC is not yet initialized */
> + struct mmc *mmc = NULL;
> + int err;
> +
> + spl_mmc_find_device(&mmc, spl_boot_device());
> +
> + err = mmc_init(mmc);
> + if (err) {
> + printf("spl: mmc init failed with error: %d\n",
> err);
> + return err;
> + }
> +
> + return err;
> +}
> +#else
> +static int init_mmc(void)
> +{
> + /* Expect somewhere already initialize MMC */
> + return 0;
> +}
> +#endif
> +
> +static int select_fs_dev(struct device_location *location)
> +{
> + int ret = 0;
> +
> + if (!strcmp("mmc", location->name)) {
> + ret = fs_set_blk_dev("mmc", location->devpart,
> FS_TYPE_ANY);
> + }
> + else if (!strcmp("usb", location->name)) {
> + ret = fs_set_blk_dev("usb", location->devpart,
> FS_TYPE_ANY);
> + }
> + else if (!strcmp("sata", location->name)) {
> + ret = fs_set_blk_dev("sata", location->devpart,
> FS_TYPE_ANY);
> + }
> + else if (!strcmp("ubi", location->name)) {
> + if (location->ubivol != NULL)
> + ret = fs_set_blk_dev("ubi", NULL,
> FS_TYPE_UBIFS);
> + else
> + ret = -ENODEV;
> + }
> + else {
> + printf("Error: unsupported location storage.\n");
> + return -ENODEV;
> + }
> +
> + if (ret)
> + printf("Error: could not access storage.\n");
> +
> + return ret;
> +}
> +
> +static int init_storage_device(struct device_location *location)
> +{
> + int ret = 0;
> +#ifndef CONFIG_SPL_BUILD
> + /* USB build is not supported yet in SPL */
> + if (!strcmp("usb", location->name))
> + ret = init_usb();
> +#endif
> +
> + if (!strcmp("mmc", location->name))
> +
Re: [U-Boot] [PATCH v6 07/20] common: Generic firmware loader for file system
On Isn, 2017-12-11 at 11:15 +0100, Marek Vasut wrote: > On 12/11/2017 11:08 AM, Chee, Tien Fong wrote: > > > > On Isn, 2017-12-11 at 18:06 +0800, tien.fong.c...@intel.com wrote: > > > > > > From: Tien Fong Chee > > > > > > This is file system generic loader which can be used to load > > > the file image from the storage into target such as memory. > > > The consumer driver would then use this loader to program > > > whatever, > > > ie. the FPGA device. > > > > > > Signed-off-by: Tien Fong Chee > You should break this patch out first , get it in and then resubmit > the > 20 other patches so you're not saturating everyones' mailboxes. > Okay. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] arm: socfpga: Remove static declaration on spl_mmc_find_device function
On Isn, 2017-12-11 at 12:03 +0100, Marek Vasut wrote:
> On 12/11/2017 11:53 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> So the tags would imply this has a lot to do with SoCFPGA, but this
> is
> not touching any file in the SoCFPGA. The tags are thus completely
> bogus.
>
Opps...sorry, i forgot to remove the socfpga tag. I would fix it.
> >
> > This patch removes the static declation on
> > spl_mmc_find_device_function
> > so this function is accessible by the caller from other file. This
> > patch
> > is required for later patch.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/spl/spl_mmc.c | 2 +-
> > include/spl.h| 2 ++
> > 2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
> > index b57e0b0..183d05a 100644
> > --- a/common/spl/spl_mmc.c
> > +++ b/common/spl/spl_mmc.c
> > @@ -114,7 +114,7 @@ static int spl_mmc_get_device_index(u32
> > boot_device)
> > return -ENODEV;
> > }
> >
> > -static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
> > +int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
> > {
> > #if CONFIG_IS_ENABLED(DM_MMC)
> > struct udevice *dev;
> > diff --git a/include/spl.h b/include/spl.h
> > index 308ce7b..912983a 100644
> > --- a/include/spl.h
> > +++ b/include/spl.h
> > @@ -10,6 +10,7 @@
> > /* Platform-specific defines */
> > #include
> > #include
> > +#include
> >
> > /* Value in r0 indicates we booted from U-Boot */
> > #define UBOOT_NOT_LOADED_FROM_SPL 0x13578642
> > @@ -72,6 +73,7 @@ void preloader_console_init(void);
> > u32 spl_boot_device(void);
> > u32 spl_boot_mode(const u32 boot_device);
> > void spl_set_bd(void);
> > +int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device);
> >
> > /**
> > * spl_set_header_raw_uboot() - Set up a standard SPL image
> > structure
> >
>
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Re: [U-Boot] [PATCH 2/2] common: Generic firmware loader for file system
On Isn, 2017-12-11 at 13:16 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Mon, 11 Dec 2017 18:53:46 +0800 tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> [...}
> >
> > +/*
> > + * Prepare firmware struct;
> > + * return -ve if fail.
> > + */
> > +static int _request_firmware_prepare(struct firmware **firmware_p,
> > + const char *name, void *dbuf,
> > + size_t size, u32 offset)
> > +{
> > + struct firmware *firmware = NULL;
> > + int ret = 0;
> > +
> > + *firmware_p = NULL;
> >
> Sigh. This is useless...
> >
> > + if (!name || name[0] == '\0')
> > + ret = -EINVAL;
> > +
> unless you do a 'return -EINVAL' here!
>
You are right, i missed to change this to return. I would fix it.
> >
> > + *firmware_p = firmware = calloc(1, sizeof(*firmware));
> > +
> > + if (!firmware) {
> > + printf("%s: calloc(struct firmware) failed\n",
> > __func__);
> > + return -ENOMEM;
> > + }
> > +
> > + firmware->name = name;
> > + firmware->data = dbuf;
> > + firmware->size = size;
> > + firmware->offset = offset;
> > +
> > + return ret;
> > +}
> > +
>
> Lothar Waßmann
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Re: [U-Boot] [PATCH v2 2/2] common: Generic firmware loader for file system
On Sel, 2017-12-12 at 09:14 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Tue, 12 Dec 2017 15:27:14 +0800 tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/Makefile | 1 +
> > common/fs_loader.c | 299
> >
> > include/fs_loader.h | 30 ++
> > 3 files changed, 330 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 include/fs_loader.h
> >
> > diff --git a/common/Makefile b/common/Makefile
> > index cec506f..2934221 100644
> > --- a/common/Makefile
> > +++ b/common/Makefile
> > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > obj-y += command.o
> > obj-y += s_record.o
> > obj-y += xyzModem.o
> > +obj-y += fs_loader.o
> > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > new file mode 100644
> > index 000..fdb0fa2
> > --- /dev/null
> > +++ b/common/fs_loader.c
> > @@ -0,0 +1,299 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +static struct device_location default_locations[] = {
> > + {
> > + .name = "mmc",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "usb",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "sata",
> > + .devpart = "0:1",
> > + },
> > +};
> > +
> > +/* USB build is not supported yet in SPL */
> > +#ifndef CONFIG_SPL_BUILD
> > +#ifdef CONFIG_USB_STORAGE
> > +static int init_usb(void)
> > +{
> > + int err;
> > +
> > + err = usb_init();
> > + if (err)
> > + return err;
> > +
> > +#ifndef CONFIG_DM_USB
> > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> > +#endif
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_usb(void)
> > +{
> > + printf("Error: Cannot load flash image: no USB
> > support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +#endif
> > +
> > +#ifdef CONFIG_SATA
> > +static int init_storage_sata(void)
> > +{
> > + return sata_probe(0);
> > +}
> > +#else
> > +static int init_storage_sata(void)
> > +{
> > + printf("Error: Cannot load image: no SATA support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +
> > +#ifdef CONFIG_CMD_UBIFS
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + int ret;
> > + char cmd[32];
> > +
> > + sprintf(cmd, "ubi part %s", location->mtdpart);
> > +
> > + ret = run_command(cmd, 0);
> > + if (ret)
> > + return ret;
> > +
> > + sprintf(cmd, "ubifsmount %s", location->ubivol);
> > +
> > + ret = run_command(cmd, 0);
> > +
> > + return ret;
> > +}
> > +
> > +static int umount_ubifs(void)
> > +{
> > + return run_command("ubifsumount", 0);
> > +}
> > +#else
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + printf("Error: Cannot load image: no UBIFS support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +
> > +#if defined(CONFIG_SPL_MMC_SUPPORT) && defined(CONFIG_SPL_BUILD)
> > +static int init_mmc(void)
> > +{
> > + /* Just for the case MMC is not yet initialized */
> > + struct mmc *mmc = NULL;
> > + int err;
> > +
> > + spl_mmc_find_device(&mmc, spl_boot_device());
> > +
> > + err = mmc_init(mmc);
> > + if (err) {
> > + printf("spl: mmc init failed with error: %d\n",
> > err);
> > + return err;
> > + }
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_mmc(void)
> > +{
> > + /* Expect somewhere already initialize MMC */
> > + return 0;
> > +}
> > +#endif
> > +
> > +static int select_fs_dev(struct device_location *location)
> > +{
> > + int ret = 0;
> > +
> You should not initialize 'ret' here, to make sure, that the compiler
> barks at you if 'ret' is not appropriately set in each of the if/else
> clauses below.
>
Okay.
> >
> > + if (!strcmp("mmc", location->name)) {
> > + ret = fs_set_blk_dev("mmc", location->devpart,
> > FS_TYPE_ANY);
> > + }
> > + else if (!strcmp("usb", location->name)) {
> >
> 'else' should be placed on the same line as the '}'.
>
Okay.
> >
> > + ret = fs_set_blk_dev("usb", location->devpart,
> > FS_TYPE_ANY);
> > + }
> > + else if (!strcmp("sata", location->name)) {
> > + ret = fs_set_blk_dev("sata", location->devpart,
> > FS_TYPE_ANY);
> > + }
> > + else if (!strcmp("ubi", location->name)) {
> > + if (location->ubivol != NULL)
> > + ret = fs_set_blk_dev("ubi", NULL,
> > FS_TYPE_UBIFS);
> > + else
> > + ret = -ENOD
Re: [U-Boot] [PATCH v3 2/2] common: Generic firmware loader for file system
On Sel, 2017-12-12 at 15:12 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Tue, 12 Dec 2017 19:56:17 +0800 tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/Makefile | 1 +
> > common/fs_loader.c | 305
> >
> > include/fs_loader.h | 33 ++
> > 3 files changed, 339 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 include/fs_loader.h
> >
> [...]
> >
> > diff --git a/include/fs_loader.h b/include/fs_loader.h
> > new file mode 100644
> > index 000..35a6b5b
> > --- /dev/null
> > +++ b/include/fs_loader.h
> > @@ -0,0 +1,33 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +#ifndef _FS_LOADER_H_
> > +#define _FS_LOADER_H_
> > +
> > +#include
> > +
> > +struct firmware_priv {
> > + const char *name; /* Filename */
> > + u32 offset; /* Offset of reading a file */
> > +};
> >
> This is private to the firmware loader and should be declared locally
> in the source file. That's the whole point of being 'private'.
> You could have different firmware loaders with different requirements
> for their private data, thus there is no use in defining this
> globally.
>
Okay, i will move this declaration to source file. Any comments to the
source file?
> >
> > +
> > +struct firmware {
> > + size_t size;/* Size of a file */
> > + const u8 *data; /* Buffer for file */
> > + void *priv; /* Firmware loader private
> > fields */
> > +};
> > +
>
> Lothar Waßmann
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Re: [U-Boot] [PATCH v3 0/2] Generic firmware loader
On Sel, 2017-12-12 at 16:51 +0100, Marek Vasut wrote: > On 12/12/2017 12:56 PM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > This patchset contains generic firmware loader which is very close > > to Linux > > firmware loader but for U-Boot framework. Generic firmware loader > > can be used > > load whatever into target location, and then consumer driver would > > use it to > > program whatever, ie. the FPGA. This version mainly resolved > > comments from > > Lothar Waßmann in [v2]. > > > > This series is working on top of u-boot.git - > > http://git.denx.de/u-boot.git . > > > > [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg271979.h > > tml > > > > v2 -> v3 changes: > > - > > - Fixed the bugs in generic firmware loader driver. > > > > Patchset history > > > > [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg271905.h > > tml > > > > Tien Fong Chee (2): > > spl: Remove static declaration on spl_mmc_find_device function > > common: Generic firmware loader for file system > > > > common/Makefile | 1 + > > common/fs_loader.c | 305 > > +++ > > common/spl/spl_mmc.c | 2 +- > > include/fs_loader.h | 33 ++ > > include/spl.h| 2 + > > 5 files changed, 342 insertions(+), 1 deletion(-) > > create mode 100644 common/fs_loader.c > > create mode 100644 include/fs_loader.h > > > I thought we discussed resending patchsets multiple times a day > already, > didn't we ? > Sorry, i will kepp it slow down. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/2] common: Generic firmware loader for file system
On Rab, 2017-12-13 at 11:55 +0100, Lukasz Majewski wrote: > Hi Tien, > > > > > Dear Tien, > > > > > > > > -Original Message- > > > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of > > > tien.fong.c...@intel.com > > > Sent: Tuesday, December 12, 2017 5:26 PM > > > To: u-boot@lists.denx.de > > > Cc: Marek Vasut ; Tien Fong Chee > > > ; Ching Liang See > > > ; Tien Fong ; > > > Westergteen Dalon > > > Subject: [U-Boot] [PATCH v3 2/2] common: Generic firmware loader > > > for file system > > > > > > From: Tien Fong Chee > > > > > > This is file system generic loader which can be used to load > > > the file image from the storage into target such as memory. > > > The consumer driver would then use this loader to program > > > whatever, > > > ie. the FPGA device. > > > > > > Signed-off-by: Tien Fong Chee > > A README about how to use this feature in u-boot will be very > > helpful. > +1 > Okay, i will send out the initial draft documents separately for discussion. > > > > > > --pk > > ___ > > U-Boot mailing list > > U-Boot@lists.denx.de > > https://lists.denx.de/listinfo/u-boot > > > Best regards, > > Lukasz Majewski > > -- > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] doc: Document for generic firmware loader
On Isn, 2017-12-18 at 10:28 +0100, Lukasz Majewski wrote:
> Hi Tien,
>
> >
> > From: Tien Fong Chee
> >
> > This is initial draft document about generic firmware loader.
> > The intention of this patch is open for discussion, and final
> > version
> > will be included together with next version release of generic
> > firmware loader patchset. Current V3 generic firmware loader
> > patchset
> > can be reviewed from
> > https://www.mail-archive.com/u-boot@lists.denx.de/msg272028.html
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > doc/README.firmware_loader | 77
> > 1 files changed, 77
> > insertions(+), 0 deletions(-) create mode 100644
> > doc/README.firmware_loader
> >
> > diff --git a/doc/README.firmware_loader
> > b/doc/README.firmware_loader
> > new file mode 100644
> > index 000..d250723
> > --- /dev/null
> > +++ b/doc/README.firmware_loader
> > @@ -0,0 +1,77 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +Introduction
> > +
> > +This is firmware loader for U-Boot framework, which has very close
> > to some Linux +Firmware API. For the details of Linux Firmware API,
> > you can refer to
> > +https://01.org/linuxgraphics/gfx-docs/drm/driver-api/firmware/inde
> > x.html.
> > + +Firmware loader can be used to load whatever(firmware, image,
> > and
> > binary) from +the flash in file system format into target location
> ^^ I suppose that you mean - load binary image
> from file system put on flash?
>
Yes, you are right.
> >
> > such as memory, then +consumer driver such as FPGA driver can
> > program
> > FPGA image from the target +location into FPGA.
> > +
> > +Firmware Loader API core features
> > +-
> > +=> Firmware storage device partition search
> > +
> > + => Default storage device partition search set for mmc,
> > usb and sata
> > + as shown in below:
> > + static struct device_location default_locations[] = {
> > + {
> > + .name = "mmc",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "usb",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "sata",
> > + .devpart = "0:1",
> > + },
> > + };
> > +
> > + However, the default storage device .devpart value can be
> > overwritten
> > + with value which is defined in the environment variable
> > "FW_DEV_PART".
> > + For example: env_set("FW_DEV_PART", "0:2");
> ^^ - u-boot normally uses lower
> case for env variable naming.
>
okay, i will switch to lower case.
> >
> > +
> > +Firmware Loader API
> > +---
> > +=> int request_firmware_into_buf(struct firmware **firmware_p,
> > + const char *name,
> > + struct device_location *location,
> > + void *buf, size_t size, u32 offset)
> > + --
> > + => Load firmware into a previously allocated buffer
> > +
> > + Parameters:
> > + struct firmware **firmware_p
> > + pointer to firmware image
> > +
> > + const char *name
> > + name of firmware file
> > +
> > + struct device_location *location
> > + an array of supported firmware location
> > +
> > + void *buf
> > + address of buffer to load firmware into
> > +
> > + size_t size
> > + size of buffer
> > +
> > + u32 offset
> > + offset of a file for start reading into buffer
> > +
> > + return: size of total read
> > + -ve when error
> > +
> > + Description:
> > + The firmware is loaded directly into the buffer pointed to
> > by buf and
> > + the @firmware_p data member is pointed at buf.
> > +
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [PATCH v4 2/2] common: Generic firmware loader for file system
On Isn, 2017-12-18 at 08:39 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Mon, 18 Dec 2017 13:10:56 +0800 tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/Makefile| 1 +
> > common/fs_loader.c | 311
> > +
> > doc/README.firmware_loader | 77 +++
> > include/fs_loader.h| 28
> > 4 files changed, 417 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 doc/README.firmware_loader
> > create mode 100644 include/fs_loader.h
> >
> [...]
> >
> > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > new file mode 100644
> > index 000..81cf5d6
> > --- /dev/null
> > +++ b/common/fs_loader.c
> [...]
> >
> > +/*
> > + * Prepare firmware struct;
> > + * return -ve if fail.
> > + */
> > +static int _request_firmware_prepare(struct firmware **firmware_p,
> > + const char *name, void *dbuf,
> > + size_t size, u32 offset)
> > +{
> > + struct firmware *firmware = NULL;
> > + struct firmware_priv *fw_priv = NULL;
> > +
> > + *firmware_p = NULL;
> > +
> > + if (!name || name[0] == '\0')
> > + return -EINVAL;
> > +
> > + *firmware_p = firmware = calloc(1, sizeof(*firmware));
> > +
> > + if (!firmware) {
> > + printf("%s: calloc(struct firmware) failed\n",
> > __func__);
> > + return -ENOMEM;
> > + }
> > +
> > + fw_priv = calloc(1, sizeof(*fw_priv));
> > +
> > + if (!fw_priv) {
> > + printf("%s: calloc(struct fw_priv) failed\n",
> > __func__);
> > + return -ENOMEM;
> What about freeing 'firmware' and NULLing *firmware_p here?
There is no "freeing" support in U-Boot. I can assign NULL
to *firmware_p.
> Or better, do the assignment of *firmware_p at the end.
Are you means switch the location between *firmware_p and fw_priv in
calloc?
>
> >
> > + }
> > +
> > + fw_priv->name = name;
> > + fw_priv->offset = offset;
> > + firmware->data = dbuf;
> > + firmware->size = size;
> > + firmware->priv = fw_priv;
> > +
> > + return 0;
> > +}
> > +
> > +/*
> > + * fw_get_filesystem_firmware - load firmware into an allocated
> > buffer
> > + * @location: An array of supported firmware location
> > + * @firmware_p: pointer to firmware image
> > + *
> > + * @return: size of total read
> > + * -ve when error
> > + */
> > +static int fw_get_filesystem_firmware(struct device_location
> > *location,
> > + struct firmware *firmware_p)
> > +{
> > + struct firmware_priv *fw_priv = NULL;
> > + loff_t actread;
> > + char *dev_part;
> > + int ret;
> > +
> > + dev_part = env_get("FW_DEV_PART");
> > + if (dev_part)
> > + set_storage_devpart(location->name, dev_part);
> > +
> > + ret = init_storage_device(location);
> > + if (ret)
> > + goto out;
> > +
> > + select_fs_dev(location);
> > + if (ret)
> > + goto out;
> > +
> > + fw_priv = (struct firmware_priv *)firmware_p->priv;
> > +
> useless type cast.
>
I assume you are saying autocast, right? Let me check is there any
warning from compiler after removing the cast.
> >
> > + ret = fs_read(fw_priv->name, (ulong)firmware_p->data,
> > fw_priv->offset,
> > + firmware_p->size, &actread);
> > +
> > + if (ret || (actread != firmware_p->size)) {
> > + printf("Error: %d Failed to read %s from flash
> > %lld != %d.\n",
> > + ret, fw_priv->name, actread, firmware_p-
> > >size);
> > + return -EPERM;
> Quoting myself from an earlier mail
> (20171212091442.2f682...@karo-electronics.de):
> >
> > That's definitely not the right return code in this situation.
> > If 'ret' is != 0 you should return 'ret', otherwise EIO is more
> > appropriate here.
>
Sorry for mising out this part. I would change that.
>
> Lothar Waßmann
___
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Re: [U-Boot] [PATCH v4 2/2] common: Generic firmware loader for file system
On Sel, 2017-12-19 at 12:21 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Tue, 19 Dec 2017 10:31:13 +0000 Chee, Tien Fong wrote:
> >
> > On Isn, 2017-12-18 at 08:39 +0100, Lothar Waßmann wrote:
> > >
> > > Hi,
> > >
> > > On Mon, 18 Dec 2017 13:10:56 +0800 tien.fong.c...@intel.com
> > > wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This is file system generic loader which can be used to load
> > > > the file image from the storage into target such as memory.
> > > > The consumer driver would then use this loader to program
> > > > whatever,
> > > > ie. the FPGA device.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > common/Makefile| 1 +
> > > > common/fs_loader.c | 311
> > > > +
> > > > doc/README.firmware_loader | 77 +++
> > > > include/fs_loader.h| 28
> > > > 4 files changed, 417 insertions(+)
> > > > create mode 100644 common/fs_loader.c
> > > > create mode 100644 doc/README.firmware_loader
> > > > create mode 100644 include/fs_loader.h
> > > >
> > > [...]
> > > >
> > > >
> > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > new file mode 100644
> > > > index 000..81cf5d6
> > > > --- /dev/null
> > > > +++ b/common/fs_loader.c
> > > [...]
> > > >
> > > >
> > > > +/*
> > > > + * Prepare firmware struct;
> > > > + * return -ve if fail.
> > > > + */
> > > > +static int _request_firmware_prepare(struct firmware
> > > > **firmware_p,
> > > > + const char *name, void
> > > > *dbuf,
> > > > + size_t size, u32 offset)
> > > > +{
> > > > + struct firmware *firmware = NULL;
> > > > + struct firmware_priv *fw_priv = NULL;
> > > > +
> > > > + *firmware_p = NULL;
> > > > +
> > > > + if (!name || name[0] == '\0')
> > > > + return -EINVAL;
> > > > +
> > > > + *firmware_p = firmware = calloc(1, sizeof(*firmware));
> > > > +
> > > > + if (!firmware) {
> > > > + printf("%s: calloc(struct firmware) failed\n",
> > > > __func__);
> > > > + return -ENOMEM;
> > > > + }
> > > > +
> > > > + fw_priv = calloc(1, sizeof(*fw_priv));
> > > > +
> > > > + if (!fw_priv) {
> > > > + printf("%s: calloc(struct fw_priv) failed\n",
> > > > __func__);
> > > > + return -ENOMEM;
> > > What about freeing 'firmware' and NULLing *firmware_p here?
> > There is no "freeing" support in U-Boot. I can assign NULL
> >
> How do you come to that conclusion?
>
Sorry for misleading because i was tracking the free function until i
saw the function direct return when the bit GD_FLG_FULL_MALLOC_INIT was
found in gd->flags in beginning of the function long time ago. So, i
always assume that memory will always be freed in relocation on most
cases.
I will put the free to the firmware in next release.
> >
> > to *firmware_p.
> > >
> > > Or better, do the assignment of *firmware_p at the end.
> > Are you means switch the location between *firmware_p and fw_priv
> > in
> > calloc?
> >
> No. I would assign *firmware_p only when everything else was OK, so
> that there won't be a valid pointer in *firmware_p when the struct
> firmware it is pointing to has not been set up completely.
>
> I would do like this:
> static int _request_firmware_prepare(struct firmware **firmware_p,
> const char *name, void *dbuf,
> size_t size, u32 offset)
> {
> struct firmware *firmware;
> struct firmware_priv *fw_priv;
>
> *firmware_p = NULL;
>
> if (!name || name[0] == '\0')
> return -EINVAL;
>
> firmware = calloc(1, sizeof(*firmware));
> if (!firmware) {
> printf("%s: calloc(struct firmware) failed\n",
> __fu
Re: [U-Boot] [PATCH v5 2/2] common: Generic firmware loader for file system
On Kha, 2017-12-21 at 09:48 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Thu, 21 Dec 2017 15:25:29 +0800 tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/Makefile| 1 +
> > common/fs_loader.c | 311
> > +
> > doc/README.firmware_loader | 76 +++
> > include/fs_loader.h| 28
> > 4 files changed, 416 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 doc/README.firmware_loader
> > create mode 100644 include/fs_loader.h
> >
> > diff --git a/common/Makefile b/common/Makefile
> > index cec506f..2934221 100644
> > --- a/common/Makefile
> > +++ b/common/Makefile
> > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > obj-y += command.o
> > obj-y += s_record.o
> > obj-y += xyzModem.o
> > +obj-y += fs_loader.o
> > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > new file mode 100644
> > index 000..ddfce58
> > --- /dev/null
> > +++ b/common/fs_loader.c
> > @@ -0,0 +1,311 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +struct firmware_priv {
> > + const char *name; /* Filename */
> > + u32 offset; /* Offset of reading a file */
> > +};
> > +
> > +static struct device_location default_locations[] = {
> > + {
> > + .name = "mmc",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "usb",
> > + .devpart = "0:1",
> > + },
> > + {
> > + .name = "sata",
> > + .devpart = "0:1",
> > + },
> > +};
> > +
> > +/* USB build is not supported yet in SPL */
> > +#ifndef CONFIG_SPL_BUILD
> > +#ifdef CONFIG_USB_STORAGE
> > +static int init_usb(void)
> > +{
> > + int err;
> > +
> > + err = usb_init();
> > + if (err)
> > + return err;
> > +
> > +#ifndef CONFIG_DM_USB
> > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> > +#endif
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_usb(void)
> > +{
> > + printf("Error: Cannot load flash image: no USB
> > support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +#endif
> > +
> > +#ifdef CONFIG_SATA
> > +static int init_storage_sata(void)
> > +{
> > + return sata_probe(0);
> > +}
> > +#else
> > +static int init_storage_sata(void)
> > +{
> > + printf("Error: Cannot load image: no SATA support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +
> > +#ifdef CONFIG_CMD_UBIFS
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + int ret;
> > + char cmd[32];
> > +
> > + sprintf(cmd, "ubi part %s", location->mtdpart);
> > +
> > + ret = run_command(cmd, 0);
> > + if (ret)
> > + return ret;
> > +
> > + sprintf(cmd, "ubifsmount %s", location->ubivol);
> > +
> > + ret = run_command(cmd, 0);
> > +
> > + return ret;
> > +}
> > +
> > +static int umount_ubifs(void)
> > +{
> > + return run_command("ubifsumount", 0);
> > +}
> > +#else
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + printf("Error: Cannot load image: no UBIFS support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +
> > +#if defined(CONFIG_SPL_MMC_SUPPORT) && defined(CONFIG_SPL_BUILD)
> > +static int init_mmc(void)
> > +{
> > + /* Just for the case MMC is not yet initialized */
> > + struct mmc *mmc = NULL;
> > + int err;
> > +
> > + spl_mmc_find_device(&mmc, spl_boot_device());
> > +
> > + err = mmc_init(mmc);
> > + if (err) {
> > + printf("spl: mmc init failed with error: %d\n",
> > err);
> > + return err;
> > + }
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_mmc(void)
> > +{
> > + /* Expect somewhere already initialize MMC */
> > + return 0;
> > +}
> > +#endif
> > +
> > +static int select_fs_dev(struct device_location *location)
> > +{
> > + int ret;
> > +
> > + if (!strcmp("mmc", location->name)) {
> > + ret = fs_set_blk_dev("mmc", location->devpart,
> > FS_TYPE_ANY);
> > + } else if (!strcmp("usb", location->name)) {
> > + ret = fs_set_blk_dev("usb", location->devpart,
> > FS_TYPE_ANY);
> > + } else if (!strcmp("sata", location->name)) {
> > + ret = fs_set_blk_dev("sata", location->devpart,
> > FS_TYPE_ANY);
> > + } else if (!strcmp("ubi", location->name)) {
> > + if (location->ubivol != NULL)
> > + ret = fs_set_blk_dev("ubi", NULL,
> > FS_TYPE_UBIFS);
> > + else
> > + ret = -ENODEV;
> > + }
Re: [U-Boot] [PATCH v5 2/2] common: Generic firmware loader for file system
On Kha, 2017-12-21 at 17:36 +0800, Chee, Tien Fong wrote:
> On Kha, 2017-12-21 at 09:48 +0100, Lothar Waßmann wrote:
> >
> > Hi,
> >
> > On Thu, 21 Dec 2017 15:25:29 +0800 tien.fong.c...@intel.com wrote:
> > >
> > >
> > > From: Tien Fong Chee
> > >
> > > This is file system generic loader which can be used to load
> > > the file image from the storage into target such as memory.
> > > The consumer driver would then use this loader to program
> > > whatever,
> > > ie. the FPGA device.
> > >
> > > Signed-off-by: Tien Fong Chee
> > > ---
> > > common/Makefile| 1 +
> > > common/fs_loader.c | 311
> > > +
> > > doc/README.firmware_loader | 76 +++
> > > include/fs_loader.h| 28
> > > 4 files changed, 416 insertions(+)
> > > create mode 100644 common/fs_loader.c
> > > create mode 100644 doc/README.firmware_loader
> > > create mode 100644 include/fs_loader.h
> > >
> > > diff --git a/common/Makefile b/common/Makefile
> > > index cec506f..2934221 100644
> > > --- a/common/Makefile
> > > +++ b/common/Makefile
> > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > > obj-y += command.o
> > > obj-y += s_record.o
> > > obj-y += xyzModem.o
> > > +obj-y += fs_loader.o
> > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > new file mode 100644
> > > index 000..ddfce58
> > > --- /dev/null
> > > +++ b/common/fs_loader.c
> > > @@ -0,0 +1,311 @@
> > > +/*
> > > + * Copyright (C) 2017 Intel Corporation
> > > + *
> > > + * SPDX-License-Identifier:GPL-2.0
> > > + */
> > > +
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +struct firmware_priv {
> > > + const char *name; /* Filename */
> > > + u32 offset; /* Offset of reading a file
> > > */
> > > +};
> > > +
> > > +static struct device_location default_locations[] = {
> > > + {
> > > + .name = "mmc",
> > > + .devpart = "0:1",
> > > + },
> > > + {
> > > + .name = "usb",
> > > + .devpart = "0:1",
> > > + },
> > > + {
> > > + .name = "sata",
> > > + .devpart = "0:1",
> > > + },
> > > +};
> > > +
> > > +/* USB build is not supported yet in SPL */
> > > +#ifndef CONFIG_SPL_BUILD
> > > +#ifdef CONFIG_USB_STORAGE
> > > +static int init_usb(void)
> > > +{
> > > + int err;
> > > +
> > > + err = usb_init();
> > > + if (err)
> > > + return err;
> > > +
> > > +#ifndef CONFIG_DM_USB
> > > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> > > +#endif
> > > +
> > > + return err;
> > > +}
> > > +#else
> > > +static int init_usb(void)
> > > +{
> > > + printf("Error: Cannot load flash image: no USB
> > > support\n");
> > > + return -ENOSYS;
> > > +}
> > > +#endif
> > > +#endif
> > > +
> > > +#ifdef CONFIG_SATA
> > > +static int init_storage_sata(void)
> > > +{
> > > + return sata_probe(0);
> > > +}
> > > +#else
> > > +static int init_storage_sata(void)
> > > +{
> > > + printf("Error: Cannot load image: no SATA support\n");
> > > + return -ENOSYS;
> > > +}
> > > +#endif
> > > +
> > > +#ifdef CONFIG_CMD_UBIFS
> > > +static int mount_ubifs(struct device_location *location)
> > > +{
> > > + int ret;
> > > + char cmd[32];
> > > +
> > > + sprintf(cmd, "ubi part %s", location->mtdpart);
> > > +
> > > + ret = run_command(cmd, 0);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + sprintf(cmd, "ubifsmount %s", location->ubivol);
> > > +
> > > + ret = run_command(cmd, 0);
> > > +
> > > + return ret;
> > > +}
> > > +
&
Re: [U-Boot] [PATCH v5 2/2] common: Generic firmware loader for file system
On Kha, 2017-12-21 at 12:53 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Thu, 21 Dec 2017 09:36:41 +0000 Chee, Tien Fong wrote:
> >
> > On Kha, 2017-12-21 at 09:48 +0100, Lothar Waßmann wrote:
> > >
> > > Hi,
> > >
> > > On Thu, 21 Dec 2017 15:25:29 +0800 tien.fong.c...@intel.com
> > > wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This is file system generic loader which can be used to load
> > > > the file image from the storage into target such as memory.
> > > > The consumer driver would then use this loader to program
> > > > whatever,
> > > > ie. the FPGA device.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > common/Makefile| 1 +
> > > > common/fs_loader.c | 311
> > > > +
> > > > doc/README.firmware_loader | 76 +++
> > > > include/fs_loader.h| 28
> > > > 4 files changed, 416 insertions(+)
> > > > create mode 100644 common/fs_loader.c
> > > > create mode 100644 doc/README.firmware_loader
> > > > create mode 100644 include/fs_loader.h
> > > >
> > > > diff --git a/common/Makefile b/common/Makefile
> > > > index cec506f..2934221 100644
> > > > --- a/common/Makefile
> > > > +++ b/common/Makefile
> > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > > > obj-y += command.o
> > > > obj-y += s_record.o
> > > > obj-y += xyzModem.o
> > > > +obj-y += fs_loader.o
> > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > new file mode 100644
> > > > index 000..ddfce58
> > > > --- /dev/null
> > > > +++ b/common/fs_loader.c
> > > > @@ -0,0 +1,311 @@
> > > > +/*
> > > > + * Copyright (C) 2017 Intel Corporation
> > > > + *
> > > > + * SPDX-License-Identifier:GPL-2.0
> > > > + */
> > > > +
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +
> > > > +struct firmware_priv {
> > > > + const char *name; /* Filename */
> > > > + u32 offset; /* Offset of reading a file
> > > > */
> > > > +};
> > > > +
> > > > +static struct device_location default_locations[] = {
> > > > + {
> > > > + .name = "mmc",
> > > > + .devpart = "0:1",
> > > > + },
> > > > + {
> > > > + .name = "usb",
> > > > + .devpart = "0:1",
> > > > + },
> > > > + {
> > > > + .name = "sata",
> > > > + .devpart = "0:1",
> > > > + },
> > > > +};
> > > > +
> > > > +/* USB build is not supported yet in SPL */
> > > > +#ifndef CONFIG_SPL_BUILD
> > > > +#ifdef CONFIG_USB_STORAGE
> > > > +static int init_usb(void)
> > > > +{
> > > > + int err;
> > > > +
> > > > + err = usb_init();
> > > > + if (err)
> > > > + return err;
> > > > +
> > > > +#ifndef CONFIG_DM_USB
> > > > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> > > > +#endif
> > > > +
> > > > + return err;
> > > > +}
> > > > +#else
> > > > +static int init_usb(void)
> > > > +{
> > > > + printf("Error: Cannot load flash image: no USB
> > > > support\n");
> > > > + return -ENOSYS;
> > > > +}
> > > > +#endif
> > > > +#endif
> > > > +
> > > > +#ifdef CONFIG_SATA
> > > > +static int init_storage_sata(void)
> > > > +{
> > > > + return sata_probe(0);
> > > > +}
> > > > +#else
> > > > +static int init_storage_sata(void)
> > > > +{
&
Re: [U-Boot] [PATCH v5 2/2] common: Generic firmware loader for file system
On Kha, 2017-12-21 at 16:08 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Thu, 21 Dec 2017 12:48:53 +0000 Chee, Tien Fong wrote:
> >
> > On Kha, 2017-12-21 at 12:53 +0100, Lothar Waßmann wrote:
> > >
> > > Hi,
> > >
> > > On Thu, 21 Dec 2017 09:36:41 + Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Kha, 2017-12-21 at 09:48 +0100, Lothar Waßmann wrote:
> > > > >
> > > > >
> > > > > Hi,
> > > > >
> > > > > On Thu, 21 Dec 2017 15:25:29 +0800 tien.fong.c...@intel.com
> > > > > wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > This is file system generic loader which can be used to
> > > > > > load
> > > > > > the file image from the storage into target such as memory.
> > > > > > The consumer driver would then use this loader to program
> > > > > > whatever,
> > > > > > ie. the FPGA device.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > > ---
> > > > > > common/Makefile| 1 +
> > > > > > common/fs_loader.c | 311
> > > > > > +
> > > > > > doc/README.firmware_loader | 76 +++
> > > > > > include/fs_loader.h| 28
> > > > > > 4 files changed, 416 insertions(+)
> > > > > > create mode 100644 common/fs_loader.c
> > > > > > create mode 100644 doc/README.firmware_loader
> > > > > > create mode 100644 include/fs_loader.h
> > > > > >
> > > > > > diff --git a/common/Makefile b/common/Makefile
> > > > > > index cec506f..2934221 100644
> > > > > > --- a/common/Makefile
> > > > > > +++ b/common/Makefile
> > > > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > > > > > obj-y += command.o
> > > > > > obj-y += s_record.o
> > > > > > obj-y += xyzModem.o
> > > > > > +obj-y += fs_loader.o
> > > > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > > > new file mode 100644
> > > > > > index 000..ddfce58
> > > > > > --- /dev/null
> > > > > > +++ b/common/fs_loader.c
> > > > > > @@ -0,0 +1,311 @@
> > > > > > +/*
> > > > > > + * Copyright (C) 2017 Intel Corporation
> > > > > > + *
> > > > > > + * SPDX-License-Identifier:GPL-2.0
> > > > > > + */
> > > > > > +
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +
> > > > > > +struct firmware_priv {
> > > > > > + const char *name; /* Filename */
> > > > > > + u32 offset; /* Offset of reading a
> > > > > > file
> > > > > > */
> > > > > > +};
> > > > > > +
> > > > > > +static struct device_location default_locations[] = {
> > > > > > + {
> > > > > > + .name = "mmc",
> > > > > > + .devpart = "0:1",
> > > > > > + },
> > > > > > + {
> > > > > > + .name = "usb",
> > > > > > + .devpart = "0:1",
> > > > > > + },
> > > > > > + {
> > > > > > + .name = "sata",
> > > > > > + .devpart = "0:1",
> > > > > > + },
> > > > > > +};
> > > > > > +
> > > > > > +/* USB build is not supported yet in SPL */
> > > > > > +#ifndef CONFIG_SPL_BUILD
> > > > > > +#ifdef CONFIG_USB_STORAG
Re: [U-Boot] [PATCH v5 2/2] common: Generic firmware loader for file system
On Jum, 2017-12-22 at 08:44 +0100, Lothar Waßmann wrote: > Hi, > > On Fri, 22 Dec 2017 01:43:38 +0000 Chee, Tien Fong wrote: > > > > On Kha, 2017-12-21 at 16:08 +0100, Lothar Waßmann wrote: > > > > > > Hi, > > > > > > On Thu, 21 Dec 2017 12:48:53 + Chee, Tien Fong wrote: > > > > > > > > > > > > On Kha, 2017-12-21 at 12:53 +0100, Lothar Waßmann wrote: > > > > > > > > > > > > > > > Hi, > > > > > > > > > > On Thu, 21 Dec 2017 09:36:41 + Chee, Tien Fong wrote: > > > > > > > > > > > > > > > > > > > > > > > > On Kha, 2017-12-21 at 09:48 +0100, Lothar Waßmann wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > Hi, > > > > > > > > > > > > > > On Thu, 21 Dec 2017 15:25:29 +0800 tien.fong.chee@intel.c > > > > > > > om > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > > > > > > > > > This is file system generic loader which can be used to > > > > > > > > load > > > > > > > > the file image from the storage into target such as > > > > > > > > memory. > > > > > > > > The consumer driver would then use this loader to > > > > > > > > program > > > > > > > > whatever, > > > > > > > > ie. the FPGA device. > > > > > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > > > > > > > > > > > > > --- > > > > > > > > common/Makefile| 1 + > > > > > > > > common/fs_loader.c | 311 > > > > > > > > + > > > > > > > > doc/README.firmware_loader | 76 +++ > > > > > > > > include/fs_loader.h| 28 > > > > > > > > 4 files changed, 416 insertions(+) > > > > > > > > create mode 100644 common/fs_loader.c > > > > > > > > create mode 100644 doc/README.firmware_loader > > > > > > > > create mode 100644 include/fs_loader.h > > > > > > > > > > > > > > > > diff --git a/common/Makefile b/common/Makefile > > > > > > > > index cec506f..2934221 100644 > > > > > > > > --- a/common/Makefile > > > > > > > > +++ b/common/Makefile > > > > > > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o > > > > > > > > obj-y += command.o > > > > > > > > obj-y += s_record.o > > > > > > > > obj-y += xyzModem.o > > > > > > > > +obj-y += fs_loader.o > > > > > > > > diff --git a/common/fs_loader.c b/common/fs_loader.c > > > > > > > > new file mode 100644 > > > > > > > > index 000..ddfce58 > > > > > > > > --- /dev/null > > > > > > > > +++ b/common/fs_loader.c > > > > > > > > @@ -0,0 +1,311 @@ > > > > > > > > +/* > > > > > > > > + * Copyright (C) 2017 Intel Corporation > > > > > > > > > > > > > > > > + * > > > > > > > > + * SPDX-License-Identifier:GPL-2.0 > > > > > > > > + */ > > > > > > > > + > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > +#include > > > > > > > > + > > > > > > > > +struct firmware_priv
Re: [U-Boot] [PATCH v5 2/2] common: Generic firmware loader for file system
On Jum, 2017-12-22 at 09:47 +0100, Lothar Waßmann wrote: > Hi, > > On Fri, 22 Dec 2017 08:04:32 +0000 Chee, Tien Fong wrote: > > > > On Jum, 2017-12-22 at 08:44 +0100, Lothar Waßmann wrote: > > > > > > Hi, > > > > > > On Fri, 22 Dec 2017 01:43:38 + Chee, Tien Fong wrote: > > > > > > > > > > > > On Kha, 2017-12-21 at 16:08 +0100, Lothar Waßmann wrote: > > > > > > > > > > > > > > > Hi, > > > > > > > > > > On Thu, 21 Dec 2017 12:48:53 + Chee, Tien Fong wrote: > > > > > > > > > > > > > > > > > > > > > > > > On Kha, 2017-12-21 at 12:53 +0100, Lothar Waßmann wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > Hi, > > > > > > > > > > > > > > On Thu, 21 Dec 2017 09:36:41 + Chee, Tien Fong wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > On Kha, 2017-12-21 at 09:48 +0100, Lothar Waßmann > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Hi, > > > > > > > > > > > > > > > > > > On Thu, 21 Dec 2017 15:25:29 +0800 tien.fong.chee@int > > > > > > > > > el.c > > > > > > > > > om > > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > > > > > > > > > > > > > This is file system generic loader which can be > > > > > > > > > > used to > > > > > > > > > > load > > > > > > > > > > the file image from the storage into target such as > > > > > > > > > > memory. > > > > > > > > > > The consumer driver would then use this loader to > > > > > > > > > > program > > > > > > > > > > whatever, > > > > > > > > > > ie. the FPGA device. > > > > > > > > > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > > > > > > .com > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > --- > > > > > > > > > > common/Makefile| 1 + > > > > > > > > > > common/fs_loader.c | 311 > > > > > > > > > > + > > > > > > > > > > doc/README.firmware_loader | 76 +++ > > > > > > > > > > include/fs_loader.h| 28 > > > > > > > > > > 4 files changed, 416 insertions(+) > > > > > > > > > > create mode 100644 common/fs_loader.c > > > > > > > > > > create mode 100644 doc/README.firmware_loader > > > > > > > > > > create mode 100644 include/fs_loader.h > > > > > > > > > > > > > > > > > > > > diff --git a/common/Makefile b/common/Makefile > > > > > > > > > > index cec506f..2934221 100644 > > > > > > > > > > --- a/common/Makefile > > > > > > > > > > +++ b/common/Makefile > > > > > > > > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o > > > > > > > > > > obj-y += command.o > > > > > > > > > > obj-y += s_record.o > > > > > > > > > > obj-y += xyzModem.o > > > > > > > > > > +obj-y += fs_loader.o > > > > > > > > > > diff --git a/common/fs_
Re: [U-Boot] [PATCH v6 0/2] Generic firmware loader
On Rab, 2017-12-27 at 13:04 +0800, tien.fong.c...@intel.com wrote: Hi Lothar Waßmann, > From: Tien Fong Chee > > This patchset contains generic firmware loader which is very close to > Linux > firmware loader but for U-Boot framework. Generic firmware loader can > be used > load whatever into target location, and then consumer driver would > use it to > program whatever, ie. the FPGA. This version mainly resolved comments > from > Lothar Waßmann in [v5]. > Are you OK with the patches? > This series is working on top of u-boot.git - > http://git.denx.de/u-boot.git . > > [v5]: https://www.mail-archive.com/u-boot@lists.denx.de/msg272771.htm > l > > v5 -> v6 changes: > - > - Return error code when fs_read is fail. > - Return actual read size when fs_read is success. > > Patchset history > > [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg271905.htm > l > [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg271979.htm > l > [v3]: https://www.mail-archive.com/u-boot@lists.denx.de/msg272039.htm > l > [v4]: https://www.mail-archive.com/u-boot@lists.denx.de/msg272432.htm > l > > Tien Fong Chee (2): > spl: Remove static declaration on spl_mmc_find_device function > common: Generic firmware loader for file system > > common/Makefile| 1 + > common/fs_loader.c | 309 > + > common/spl/spl_mmc.c | 2 +- > doc/README.firmware_loader | 76 +++ > include/fs_loader.h| 28 > include/spl.h | 2 + > 6 files changed, 417 insertions(+), 1 deletion(-) > create mode 100644 common/fs_loader.c > create mode 100644 doc/README.firmware_loader > create mode 100644 include/fs_loader.h > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 0/2] Generic firmware loader
On Isn, 2018-01-08 at 09:07 +0100, Lothar Waßmann wrote: > Hi, > > On Wed, 3 Jan 2018 08:46:09 +0000 Chee, Tien Fong wrote: > > > > On Rab, 2017-12-27 at 13:04 +0800, tien.fong.c...@intel.com wrote: > > Hi Lothar Waßmann, > > > > > > From: Tien Fong Chee > > > > > > This patchset contains generic firmware loader which is very > > > close to > > > Linux > > > firmware loader but for U-Boot framework. Generic firmware loader > > > can > > > be used > > > load whatever into target location, and then consumer driver > > > would > > > use it to > > > program whatever, ie. the FPGA. This version mainly resolved > > > comments > > > from > > > Lothar Waßmann in [v5]. > > > > > Are you OK with the patches? > > > Sorry for the delay. I have been on vacation until now. > The patch series Looks good to me now. > > Reviewed-By: Lothar Waßmann > Great, thanks for helping to review the codes. > > Lothar Waßmann ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 0/2] Generic firmware loader
On Wed, 2017-12-27 at 13:04 +0800, tien.fong.c...@intel.com wrote: Hi Tom Rini, > From: Tien Fong Chee > > This patchset contains generic firmware loader which is very close to > Linux > firmware loader but for U-Boot framework. Generic firmware loader can > be used > load whatever into target location, and then consumer driver would > use it to > program whatever, ie. the FPGA. This version mainly resolved comments > from > Lothar Waßmann in [v5]. > > This series is working on top of u-boot.git - > http://git.denx.de/u-boot.git . > Do you ok with this patchset? Best regards, TF > [v5]: https://www.mail-archive.com/u- > b...@lists.denx.de/msg272771.html > > v5 -> v6 changes: > - > - Return error code when fs_read is fail. > - Return actual read size when fs_read is success. > > Patchset history > > [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg271905.htm > l > [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg271979.htm > l > [v3]: https://www.mail-archive.com/u-boot@lists.denx.de/msg272039.htm > l > [v4]: https://www.mail-archive.com/u-boot@lists.denx.de/msg272432.htm > l > > Tien Fong Chee (2): > spl: Remove static declaration on spl_mmc_find_device function > common: Generic firmware loader for file system > > common/Makefile| 1 + > common/fs_loader.c | 309 > + > common/spl/spl_mmc.c | 2 +- > doc/README.firmware_loader | 76 +++ > include/fs_loader.h| 28 > include/spl.h | 2 + > 6 files changed, 417 insertions(+), 1 deletion(-) > create mode 100644 common/fs_loader.c > create mode 100644 doc/README.firmware_loader > create mode 100644 include/fs_loader.h > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 0/2] Generic firmware loader
On Mon, 2018-01-08 at 09:07 +0100, Lothar Waßmann wrote: Hi Tom Rini, > Hi, > > On Wed, 3 Jan 2018 08:46:09 +0000 Chee, Tien Fong wrote: > > > > On Rab, 2017-12-27 at 13:04 +0800, tien.fong.c...@intel.com wrote: > > Hi Lothar Waßmann, > > > > > > From: Tien Fong Chee > > > > > > This patchset contains generic firmware loader which is very > > > close to > > > Linux > > > firmware loader but for U-Boot framework. Generic firmware loader > > > can > > > be used > > > load whatever into target location, and then consumer driver > > > would > > > use it to > > > program whatever, ie. the FPGA. This version mainly resolved > > > comments > > > from > > > Lothar Waßmann in [v5]. > > > > > Are you OK with the patches? Inlcude Tom Rini for reviewing this patch. > > > Sorry for the delay. I have been on vacation until now. > The patch series Looks good to me now. > > Reviewed-By: Lothar Waßmann > > > Lothar Waßmann ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v6, 2/2] common: Generic firmware loader for file system
On Mon, 2018-01-15 at 11:36 -0500, Tom Rini wrote:
> On Wed, Dec 27, 2017 at 01:04:38PM +0800, tien.fong.c...@intel.com
> wrote:
>
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> Please add Lothar's Reviewed-by for v7. There's a number of minor
> checkpatch.pl issues that checkpatch.pl can in turn fixup itself,
> please
> correct them.
>
I have ran the checkpatch.pl on this patch, i didn't see any error.
> [snip]
> >
> > diff --git a/common/Makefile b/common/Makefile
> > index cec506f..2934221 100644
> > --- a/common/Makefile
> > +++ b/common/Makefile
> > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > obj-y += command.o
> > obj-y += s_record.o
> > obj-y += xyzModem.o
> > +obj-y += fs_loader.o
> This needs a new Kconfig option and not to be enabled globally, only
> when needed.
>
Okay.
> >
> > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > new file mode 100644
> > index 000..56d29b6
> > --- /dev/null
> > +++ b/common/fs_loader.c
> > @@ -0,0 +1,309 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> This wants which is not globally available, so you need
> to
> come up with something here. At least making this Kconfig-enabled
> will
> be a start and perhaps OK for now.
>
I can enable the Kconfig, and put the caution about dependency on
in document.
> [snip]
> >
> > + if (ret) {
> > + printf("Error: %d Failed to read %s from flash
> > %lld != %d.\n",
> > + ret, fw_priv->name, actread, firmware_p-
> > >size);
> The last %d needs to be %zu since it's a size_t, for portability.
>
> Thanks!
>
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Re: [U-Boot] [U-Boot, v6, 2/2] common: Generic firmware loader for file system
On Tue, 2018-01-16 at 09:35 -0500, Tom Rini wrote:
> On Tue, Jan 16, 2018 at 07:58:00AM +0000, Chee, Tien Fong wrote:
> >
> > On Mon, 2018-01-15 at 11:36 -0500, Tom Rini wrote:
> > >
> > > On Wed, Dec 27, 2017 at 01:04:38PM +0800, tien.fong.c...@intel.co
> > > m
> > > wrote:
> > >
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This is file system generic loader which can be used to load
> > > > the file image from the storage into target such as memory.
> > > > The consumer driver would then use this loader to program
> > > > whatever,
> > > > ie. the FPGA device.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > Please add Lothar's Reviewed-by for v7. There's a number of
> > > minor
> > > checkpatch.pl issues that checkpatch.pl can in turn fixup itself,
> > > please
> > > correct them.
> > >
> > I have ran the checkpatch.pl on this patch, i didn't see any error.
> When I ran it, it was pointing out cases where you have:
> if (foo->bar != NULL)
> when you can just use:
> if (foo->bar)
>
It's weird for checkpatch.pl not showing the same. I would fix the code
with above example.
> [snip]
> >
> > >
> > > >
> > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > new file mode 100644
> > > > index 000..56d29b6
> > > > --- /dev/null
> > > > +++ b/common/fs_loader.c
> > > > @@ -0,0 +1,309 @@
> > > > +/*
> > > > + * Copyright (C) 2017 Intel Corporation
> > > > + *
> > > > + * SPDX-License-Identifier:GPL-2.0
> > > > + */
> > > > +
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > This wants which is not globally available, so you
> > > need
> > > to
> > > come up with something here. At least making this Kconfig-
> > > enabled
> > > will
> > > be a start and perhaps OK for now.
> > >
> > I can enable the Kconfig, and put the caution about dependency on
> > in document.
> Well, you need to make that part of the code depend on CONFIG_SPL as
> SPL
> support requires to exist. Perhaps part of the code
> needs
> to be refactored to more easily deal with SPL not always being
> present?
>
How about i just move the whole enum { } from line 17 to line 35 in
asm/spl.h to fs.h, and then enum{} above replaced with #include ?
asm/spl.h
--
#if defined(CONFIG_ARCH_OMAP2PLUS) \
|| defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
|| defined(CONFIG_EXYNOS4210)
/* Platform-specific defines */
#include
#else
#include <-- replacement
#endif
[...]
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Re: [U-Boot] [PATCH v6 2/2] common: Generic firmware loader for file system
On Tue, 2018-01-16 at 15:41 +0100, Marek Vasut wrote:
> On 12/27/2017 06:04 AM, tien.fong.c...@intel.com wrote:
>
> Whoa, this improved substantially since last time I checked. Minor
> nitpicks below.
>
> [...]
>
> >
> > +/* USB build is not supported yet in SPL */
> > +#ifndef CONFIG_SPL_BUILD
> > +#ifdef CONFIG_USB_STORAGE
> > +static int init_usb(void)
> > +{
> > + int err;
> > +
> > + err = usb_init();
> > + if (err)
> > + return err;
> > +
> > +#ifndef CONFIG_DM_USB
> > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> if (err)
> return err;
> ?
>
This is last line code of the function, so it's always return the
result regardless error or not.
> >
> > +#endif
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_usb(void)
> > +{
> > + printf("Error: Cannot load flash image: no USB
> > support\n");
> debug() ? Fix globally ...
>
okay.
> >
> > + return -ENOSYS;
> > +}
> > +#endif
> > +#endif
> > +
> > +#ifdef CONFIG_SATA
> > +static int init_storage_sata(void)
> > +{
> > + return sata_probe(0);
> > +}
> > +#else
> > +static int init_storage_sata(void)
> > +{
> > + printf("Error: Cannot load image: no SATA support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +
> > +#ifdef CONFIG_CMD_UBIFS
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + int ret;
> > + char cmd[32];
> > +
> > + sprintf(cmd, "ubi part %s", location->mtdpart);
> snprintf() ...
>
okay.
> >
> > + ret = run_command(cmd, 0);
> > + if (ret)
> > + return ret;
> > +
> > + sprintf(cmd, "ubifsmount %s", location->ubivol);
> > +
> > + ret = run_command(cmd, 0);
> > +
> > + return ret;
> > +}
> > +
> > +static int umount_ubifs(void)
> > +{
> > + return run_command("ubifsumount", 0);
> Just call the function directly ?
>
There are some checking like ubifs_initialized in the cmd/ubifs.c.
Direct callng the function would bypass those checking.
> >
> > +}
> > +#else
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + printf("Error: Cannot load image: no UBIFS support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> > +
> > +#if defined(CONFIG_SPL_MMC_SUPPORT) && defined(CONFIG_SPL_BUILD)
> > +static int init_mmc(void)
> > +{
> > + /* Just for the case MMC is not yet initialized */
> > + struct mmc *mmc = NULL;
> > + int err;
> > +
> > + spl_mmc_find_device(&mmc, spl_boot_device());
> > +
> > + err = mmc_init(mmc);
> > + if (err) {
> > + printf("spl: mmc init failed with error: %d\n",
> > err);
> > + return err;
> > + }
> > +
> > + return err;
> > +}
> > +#else
> > +static int init_mmc(void)
> > +{
> > + /* Expect somewhere already initialize MMC */
> > + return 0;
> > +}
> > +#endif
> > +
> > +static int select_fs_dev(struct device_location *location)
> > +{
> > + int ret;
> > +
> > + if (!strcmp("mmc", location->name)) {
> > + ret = fs_set_blk_dev("mmc", location->devpart,
> > FS_TYPE_ANY);
> > + } else if (!strcmp("usb", location->name)) {
> > + ret = fs_set_blk_dev("usb", location->devpart,
> > FS_TYPE_ANY);
> > + } else if (!strcmp("sata", location->name)) {
> > + ret = fs_set_blk_dev("sata", location->devpart,
> > FS_TYPE_ANY);
> > + } else if (!strcmp("ubi", location->name)) {
> > + if (location->ubivol != NULL)
> > + ret = fs_set_blk_dev("ubi", NULL,
> > FS_TYPE_UBIFS);
> > + else
> > + ret = -ENODEV;
> > + } else {
> > + printf("Error: unsupported location storage.\n");
> > + return -ENODEV;
> > + }
> > +
> > + if (ret)
> > + printf("Error: could not access storage.\n");
> > +
> > + return ret;
> > +}
> > +
> > +static int init_storage_device(struct device_location *location)
> > +{
> > + int ret;
> > +
> > + if (!strcmp("mmc", location->name)) {
> > + ret = init_mmc();
> > + } else if (!strcmp("sata", location->name)) {
> > + ret = init_storage_sata();
> > + } else if (location->ubivol != NULL) {
> > + ret = mount_ubifs(location);
> > +#ifndef CONFIG_SPL_BUILD
> > + /* USB build is not supported yet in SPL */
> > + } else if (!strcmp("usb", location->name)) {
> > + ret = init_usb();
> > +#endif
> > + } else {
> > + printf("Error: no supported storage device is
> > available.\n");
> > + ret = -ENODEV;
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +static void set_storage_devpart(char *name, char *devpart)
> > +{
> > + size_t i;
> > +
> > + for (i = 0; i < ARRAY_SIZE(default_locations); i++) {
> > + if (!strcmp(default_locations[i].name, name))
> > + default_locations[i].devpart = devpart;
> > + }
> > +}
> > +
> > +/*
> > + * Prepare firmware struct;
> > + * return -ve if fail.
> Use kerneldoc and keep it consistent.
>
kerneldoc doesn't has explanation for this function, and this function
is not for user. Or you means i shouldn'
Re: [U-Boot] [U-Boot, v6, 2/2] common: Generic firmware loader for file system
On Thu, 2018-01-18 at 08:18 -0500, Tom Rini wrote:
> On Thu, Jan 18, 2018 at 03:42:14AM +0000, Chee, Tien Fong wrote:
> >
> > On Tue, 2018-01-16 at 09:35 -0500, Tom Rini wrote:
> > >
> > > On Tue, Jan 16, 2018 at 07:58:00AM +, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Mon, 2018-01-15 at 11:36 -0500, Tom Rini wrote:
> > > > >
> > > > >
> > > > > On Wed, Dec 27, 2017 at 01:04:38PM +0800, tien.fong.chee@inte
> > > > > l.co
> > > > > m
> > > > > wrote:
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee
> > > > > >
> > > > > > This is file system generic loader which can be used to
> > > > > > load
> > > > > > the file image from the storage into target such as memory.
> > > > > > The consumer driver would then use this loader to program
> > > > > > whatever,
> > > > > > ie. the FPGA device.
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee
> > > > > Please add Lothar's Reviewed-by for v7. There's a number of
> > > > > minor
> > > > > checkpatch.pl issues that checkpatch.pl can in turn fixup
> > > > > itself,
> > > > > please
> > > > > correct them.
> > > > >
> > > > I have ran the checkpatch.pl on this patch, i didn't see any
> > > > error.
> > > When I ran it, it was pointing out cases where you have:
> > > if (foo->bar != NULL)
> > > when you can just use:
> > > if (foo->bar)
> > >
> > It's weird for checkpatch.pl not showing the same. I would fix the
> > code
> > with above example.
> That is odd. Are you running it from within the U-Boot tree?
>
Yes.
> >
> > >
> > > [snip]
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > > diff --git a/common/fs_loader.c b/common/fs_loader.c
> > > > > > new file mode 100644
> > > > > > index 000..56d29b6
> > > > > > --- /dev/null
> > > > > > +++ b/common/fs_loader.c
> > > > > > @@ -0,0 +1,309 @@
> > > > > > +/*
> > > > > > + * Copyright (C) 2017 Intel Corporation
> > > > > > + *
> > > > > > + * SPDX-License-Identifier:GPL-2.0
> > > > > > + */
> > > > > > +
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > > +#include
> > > > > This wants which is not globally available, so
> > > > > you
> > > > > need
> > > > > to
> > > > > come up with something here. At least making this Kconfig-
> > > > > enabled
> > > > > will
> > > > > be a start and perhaps OK for now.
> > > > >
> > > > I can enable the Kconfig, and put the caution about dependency
> > > > on
> > > > in document.
> > > Well, you need to make that part of the code depend on CONFIG_SPL
> > > as
> > > SPL
> > > support requires to exist. Perhaps part of the code
> > > needs
> > > to be refactored to more easily deal with SPL not always being
> > > present?
> > >
> > How about i just move the whole enum { } from line 17 to line 35 in
> > asm/spl.h to fs.h, and then enum{} above replaced with #include
> > ?
> >
> > asm/spl.h
> > --
> > #if defined(CONFIG_ARCH_OMAP2PLUS) \
> > || defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
> > || defined(CONFIG_EXYNOS4210)
> > /* Platform-specific defines */
> > #include
> >
> > #else
> > #include <-- replacement
> > #endif
> > [...]
> No, because that's still arch specific code and will blow up some
> platforms that do not have asm/spl.h at all and is still non-portable
> (look at the various asm/spl.h files that do exist for how
> BOOT_DEVICE_xxx is handled in different places).
>
Ok, you are right.
> It's OK to restructure your code to have:
> #ifdef CONFIG_SPL
> #include
> ... SPL specific functions
> #endif
>
Okay, noted.
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Re: [U-Boot] [PATCH v6 2/2] common: Generic firmware loader for file system
On Thu, 2018-01-18 at 12:12 +0100, Marek Vasut wrote:
> On 01/18/2018 05:33 AM, Chee, Tien Fong wrote:
> >
> > On Tue, 2018-01-16 at 15:41 +0100, Marek Vasut wrote:
> > >
> > > On 12/27/2017 06:04 AM, tien.fong.c...@intel.com wrote:
> > >
> > > Whoa, this improved substantially since last time I checked.
> > > Minor
> > > nitpicks below.
> > >
> > > [...]
> > >
> > > >
> > > >
> > > > +/* USB build is not supported yet in SPL */
> > > > +#ifndef CONFIG_SPL_BUILD
> > > > +#ifdef CONFIG_USB_STORAGE
> > > > +static int init_usb(void)
> > > > +{
> > > > + int err;
> > > > +
> > > > + err = usb_init();
> > > > + if (err)
> > > > + return err;
> > > > +
> > > > +#ifndef CONFIG_DM_USB
> > > > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> > > if (err)
> > > return err;
> > > ?
> > >
> > This is last line code of the function, so it's always return the
> > result regardless error or not.
> You are rewriting the true error code with -ENODEV instead of
> propagating it.
>
Ohhare you saying to change the codes as shown in below:
err = usb_stor_scan(1);
if (err)
return err;
> > >
> > > >
> > > >
> > > > +#endif
> > > > +
> > > > + return err;
> > > > +}
> > > > +#else
> > > > +static int init_usb(void)
> > > > +{
> > > > + printf("Error: Cannot load flash image: no USB
> > > > support\n");
> > > debug() ? Fix globally ...
> > >
> > okay.
> > >
> > > >
> > > >
> > > > + return -ENOSYS;
> > > > +}
> > > > +#endif
> > > > +#endif
> > > > +
> > > > +#ifdef CONFIG_SATA
> > > > +static int init_storage_sata(void)
> > > > +{
> > > > + return sata_probe(0);
> > > > +}
> > > > +#else
> > > > +static int init_storage_sata(void)
> > > > +{
> > > > + printf("Error: Cannot load image: no SATA support\n");
> > > > + return -ENOSYS;
> > > > +}
> > > > +#endif
> > > > +
> > > > +#ifdef CONFIG_CMD_UBIFS
> > > > +static int mount_ubifs(struct device_location *location)
> > > > +{
> > > > + int ret;
> > > > + char cmd[32];
> > > > +
> > > > + sprintf(cmd, "ubi part %s", location->mtdpart);
> > > snprintf() ...
> > >
> > okay.
> > >
> > > >
> > > >
> > > > + ret = run_command(cmd, 0);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + sprintf(cmd, "ubifsmount %s", location->ubivol);
> > > > +
> > > > + ret = run_command(cmd, 0);
> > > > +
> > > > + return ret;
> > > > +}
> > > > +
> > > > +static int umount_ubifs(void)
> > > > +{
> > > > + return run_command("ubifsumount", 0);
> > > Just call the function directly ?
> > >
> > There are some checking like ubifs_initialized in the cmd/ubifs.c.
> > Direct callng the function would bypass those checking.
> Then factor those out into a function you can all and call that
> function.
>
Just for curious, is it worth to factor those into a function? Does it
help to boost the performance or for other purpose?
> >
> > >
> > > >
> > > >
> > > > +}
> > > > +#else
> > > > +static int mount_ubifs(struct device_location *location)
> > > > +{
> > > > + printf("Error: Cannot load image: no UBIFS
> > > > support\n");
> > > > + return -ENOSYS;
> > > > +}
> > > > +#endif
> > > > +
> > > > +#if defined(CONFIG_SPL_MMC_SUPPORT) &&
> > > > defined(CONFIG_SPL_BUILD)
> > > > +static int init_mmc(void)
> > > > +{
> > > > + /* Just for the case MMC is not yet initialized */
> > > > + struct mmc *mmc = NULL;
> > > > + int err;
> > > > +
> > > > + spl_mmc_find_device(&am
Re: [U-Boot] [PATCH v6 2/2] common: Generic firmware loader for file system
On Thu, 2018-01-18 at 06:57 +0100, Simon Goldschmidt wrote:
> On 27.12.2017 06:04, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/Makefile| 1 +
> > common/fs_loader.c | 309
> > +
> > doc/README.firmware_loader | 76 +++
> > include/fs_loader.h| 28
> > 4 files changed, 414 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 doc/README.firmware_loader
> > create mode 100644 include/fs_loader.h
>
>
> >
> > +#if defined(CONFIG_SPL_MMC_SUPPORT) && defined(CONFIG_SPL_BUILD)
> > +static int init_mmc(void)
> > +{
> > + /* Just for the case MMC is not yet initialized */
> > + struct mmc *mmc = NULL;
> > + int err;
> > +
> > + spl_mmc_find_device(&mmc, spl_boot_device());
> > +
> > + err = mmc_init(mmc);
> > + if (err) {
> > + printf("spl: mmc init failed with error: %d\n",
> > err);
> > + return err;
> > + }
> > +
> > + return err;
> > +}
> I see two problems here: First, you're ignoring the return value of
> spl_mmc_find_device() and initialize 'mmc' to NULL instead. Wouldn't
> it
> be better to let 'mmc' be uninitialized and return the error code
> returned by spl_mmc_find_device() if there is one?
>
Yeah, you are right, i should add the check on the return value. I
think that would better to initialize NULL to mmc, because there is no
checking on the mmc in spl_mmc_find_device(), so that is possible
memory access violation/abort can be happended if unknown value in mmc
pointer.
> Second, using spl_boot_device() would prevent making the loader work
> on
> mach-socfpga when spl is not loaded from mmc, right?
>
> E.g. for the case I'm currently trying to fix (boot from qspi), this
> loader would not work although there's technically no reason since
> the
> platform only has one mmc. The call to spl_boot_device() could be
> replaced by the exact value here for platforms that only have one
> mmc. I
> don't know how to fix that, though.
>
The main purpose here is to initialize the mmc driver. So which storage
user wants to load the file is totally depend what storage such as mmc
user defines in location->name. Loader would init the storage based on
the storage defined in location->name before accessing it. Since the
loader only support file system at this moment, i would suggest FAT fs
for mmc and ubi fs for qspi.
> Regards,
> Simon
>
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Re: [U-Boot] [PATCH v6 2/2] common: Generic firmware loader for file system
On Mon, 2018-01-22 at 09:44 +0100, Lothar Waßmann wrote:
> Hi,
>
> On Mon, 22 Jan 2018 07:11:37 +0000 Chee, Tien Fong wrote:
> >
> > On Thu, 2018-01-18 at 12:12 +0100, Marek Vasut wrote:
> > >
> > > On 01/18/2018 05:33 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Tue, 2018-01-16 at 15:41 +0100, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 12/27/2017 06:04 AM, tien.fong.c...@intel.com wrote:
> > > > >
> > > > > Whoa, this improved substantially since last time I checked.
> > > > > Minor
> > > > > nitpicks below.
> > > > >
> > > > > [...]
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > +/* USB build is not supported yet in SPL */
> > > > > > +#ifndef CONFIG_SPL_BUILD
> > > > > > +#ifdef CONFIG_USB_STORAGE
> > > > > > +static int init_usb(void)
> > > > > > +{
> > > > > > + int err;
> > > > > > +
> > > > > > + err = usb_init();
> > > > > > + if (err)
> > > > > > + return err;
> > > > > > +
> > > > > > +#ifndef CONFIG_DM_USB
> > > > > > + err = usb_stor_scan(1) < 0 ? -ENODEV : 0;
> > > > > if (err)
> > > > > return err;
> > > > > ?
> > > > >
> > > > This is last line code of the function, so it's always return
> > > > the
> > > > result regardless error or not.
> > > You are rewriting the true error code with -ENODEV instead of
> > > propagating it.
> > >
> > Ohhare you saying to change the codes as shown in below:
> >
> > err = usb_stor_scan(1);
> > if (err)
> > return err;
> >
> usb_stor_scan() does not return a sensible error code, but '-1' if no
> device was found. This should be changed to -ENODEV then!
>
Okay, so this should be fixed in usb_stor_scan() function.
>
> Lothar Waßmann
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Re: [U-Boot] [PATCH v6 2/2] common: Generic firmware loader for file system
On Mon, 2018-01-22 at 12:41 +0100, Simon Goldschmidt wrote:
> On 22.01.2018 09:08, Chee, Tien Fong wrote:
> >
> > On Thu, 2018-01-18 at 06:57 +0100, Simon Goldschmidt wrote:
> > >
> > > On 27.12.2017 06:04, tien.fong.c...@intel.com wrote:
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This is file system generic loader which can be used to load
> > > > the file image from the storage into target such as memory.
> > > > The consumer driver would then use this loader to program
> > > > whatever,
> > > > ie. the FPGA device.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > common/Makefile| 1 +
> > > > common/fs_loader.c | 309
> > > > +
> > > > doc/README.firmware_loader | 76 +++
> > > > include/fs_loader.h| 28
> > > > 4 files changed, 414 insertions(+)
> > > > create mode 100644 common/fs_loader.c
> > > > create mode 100644 doc/README.firmware_loader
> > > > create mode 100644 include/fs_loader.h
> > >
> > >
> > > >
> > > > +#if defined(CONFIG_SPL_MMC_SUPPORT) &&
> > > > defined(CONFIG_SPL_BUILD)
> > > > +static int init_mmc(void)
> > > > +{
> > > > + /* Just for the case MMC is not yet initialized */
> > > > + struct mmc *mmc = NULL;
> > > > + int err;
> > > > +
> > > > + spl_mmc_find_device(&mmc, spl_boot_device());
> > > > +
> > > > + err = mmc_init(mmc);
> > > > + if (err) {
> > > > + printf("spl: mmc init failed with error:
> > > > %d\n",
> > > > err);
> > > > + return err;
> > > > + }
> > > > +
> > > > + return err;
> > > > +}
> > > I see two problems here: First, you're ignoring the return value
> > > of
> > > spl_mmc_find_device() and initialize 'mmc' to NULL instead.
> > > Wouldn't
> > > it
> > > be better to let 'mmc' be uninitialized and return the error code
> > > returned by spl_mmc_find_device() if there is one?
> > >
> > Yeah, you are right, i should add the check on the return value. I
> > think that would better to initialize NULL to mmc, because there is
> > no
> > checking on the mmc in spl_mmc_find_device(), so that is possible
> > memory access violation/abort can be happended if unknown value in
> > mmc
> > pointer.
> >
> > >
> > > Second, using spl_boot_device() would prevent making the loader
> > > work
> > > on
> > > mach-socfpga when spl is not loaded from mmc, right?
> > >
> > > E.g. for the case I'm currently trying to fix (boot from qspi),
> > > this
> > > loader would not work although there's technically no reason
> > > since
> > > the
> > > platform only has one mmc. The call to spl_boot_device() could be
> > > replaced by the exact value here for platforms that only have one
> > > mmc. I
> > > don't know how to fix that, though.
> > >
> > The main purpose here is to initialize the mmc driver. So which
> > storage
> > user wants to load the file is totally depend what storage such as
> > mmc
> > user defines in location->name. Loader would init the storage based
> > on
> > the storage defined in location->name before accessing it. Since
> > the
> > loader only support file system at this moment, i would suggest FAT
> > fs
> > for mmc and ubi fs for qspi.
> What I meant to say is this: at least on mach-socfpga, from reading
> the
> code, I cannot load a file from mmc when booting from qspi, as
> 'spl_boot_device' returns 'BOOT_DEVICE_SPI' in that case, although I
> need to pass 'BOOT_DEVICE_MMC1' to 'spl_mmc_find_device'. Or am I
> wrong
> here?
>
Okay, i got you.
Yeah, you are right for use case if you need to load the file from mmc
during SPL boot and SPL is not loaded from mmc.
Since the spl_boot_device is platform dependent, you may try to add
some state machine so that this function can return correct device
type.
Secondly, you can use this function in U-Boot instead of SPL.
Lastly, i can declare __Weak to init_mmc, so that user can define their
own implementation.
> Regards,
> Simon
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Re: [U-Boot] [PATCH v6 2/2] common: Generic firmware loader for file system
On Tue, 2018-01-23 at 08:58 +0100, Simon Goldschmidt wrote:
> On 27.12.2017 06:04, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > common/Makefile| 1 +
> > common/fs_loader.c | 309
> > +
> > doc/README.firmware_loader | 76 +++
> > include/fs_loader.h| 28
> > 4 files changed, 414 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 doc/README.firmware_loader
> > create mode 100644 include/fs_loader.h
> >
> > diff --git a/common/Makefile b/common/Makefile
> > index cec506f..2934221 100644
> > --- a/common/Makefile
> > +++ b/common/Makefile
> > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
>
>
> >
> > diff --git a/include/fs_loader.h b/include/fs_loader.h
> > new file mode 100644
> > index 000..83a8b80
> > --- /dev/null
> > +++ b/include/fs_loader.h
> > @@ -0,0 +1,28 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +#ifndef _FS_LOADER_H_
> > +#define _FS_LOADER_H_
> > +
> > +#include
> > +
> > +struct firmware {
> > + size_t size;/* Size of a file */
> > + const u8 *data; /* Buffer for file */
> > + void *priv; /* Firmware loader private
> > fields */
> > +};
> > +
> > +struct device_location {
> > + char *name; /* Such as mmc, usb,and sata. */
> Would it make sense to use 'enum if_type' from blk.h here instead of
> a
> "magic" name? Or are the constants passed here "well-known" enough
> to
> hide them?
>
This structure is declared such way so that it can be compatible with
common/splash.c. It also much more easy to port fs_loader into
common/splash_source.c in later.
> Regards,
> Simon
>
> >
> > + char *devpart; /* Use the load command dev:part
> > conventions */
> > + char *mtdpart; /* MTD partition for ubi part */
> > + char *ubivol; /* UBI volume-name for ubifsmount */
> > +};
> > +
> > +int request_firmware_into_buf(struct firmware **firmware_p,
> > + const char *name,
> > + struct device_location *location,
> > + void *buf, size_t size, u32 offset);
> > +#endif
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Re: [U-Boot] [PATCH v6 2/2] common: Generic firmware loader for file system
On Tue, 2018-01-23 at 10:13 +0100, Simon Goldschmidt wrote:
> On 23.01.2018 09:31, Chee, Tien Fong wrote:
> >
> > On Tue, 2018-01-23 at 08:58 +0100, Simon Goldschmidt wrote:
> > >
> > > On 27.12.2017 06:04, tien.fong.c...@intel.com wrote:
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This is file system generic loader which can be used to load
> > > > the file image from the storage into target such as memory.
> > > > The consumer driver would then use this loader to program
> > > > whatever,
> > > > ie. the FPGA device.
> > > >
> > > > Signed-off-by: Tien Fong Chee
> > > > ---
> > > > common/Makefile| 1 +
> > > > common/fs_loader.c | 309
> > > > +
> > > > doc/README.firmware_loader | 76 +++
> > > > include/fs_loader.h| 28
> > > > 4 files changed, 414 insertions(+)
> > > > create mode 100644 common/fs_loader.c
> > > > create mode 100644 doc/README.firmware_loader
> > > > create mode 100644 include/fs_loader.h
> > > >
> > > > diff --git a/common/Makefile b/common/Makefile
> > > > index cec506f..2934221 100644
> > > > --- a/common/Makefile
> > > > +++ b/common/Makefile
> > > > @@ -130,3 +130,4 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
> > >
> > >
> > > >
> > > > diff --git a/include/fs_loader.h b/include/fs_loader.h
> > > > new file mode 100644
> > > > index 000..83a8b80
> > > > --- /dev/null
> > > > +++ b/include/fs_loader.h
> > > > @@ -0,0 +1,28 @@
> > > > +/*
> > > > + * Copyright (C) 2017 Intel Corporation
> > > > + *
> > > > + * SPDX-License-Identifier:GPL-2.0
> > > > + */
> > > > +#ifndef _FS_LOADER_H_
> > > > +#define _FS_LOADER_H_
> > > > +
> > > > +#include
> > > > +
> > > > +struct firmware {
> > > > + size_t size;/* Size of a file */
> > > > + const u8 *data; /* Buffer for file */
> > > > + void *priv; /* Firmware loader private
> > > > fields */
> > > > +};
> > > > +
> > > > +struct device_location {
> > > > + char *name; /* Such as mmc, usb,and sata. */
> > > Would it make sense to use 'enum if_type' from blk.h here instead
> > > of
> > > a
> > > "magic" name? Or are the constants passed here "well-known"
> > > enough
> > > to
> > > hide them?
> > >
> > This structure is declared such way so that it can be compatible
> > with
> > common/splash.c. It also much more easy to port fs_loader into
> > common/splash_source.c in later.
> OK, but reading splash_source.c, it seems to me that 'enum
> splash_storage' is used to detect the device to load from, not 'char
> *name'.
>
> However, since these constant strings already seem to be "common
> knowledge" for callers of fs.h functions, it might be OK to use them
> in
> the firmware loader, too. I just wanted to point this out while this
> is
> in the reviewing process.
>
Actually this is common interface name used in any fs related. You can
refer more details regarding @ifname in include/fs.h and include part.h
.
So, why this interface name must be in characters string?
It's actually serving in 2 main purposes, and 1 minor purpose:
1. console environment, most commands using those interface name as
their arguments in characters string format such as FPGA loadfs
command.
2. These command interface name is one of the characters string
argument of fs_set_blk_dev too.
3. As identity of default location and its dev_part configuration.
> >
> > >
> > > Regards,
> > > Simon
> > >
> > > >
> > > > + char *devpart; /* Use the load command dev:part
> > > > conventions */
> > > > + char *mtdpart; /* MTD partition for ubi part */
> > > > + char *ubivol; /* UBI volume-name for ubifsmount
> > > > */
> > > > +};
> > > > +
> > > > +int request_firmware_into_buf(struct firmware **firmware_p,
> > > > + const char *name,
> > > > + struct device_location
> > > > *location,
> > > > + void *buf, size_t size, u32
> > > > offset);
> > > > +#endif
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Re: [U-Boot] [PATCH v7 2/3] cmd: ubifs: Move ubifs_initialized checking into cmd_ubifs_umount()
On Tue, 2018-01-30 at 13:09 +0100, Marek Vasut wrote:
> On 01/30/2018 12:16 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > cmd_ubifs_umount() function would be called directly instead of
> > involving
> > whole command machinery in generic firmware loader, so checking on
> > ubifs_initialized status need to be done in cmd_ubifs_umount()
> > without
> > breaking original functionality design.
> >
> > Signed-off-by: Tien Fong Chee 64db5518baa
> > 2ea1a8a0e81cc485d760b850c7052
> > ---
> > cmd/ubifs.c | 20
> > include/ubi_uboot.h | 1 +
> > 2 files changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/cmd/ubifs.c b/cmd/ubifs.c
> > index 5e9d357..d18e0da 100644
> > --- a/cmd/ubifs.c
> > +++ b/cmd/ubifs.c
> > @@ -51,27 +51,31 @@ int ubifs_is_mounted(void)
> > return ubifs_mounted;
> > }
> >
> > -void cmd_ubifs_umount(void)
> > +int cmd_ubifs_umount(void)
> > {
> > + if (ubifs_initialized == 0) {
> > + printf("No UBIFS volume mounted!\n");
> > + return -1;
> > + }
> > +
> > uboot_ubifs_umount();
> > ubifs_mounted = 0;
> > ubifs_initialized = 0;
> > +
> > + return 0;
> > }
> >
> > static int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc,
> > char * const argv[])
> > {
> > + int ret;
> > +
> > if (argc != 1)
> > return CMD_RET_USAGE;
> >
> > - if (ubifs_initialized == 0) {
> > - printf("No UBIFS volume mounted!\n");
> > - return -1;
> > - }
> > -
> > - cmd_ubifs_umount();
> > + ret = cmd_ubifs_umount();
> return cmd_ubifs_umount() directly ?
>
Okay.
> >
> > - return 0;
> > + return ret;
> > }
> >
> > static int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc,
> > diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h
> > index 80acbcb..827dbfc 100644
> > --- a/include/ubi_uboot.h
> > +++ b/include/ubi_uboot.h
> > @@ -75,5 +75,6 @@ extern int ubi_volume_write(char *volume, void
> > *buf, size_t size);
> > extern int ubi_volume_read(char *volume, char *buf, size_t size);
> >
> > extern struct ubi_device *ubi_devices[];
> > +int cmd_ubifs_umount(void);
> >
> > #endif
> >
>
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Re: [U-Boot] [PATCH v7 3/3] common: Generic firmware loader for file system
On Tue, 2018-01-30 at 13:12 +0100, Marek Vasut wrote:
> On 01/30/2018 12:16 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer driver would then use this loader to program whatever,
> > ie. the FPGA device.
> >
> > Signed-off-by: Tien Fong Chee
> > Reviewed-by: Lothar Waßmann
> > ---
> > common/Kconfig | 9 ++
> > common/Makefile| 1 +
> > common/fs_loader.c | 326
> > +
> > doc/README.firmware_loader | 76 +++
> > include/fs_loader.h| 28
> > 5 files changed, 440 insertions(+)
> > create mode 100644 common/fs_loader.c
> > create mode 100644 doc/README.firmware_loader
> > create mode 100644 include/fs_loader.h
> [...]
>
> >
> > +#ifdef CONFIG_CMD_UBIFS
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + int ret;
> > + char cmd[32];
> > +
> > + snprintf(cmd, sizeof(location->mtdpart), "ubi part %s",
> > + location->mtdpart);
> > +
> > + ret = run_command(cmd, 0);
> Can you call the UBI functions directly instead of invoking the U-
> Boot
> command parser ?
>
Okay.
> >
> > + if (ret)
> > + return ret;
> > +
> > + snprintf(cmd, sizeof(location->ubivol), "ubifsmount %s",
> > + location->ubivol);
> > +
> > + ret = run_command(cmd, 0);
> DTTO here ...
>
Okay.
Could i submit the next version immediately for this minor change?
> >
> > + return ret;
> > +}
> > +
> > +static int umount_ubifs(void)
> > +{
> > + return cmd_ubifs_umount();
> > +}
> > +#else
> > +static int mount_ubifs(struct device_location *location)
> > +{
> > + debug("Error: Cannot load image: no UBIFS support\n");
> > + return -ENOSYS;
> > +}
> > +#endif
> [...]
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RE: [PATCH v1 01/17] arch: arm: update kconfig for new platform agilex5
Hi Jit Loon, > -Original Message- > From: Lim, Jit Loon > Sent: Wednesday, 21 June, 2023 11:16 AM > To: u-boot@lists.denx.de > Cc: Jagan Teki ; Vignesh R > ; Vasut, Marek ; Simon > ; Chee, Tien Fong > ; Hea, Kok Kiang ; > Lokanathan, Raaj ; Maniyam, Dinesh > ; Ng, Boon Khai ; > Yuslaimi, Alif Zakuan ; Chong, Teik Heng > ; Zamri, Muhammad Hazim Izzat > ; Lim, Jit Loon > ; Tang, Sieu Mun > Subject: [PATCH v1 01/17] arch: arm: update kconfig for new platform agilex5 > > This is for new platform enablement for agilex5 > > Signed-off-by: Jit Loon Lim > --- > arch/arm/Kconfig | 5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index > 99264a6478..8e36456fa8 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1093,6 +1093,8 @@ config ARCH_SOCFPGA > select SPL_LIBGENERIC_SUPPORT > select SPL_OF_CONTROL > select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 > + select SPL_DRIVERS_MISC if TARGET_SOCFPGA_SOC64 > + select SPL_SOCFPGA_SEC_REG if TARGET_SOCFPGA_SOC64 Please exclude these changes for now because this driver is not in mainline yet. You can submit another patch for these changes once the driver is accepted into mainline. > select SPL_SERIAL > select SPL_SYSRESET > select SPL_WATCHDOG > @@ -1101,7 +1103,8 @@ config ARCH_SOCFPGA > select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || > TARGET_SOCFPGA_ARRIA10 > select SYSRESET > select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || > TARGET_SOCFPGA_ARRIA10 > - select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64 > + select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 > && TARGET_SOCFPGA_SOC64 > + imply SYSRESET_SOCFPGA_AGILEX5 if TARGET_SOCFPGA_AGILEX5 Please update your commit message, your message should be clear and accurate to reflect your changes here. > imply CMD_DM > imply CMD_MTDPARTS > imply CRC32_VERIFY > -- > 2.26.2 Thanks and regards, Tien Fong
RE: [PATCH v1 02/17] arch: arm: dts: add dts and dtsi for new platform agilex5
Hi Jit Loon,
> -Original Message-
> From: Lim, Jit Loon
> Sent: Wednesday, 21 June, 2023 11:16 AM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki ; Vignesh R
> ; Vasut, Marek ; Simon
> ; Chee, Tien Fong
> ; Hea, Kok Kiang ;
> Lokanathan, Raaj ; Maniyam, Dinesh
> ; Ng, Boon Khai ;
> Yuslaimi, Alif Zakuan ; Chong, Teik Heng
> ; Zamri, Muhammad Hazim Izzat
> ; Lim, Jit Loon
> ; Tang, Sieu Mun
> Subject: [PATCH v1 02/17] arch: arm: dts: add dts and dtsi for new platform
> agilex5
>
> This is for new platform enablement for agilex5.
> Add agilex5 dtsi and dts.
> Update checkpatch error for stratix10.
Why having checkpatch error for Stratix10?
This should be in a separate patch.
>
> Signed-off-by: Jit Loon Lim
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 459 +
> arch/arm/dts/socfpga_agilex5.dtsi | 634 ++
> .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 131
> arch/arm/dts/socfpga_agilex5_socdk.dts| 165 +
> arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi| 38 +-
> arch/arm/dts/socfpga_soc64_u-boot.dtsi| 120
> arch/arm/dts/socfpga_stratix10.dtsi | 0
> .../dts/socfpga_stratix10_socdk-u-boot.dtsi | 0
> arch/arm/dts/socfpga_stratix10_socdk.dts | 0
> 10 files changed, 1534 insertions(+), 14 deletions(-) create mode 100644
> arch/arm/dts/socfpga_agilex5-u-boot.dtsi
> create mode 100644 arch/arm/dts/socfpga_agilex5.dtsi create mode 100644
> arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
> create mode 100644 arch/arm/dts/socfpga_agilex5_socdk.dts
> create mode 100644 arch/arm/dts/socfpga_soc64_u-boot.dtsi
> mode change 100755 => 100644 arch/arm/dts/socfpga_stratix10.dtsi
> mode change 100755 => 100644 arch/arm/dts/socfpga_stratix10_socdk-u-
> boot.dtsi
> mode change 100755 => 100644 arch/arm/dts/socfpga_stratix10_socdk.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index
> 480269fa60..2e4bc556e1 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -456,6 +456,7 @@ dtb-$(CONFIG_TARGET_THUNDERX_88XX) +=
> thunderx-88xx.dtb
>
> dtb-$(CONFIG_ARCH_SOCFPGA) +=\
> socfpga_agilex_socdk.dtb\
> + socfpga_agilex5_socdk.dtb \
> socfpga_arria5_secu1.dtb\
> socfpga_arria5_socdk.dtb\
> socfpga_arria10_chameleonv3_270_2.dtb \
> diff --git a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
> b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
> new file mode 100644
> index 00..6a1299901a
> --- /dev/null
> +++ b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
> @@ -0,0 +1,459 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * U-Boot additions
> + *
> + * Copyright (C) 2019-2022 Intel Corporation */
> +
> +#include "socfpga_soc64_u-boot.dtsi"
> +#include "socfpga_soc64_fit-u-boot.dtsi"
> +
> +/{
> + memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + bootph-all;
> + };
> +
> + soc {
> + bootph-all;
> +
> + socfpga_secreg: socfpga-secreg {
> + compatible = "intel,socfpga-secreg";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + bootph-all;
> +
> + /* DSU */
> + i_ccu_caiu0@1c00 {
> + reg = <0x1c00 0x1000>;
> + intel,offset-settings =
> + /* CAIUAMIGR */
> + <0x03c0 0x0003 0x001f>,
> + /* CAIUMIFSR */
> + <0x03c4 0x
> 0x07070777>,
> + /* DII1_MPFEREGS */
> + <0x0414 0x00018000 0x>,
> + <0x0418 0x 0x00ff>,
> + <0x0410 0xc0e00200 0xc1f03e1f>,
> + /* DII2_GICREGS */
> + <0x0424 0x0001d000 0x>,
> + <0x0428 0x 0x00ff>,
> + <0x0420 0xc0800400 0xc1f03e1f>,
> + /* NCAIU0_LWSOC2FPGA */
>
RE: [PATCH v1 03/17] arch: arm: mach-socfpga: add new platform agilex5 mach-socfpga enablement
Hi Jit Loon, > -Original Message- > From: Lim, Jit Loon > Sent: Wednesday, 21 June, 2023 11:16 AM > To: u-boot@lists.denx.de > Cc: Jagan Teki ; Vignesh R > ; Vasut, Marek ; Simon > ; Chee, Tien Fong > ; Hea, Kok Kiang ; > Lokanathan, Raaj ; Maniyam, Dinesh > ; Ng, Boon Khai ; > Yuslaimi, Alif Zakuan ; Chong, Teik Heng > ; Zamri, Muhammad Hazim Izzat > ; Lim, Jit Loon > ; Tang, Sieu Mun > Subject: [PATCH v1 03/17] arch: arm: mach-socfpga: add new platform > agilex5 mach-socfpga enablement > > This is for new platform enablement for agilex5. > Add platform related files to enable new product. You should not squash all IP drivers such as clock manager, reset manager into one patch, this is not the right way to generate the patch, very hard for me to review the codes. > > Signed-off-by: Jit Loon Lim > --- > arch/arm/mach-socfpga/Kconfig | 37 +++ > arch/arm/mach-socfpga/Makefile| 69 - > arch/arm/mach-socfpga/board.c | 65 - > arch/arm/mach-socfpga/clock_manager_agilex5.c | 82 ++ > arch/arm/mach-socfpga/firewall.c | 107 --- > arch/arm/mach-socfpga/lowlevel_init_agilex5.S | 61 > arch/arm/mach-socfpga/lowlevel_init_soc64.S | 167 ++- > arch/arm/mach-socfpga/mailbox_s10.c | 21 ++ > arch/arm/mach-socfpga/misc.c | 19 +- > arch/arm/mach-socfpga/misc_soc64.c| 33 ++- > arch/arm/mach-socfpga/mmu-arm64_s10.c | 43 ++- > arch/arm/mach-socfpga/reset_manager_s10.c | 271 +++-- > - > arch/arm/mach-socfpga/secure_reg_helper.c | 4 +- > arch/arm/mach-socfpga/smmu_agilex5.c | 34 +++ > arch/arm/mach-socfpga/smmu_s10.c | 126 > arch/arm/mach-socfpga/spl_agilex5.c | 180 > arch/arm/mach-socfpga/spl_soc64.c | 188 +++- > arch/arm/mach-socfpga/u-boot-spl-soc64.lds| 93 ++ > arch/arm/mach-socfpga/wrap_handoff_soc64.c| 7 +- > 19 files changed, 1429 insertions(+), 178 deletions(-) > create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex5.c > delete mode 100644 arch/arm/mach-socfpga/firewall.c > create mode 100644 arch/arm/mach-socfpga/lowlevel_init_agilex5.S > create mode 100644 arch/arm/mach-socfpga/smmu_agilex5.c > create mode 100644 arch/arm/mach-socfpga/smmu_s10.c > create mode 100644 arch/arm/mach-socfpga/spl_agilex5.c > create mode 100644 arch/arm/mach-socfpga/u-boot-spl-soc64.lds > > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach- > socfpga/Kconfig > index 503c82d388..562c3796ec 100644 > --- a/arch/arm/mach-socfpga/Kconfig > +++ b/arch/arm/mach-socfpga/Kconfig > @@ -44,6 +44,15 @@ config TEXT_BASE > default 0x0140 if TARGET_SOCFPGA_ARRIA10 > default 0x0140 if TARGET_SOCFPGA_GEN5 > > +config ARMV8_PSCI_NR_CPUS > + default 4 if TARGET_SOCFPGA_SOC64 > + > +config ARMV8_SECURE_BASE > + default 0x1000 if TARGET_SOCFPGA_SOC64 && ARMV8_PSCI > + > +config SYS_HAS_ARMV8_SECURE_BASE > + default y if TARGET_SOCFPGA_SOC64 && ARMV8_PSCI > + > config TARGET_SOCFPGA_AGILEX > bool > select ARMV8_MULTIENTRY > @@ -51,10 +60,31 @@ config TARGET_SOCFPGA_AGILEX > select BINMAN if SPL_ATF > select CLK > select FPGA_INTEL_SDM_MAILBOX > + select GICV2 > + select NCORE_CACHE > + select SPL_CLK if SPL > + select TARGET_SOCFPGA_SOC64 > + > +config TARGET_SOCFPGA_AGILEX5 > + bool > + select BINMAN if SPL_ATF > + select CLK > + select FPGA_INTEL_SDM_MAILBOX > + select GICV3 > select NCORE_CACHE > select SPL_CLK if SPL > select TARGET_SOCFPGA_SOC64 > > +config TARGET_SOCFPGA_AGILEX5_EMU > + bool "Enable build that bootable only on Agilex5 Emulator" > + help > + This is to use for Agilex5 Emulator. > + > +config TARGET_SOCFPGA_AGILEX5_SIMICS > + bool "Enable build that bootable only on Agilex5 Simics platform" > + help > + This is to use for Agilex5 Simics. > + > config TARGET_SOCFPGA_ARRIA5 > bool > select TARGET_SOCFPGA_GEN5 > @@ -126,6 +156,10 @@ config TARGET_SOCFPGA_AGILEX_SOCDK > bool "Intel SOCFPGA SoCDK (Agilex)" > select TARGET_SOCFPGA_AGILEX > > +config TARGET_SOCFPGA_AGILEX5_SOCDK > + bool "Intel SOCFPGA SoCDK (Agilex5)" > + select TARGET_SOCFPGA_AGILEX5 > + > config TARGET_SOCFPGA_ARIES_MCVEVK > bool "Aries MCVEVK (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > @@ -199,6 +233,7 @@ config TARGET_SOCFPGA_TERASIC_SOCKIT > endchoice >
RE: [PATCH v1 1/1] drivers: misc: Add socfpga_dtreg driver for Intel SoCFPGA
Hi,
> -Original Message-
> From: Lau, Wan Yee
> Sent: Friday, December 8, 2023 4:37 PM
> To: u-boot@lists.denx.de
> Cc: Simon Glass ; Kever Yang chips.com>; Bin Meng ; Jonas Karlman
> ; Jean-Marie Lemetayer ; Peng
> Fan ; Vladimir Zapolskiy
> ; Konrad Dybcio ;
> Marek Vasut ; Simon Goldschmidt
> ; Chee, Tien Fong
> ; Hea, Kok Kiang ;
> Maniyam, Dinesh ; Ng, Boon Khai
> ; Yuslaimi, Alif Zakuan
> ; Chong, Teik Heng
> ; Zamri, Muhammad Hazim Izzat
> ; Lim, Jit Loon
> ; Tang, Sieu Mun
> Subject: [PATCH v1 1/1] drivers: misc: Add socfpga_dtreg driver for Intel
> SoCFPGA
>
> From: Wan Yee Lau
>
> This driver can be used to provide user a clean interface and all register
> settings are centralized in one place, device tree without need for
> hardcoding in the source code.
>
> Signed-off-by: Wan Yee Lau
> ---
> .../misc/socfpga_dtreg.txt| 66 ++
> drivers/misc/Kconfig | 7 ++
> drivers/misc/Makefile | 1 +
> drivers/misc/socfpga_dtreg.c | 117 ++
> 4 files changed, 191 insertions(+)
> create mode 100644 doc/device-tree-bindings/misc/socfpga_dtreg.txt
> create mode 100644 drivers/misc/socfpga_dtreg.c
>
> diff --git a/doc/device-tree-bindings/misc/socfpga_dtreg.txt b/doc/device-
> tree-bindings/misc/socfpga_dtreg.txt
> new file mode 100644
> index 00..5458103f88
> --- /dev/null
> +++ b/doc/device-tree-bindings/misc/socfpga_dtreg.txt
> @@ -0,0 +1,66 @@
> +* Firewall and privilege register settings in device tree
> +
> +Required properties:
> +
> +
> +- compatible: should contain "intel,socfpga-dtreg"
> +- reg: Physical base address and size of block register.
> +- intel,offset-settings: 32-bit offset address of block register,
> + followed by 32-bit value settings and
> + the masking bits, only masking bit
> + set to 1 allows modification.
> +
> +This driver can be used to provide user a clean interface and all
> +register settings are centralized in one place, device tree without
> +need for hardcoding in the source code.
> +
> +General setup would be to set the memory address used by the register,
> +followed by the offset-settings containing the 32-bit offset address of
> +the block register, then the 32-bit value settings and lastly the
> +masking bits.
> +
> +Example:
> +
> +
> +Configuration for multiple dtreg node support in device tree:
> +
> + socfpga_mainfirewall: socfpga-mainfirewall {
> + compatible = "intel,socfpga-dtreg";
> + #address-cells = <1>;
> +#size-cells = <1>;
> + bootph-all;
> +
> +coh_cpu0_bypass_OC_Firewall_main_Firewall@f7100200 {
> + reg = <0xf7100200 0x0014>;
> +intel,offset-settings =
> + /* Disable ocram security at CCU for
> non secure
> access */
> +<0x004 0x8000 0xe007>,
> +<0x008 0x8000 0xe007>,
> +<0x00c 0x8000 0xe007>,
> +<0x010 0x8000 0xe007>;
> +bootph-all;
> +};
> +};
> +
> + socfpga_mpfefirewall: socfpga-mpfefirewall {
> + compatible = "intel,socfpga-dtreg";
> + #address-cells = <1>;
> +#size-cells = <1>;
> + bootph-all;
> +
> +soc_noc_fw_mpfe_csr_inst_0_mpfe_scr@f802 {
> +reg = <0xf802 0x001c>;
> +intel,offset-settings =
> +/* Disable MPFE firewall for SMMU */
> +<0x 0x00010101 0x00010101>,
> +/* Disable MPFE firewall for HMC
> adapter */
> +<0x0004 0x0001 0x00010101>;
> + bootph-all;
> +};
> +};
> +
> +To call the nodes use:
> +
> + ret = uclass_get_device_by_name(UCLASS_NOP, "socfpga-
> mainfirewall", &dev);
> + ret = uclass_get_device_by_name(UCLASS_NOP, "socfpga-
> mpfefirewall"
RE: [PATCH] arm: dts: agilex: Increase reserved memory size to 32MB
Hi,
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Friday, December 15, 2023 3:22 PM
> To: u-boot@lists.denx.de
> Cc: Marek ; Simon ;
> Chee, Tien Fong ; Hea, Kok Kiang
> ; Maniyam, Dinesh
> ; Ng, Boon Khai ;
> Yuslaimi, Alif Zakuan ; Chong, Teik Heng
> ; Zamri, Muhammad Hazim Izzat
> ; Lim, Jit Loon
> ; Tang, Sieu Mun
> Subject: [PATCH] arm: dts: agilex: Increase reserved memory size to 32MB
>
> From: Dinesh Maniyam
>
> The reserved space is extended to 32MB in Linux kernel because additional
> space is needed for authorization execution of JIC/RBF file.
> U-Boot required to align with Linux.
>
> Signed-off-by: Dinesh Maniyam
> ---
> arch/arm/dts/socfpga_agilex.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/dts/socfpga_agilex.dtsi
> b/arch/arm/dts/socfpga_agilex.dtsi
> index c3ead2d72b..712304d07a 100644
> --- a/arch/arm/dts/socfpga_agilex.dtsi
> +++ b/arch/arm/dts/socfpga_agilex.dtsi
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> - * Copyright (C) 2019, Intel Corporation
> + * Copyright (C) 2019-2023 Intel Corporation
> */
>
> /dts-v1/;
> @@ -20,7 +20,7 @@
>
> service_reserved: svcbuffer@0 {
> compatible = "shared-dma-pool";
> - reg = <0x0 0x0 0x0 0x100>;
> + reg = <0x0 0x0 0x0 0x200>;
> alignment = <0x1000>;
> no-map;
> };
> --
> 2.26.2
Reviewed-by: Tien Fong Chee
Regards
Tien Fong
RE: [PATCH] clk: altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to bit(0)
Hi, > -Original Message- > From: Maniyam, Dinesh > Sent: Friday, December 15, 2023 3:15 PM > To: u-boot@lists.denx.de > Cc: Marek ; Simon ; > Lukasz Majewski ; Sean Anderson ; > Chee, Tien Fong ; Hea, Kok Kiang > ; Maniyam, Dinesh > ; Ng, Boon Khai ; > Yuslaimi, Alif Zakuan ; Chong, Teik Heng > ; Zamri, Muhammad Hazim Izzat > ; Lim, Jit Loon > ; Tang, Sieu Mun > Subject: [PATCH] clk: altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to > bit(0) > > From: Dinesh Maniyam > > MEMCLKMGR_EXTCNTRST_C0CNTRST register defined as BIT[0] in > documentation but it is wrongly defined as BIT[7] in u-boot code. This > register is used to hold associated pingpong counter in reset while PLL and > 5:1 mux configuration is changed. > > Signed-off-by: Dinesh Maniyam > --- > drivers/clk/altera/clk-mem-n5x.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/altera/clk-mem-n5x.h b/drivers/clk/altera/clk-mem- > n5x.h > index 7b687012e8..c6bc44bb34 100644 > --- a/drivers/clk/altera/clk-mem-n5x.h > +++ b/drivers/clk/altera/clk-mem-n5x.h > @@ -1,6 +1,6 @@ > /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ > /* > - * Copyright (C) 2020-2022 Intel Corporation > + * Copyright (C) 2020-2023 Intel Corporation > */ > > #ifndef _CLK_MEM_N5X_ > @@ -77,7 +77,7 @@ > #define MEMCLKMGR_PLLOUTDIV_C0CNT_MASK > GENMASK(4, 0) > #define MEMCLKMGR_PLLOUTDIV_C0CNT_OFFSET 0 > > -#define MEMCLKMGR_EXTCNTRST_C0CNTRST BIT(7) > +#define MEMCLKMGR_EXTCNTRST_C0CNTRST BIT(0) > #define MEMCLKMGR_EXTCNTRST_ALLCNTRST\ > (MEMCLKMGR_EXTCNTRST_C0CNTRST) > > -- > 2.26.2 Reviewed-by: Tien Fong Chee Regards Tien Fong
RE: [PATCH] arm: socfpga: stratix10: SPI clock support
Hi,
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Thursday, December 7, 2023 3:46 PM
> To: u-boot@lists.denx.de
> Cc: Marek ; Simon ;
> Chee, Tien Fong ; Hea, Kok Kiang
> ; Maniyam, Dinesh ;
> Ng, Boon Khai ; Yuslaimi, Alif Zakuan
> ; Chong, Teik Heng
> ; Zamri, Muhammad Hazim Izzat
> ; Lim, Jit Loon
> ; Tang, Sieu Mun
> Subject: [PATCH] arm: socfpga: stratix10: SPI clock support
>
> From: Dinesh Maniyam
>
> This patch is to add SPI clock support for stratix10. Get clock rate function
> always returning 0 because the DW-SPI driver get the rate from clock node in
> dts but Stratix10 does not support device tree clock node.To overcome this spi
> will get the clock_rate directly from spi clock controller override the weaker
> function.
>
> Signed-off-by: Dinesh Maniyam
> ---
> arch/arm/mach-socfpga/clock_manager_s10.c | 17 -
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-
> socfpga/clock_manager_s10.c
> index 4b4f0749db..45300336d5 100644
> --- a/arch/arm/mach-socfpga/clock_manager_s10.c
> +++ b/arch/arm/mach-socfpga/clock_manager_s10.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> - * Copyright (C) 2016-2018 Intel Corporation
> + * Copyright (C) 2016-2023 Intel Corporation
> *
> */
>
> @@ -399,6 +399,21 @@ unsigned int cm_get_l4_sys_free_clk_hz(void)
> return cm_get_l3_main_clk_hz() / 4;
> }
>
> +/*
> + * Override weak dw_spi_get_clk implementation in designware_spi.c
> +driver */
> +
> +int dw_spi_get_clk(struct udevice *bus, ulong *rate) {
> + *rate = cm_get_spi_controller_clk_hz();
> + if (!*rate) {
> + printf("SPI: clock rate is zero");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> void cm_print_clock_quick_summary(void)
> {
> printf("MPU %d kHz\n", (u32)(cm_get_mpu_clk_hz() / 1000));
> --
> 2.26.2
Reviewed-by: Tien Fong Chee
Regards
Tien Fong
Pull request: SoCFPGA changes for commit 3c9bb8fbdc77f
Hi Tom, Please pull the SoCFPGA changes as shown in below. Best regards, Tien Fong The following changes since commit 3c04fcf3137d5f694d52b8f355373e4baabe5f78: Merge patch series "k3-j721e: beagleboneai: Fix USB" (2024-01-20 11:39:13 -0500) are available in the Git repository at: https://github.com/tienfong/uboot_mainline.git 3c9bb8fbdc77f6bd56e97597d875d8965db3b96c for you to fetch changes up to 3c9bb8fbdc77f6bd56e97597d875d8965db3b96c: arm: dts: agilex: Increase reserved memory size to 32MB (2024-01-22 16:51:29 +0800) Dinesh Maniyam (3): arm: socfpga: stratix10: SPI clock support clk: altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to bit(0) arm: dts: agilex: Increase reserved memory size to 32MB arch/arm/dts/socfpga_agilex.dtsi | 4 ++-- arch/arm/mach-socfpga/clock_manager_s10.c | 17 - drivers/clk/altera/clk-mem-n5x.h | 4 ++-- 3 files changed, 20 insertions(+), 5 deletions(-)
RE: Pull request: SoCFPGA changes for commit 3c9bb8fbdc77f
Hi Tom, > -Original Message- > From: Tom Rini > Sent: Monday, January 22, 2024 10:47 PM > To: Chee, Tien Fong > Cc: u-boot@lists.denx.de; Vasut, Marek ; Maniyam, > Dinesh ; Hea, Kok Kiang > > Subject: Re: Pull request: SoCFPGA changes for commit 3c9bb8fbdc77f > > On Mon, Jan 22, 2024 at 09:30:40AM +, Chee, Tien Fong wrote: > > > Hi Tom, > > > > Please pull the SoCFPGA changes as shown in below. > > > > Best regards, > > Tien Fong > > > > The following changes since commit > 3c04fcf3137d5f694d52b8f355373e4baabe5f78: > > > > Merge patch series "k3-j721e: beagleboneai: Fix USB" (2024-01-20 > > 11:39:13 -0500) > > > > are available in the Git repository at: > > > > https://github.com/tienfong/uboot_mainline.git > > 3c9bb8fbdc77f6bd56e97597d875d8965db3b96c > > Lets talk off-list about getting things moved to https://source.denx.de/u- > boot/custodians/u-boot-socfpga/ please. Sure. > > > > > for you to fetch changes up to > 3c9bb8fbdc77f6bd56e97597d875d8965db3b96c: > > > > arm: dts: agilex: Increase reserved memory size to 32MB (2024-01-22 > > 16:51:29 +0800) > > There's a few more patches showing under: > https://patchwork.ozlabs.org/project/uboot/list/?q=socfpga are they ready > or need changes? Thanks for pointing. - Changes are needed for first item. - Second item is already part of this pull request - I will submit request for third item. Best regards, Tien Fong.
RE: [PATCH 1/1] socfpga_de1_soc: Specify Uart clock in dts
> -Original Message-
> From: U-Boot On Behalf Of "Alexander
> Daum"
> Sent: Wednesday, January 4, 2023 5:11 AM
> To: u-boot@lists.denx.de
> Cc: "Alexander Daum"
> Subject: [PATCH 1/1] socfpga_de1_soc: Specify Uart clock in dts
>
> UART output was broken since commit c402e8170245 ("dts: arm: socfpga:
> merge gen5 devicetrees from linux"), when uart clocks where removed from
> socfpga.dtsi
>
> This patch specifies the uart clock for DE1-SoC board.
>
> Signed-off-by: Alexander Daum
> ---
> arch/arm/dts/socfpga_cyclone5_de1_soc.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> index ff1e61e0cb..f4935d0689 100644
> --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> @@ -76,6 +76,7 @@
>
> &uart0 {
> u-boot,dm-pre-reloc;
> + clock-frequency = <1>;
> };
>
> &watchdog0 {
Reviewed-by: Tien Fong Chee
Regards
Tien Fong
RE: [PATCH v2 1/1] drivers: misc: Add socfpga_dtreg driver for Intel SoCFPGA
> -Original Message-
> From: Lau, Wan Yee
> Sent: Monday, February 5, 2024 11:47 AM
> To: u-boot@lists.denx.de
> Cc: Marek ; Simon ;
> Chee, Tien Fong ; Hea, Kok Kiang
> ; Chong, Teik Heng
> Subject: [PATCH v2 1/1] drivers: misc: Add socfpga_dtreg driver for Intel
> SoCFPGA
>
> From: Wan Yee Lau
>
> Add socfpga_dtreg driver enablement for Intel SoCFPGA.
>
> Signed-off-by: Wan Yee Lau
> ---
> Changes for v2:
> - Rearranged header file in socfpga_drteg.c, moved lower.
>
> arch/arm/Kconfig | 2 +
> .../misc/socfpga_dtreg.txt| 74 +++
> drivers/misc/Kconfig | 7 ++
> drivers/misc/Makefile | 1 +
> drivers/misc/socfpga_dtreg.c | 117 ++
> 5 files changed, 201 insertions(+)
> create mode 100644 doc/device-tree-bindings/misc/socfpga_dtreg.txt
> create mode 100644 drivers/misc/socfpga_dtreg.c
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> 531b081de9..6087345eb8 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1092,6 +1092,8 @@ config ARCH_SOCFPGA
> select SPL_LIBGENERIC_SUPPORT
> select SPL_OF_CONTROL
> select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
> + select SPL_DRIVERS_MISC if TARGET_SOCFPGA_SOC64
> + select SPL_SOCFPGA_DT_REG if TARGET_SOCFPGA_SOC64
> select SPL_SERIAL
> select SPL_SYSRESET
> select SPL_WATCHDOG
> diff --git a/doc/device-tree-bindings/misc/socfpga_dtreg.txt b/doc/device-
> tree-bindings/misc/socfpga_dtreg.txt
> new file mode 100644
> index 00..6057f792b9
> --- /dev/null
> +++ b/doc/device-tree-bindings/misc/socfpga_dtreg.txt
> @@ -0,0 +1,74 @@
> +* Firewall and privilege register settings in device tree
> +
> +Required properties:
> +
> +
> +- compatible: should contain "intel,socfpga-dtreg"
> +- reg: Physical base address and size of block register.
> +- intel,offset-settings: 32-bit offset address of block register,
> + followed by 32-bit value settings and
> + the masking bits, only masking bit
> + set to 1 allows modification.
> +
> +The device tree node which describes secure and privilege register
> +access configuration in compile time.
> +
> +Most of these registers are expected to work except for the case which
> +some registers configuration are required for granting access to some
> +other registers, for example CCU registers have to be properly
> +configured before allowing register configuration access to fpga2sdram
> +firewall as shown in below example.
> +
> +Some registers depend on runtime data for proper configuration are
> +expected to be part of driver that generating these data for example
> +configuration for soc_noc_fw_ddr_mpu_inst_0_ddr_scr block register
> +depend on DDR size parsed from memory device tree node.
> +
> +Please refer details of tested examples below for both fpga2sdram and
> +QoS configuration with default reset value and the comments.
> +
> +Example:
> +
> +
> +Configuration for multiple dtreg node support in device tree:
> +
> + socfpga_dtreg0: socfpga-dtreg0 {
> + compatible = "intel,socfpga-dtreg";
> + #address-cells = <1>;
> +#size-cells = <1>;
> + bootph-all;
> +
> +coh_cpu0_bypass_OC_Firewall_main_Firewall@f7100200 {
> + reg = <0xf7100200 0x0014>;
> +intel,offset-settings =
> + /* Disable ocram security at CCU for
> non secure
> access */
> +<0x004 0x8000 0xe007>,
> +<0x008 0x8000 0xe007>,
> +<0x00c 0x8000 0xe007>,
> +<0x010 0x8000 0xe007>;
> +bootph-all;
> +};
> +};
> +
> + socfpga_dtreg1: socfpga-dtreg1 {
> + compatible = "intel,socfpga-dtreg";
> + #address-cells = <1>;
> +#size-cells = <1>;
> + bootph-all;
> +
> +soc_noc_fw_mpfe_csr_inst_0_mpfe_scr@f802 {
> +reg = <0xf802 0x001c>;
> +intel,offset-settings =
> +
