On Mon, Oct 6, 2014 at 5:39 PM, Yegor Yefremov
wrote:
> U-Boot 2014.07
>
> I'm trying to use ping 44..47 as input. I've configured PINMUX and
> invoked request, direction etc. I always get 0 from gpio_get_value()
>
> int val;
>
> gpio_request(44, "dip_s1"):
> gpio_request(45, "dip_s2");
> gpio_request(46, "dip_s3");
> gpio_request(47, "dip_s4");
>
> gpio_direction_input(44);
> gpio_direction_input(45);
> gpio_direction_input(46);
> gpio_direction_input(47);
>
> val = gpio_get_value(44);
> printf("DIP value: %d\n", val);
> val = gpio_get_value(45);
> printf("DIP value: %d\n", val);
> val = gpio_get_value(46);
> printf("DIP value: %d\n", val);
> val = gpio_get_value(47);
> printf("DIP value: %d\n", val);
>
> After reading http://e2e.ti.com/support/arm/sitara_arm/f/791/t/248181.aspx
> I've checked clock registers CM_PER_L4LS_CLKSTCTRL (bit 8 L4LS_GCLK
> is set) and also CM_PER_GPIO1_CLKCTRL has value 2 - enabled. I can
> also see, that arch/arm/cpu/armv7/am33xx/clock_am33xx.c->enable_basic_clocks()
> enables clocks for GPIO1.
>
> Then I checked GPIO1 specific registers and found out, that
> GPIO_SYSSTATUS (0x4804C114) shows 0x i.e. GPIO is still in
> reset. Any idea, what should be activated/setup in order to get the
> second GPIO bank working?
Some more details. These pins are working in Linux. In U-boot I can
use them as output via "gpio toggle 44" (I can measure the signal via
oscilloscope). So the requirements, that were mentioned in the thread
on TI forum are met. I still cannot understand from TRM, if debounce
clock is necessary or optional in order to get input working?
Yegor
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