[RS6000] Non-pcrel tests when power10

These tests require -mno-pcrel because they are testing features of the non-pcrel ABI. * gcc.target/powerpc/cprophard.c: Add -mno-pcrel to options. * gcc.target/powerpc/float128-hw3.c: Likewise. * gcc.target/powerpc/pr79439-1.c: Likewise. * gcc.target/powerpc/pr7943

[RS6000] Power10 vec-splati-runnable multiple test failures

FAIL: gcc.target/powerpc/vec-splati-runnable.c 1 blank line(s) in output FAIL: gcc.target/powerpc/vec-splati-runnable.c (test for excess errors) Excess errors: rs6000_emit_xxspltidp_v2df called ... and running the test fails. As the comment says /* Although the instruction says the results are

[RS6000] VSX_MM_SUFFIX

gcc.target/powerpc/vsx_mask-count-runnable.c and others Assembler messages: Error: unrecognized opcode: `vcntmb' I'm applying this one as obvious. Ref https://gcc.gnu.org/pipermail/gcc-patches/2020-July/549757.html * config/rs6000/vsx.md (vec_cntmb_, vec_extract_), (vec_expand_):

libgo patch committed: Only compile ptrace shim on GNU/Linux

This libgo patch by Nikhil Benesch only compiles the ptrace varargs shim on GNU/Linux, to avoid compilation failures on some other platforms. The C ptrace function is not entirely portable (e.g., NetBSD has `int data` instead of `void* data`), and so far Linux is the only platform that needs the va

Re: [Ada,FYI] revamp ada.numerics.aux

On Oct 18, 2020, Alexandre Oliva wrote: > The Aux_Short_Float unit is implemented in terms of the Aux_Float one, > and the others rely on the elementary functions from the C Math > library for float, double and long double types, respectively. Use Aux_Long_Float for all real types on LynxOS Fr

Re: [Ada,FYI] revamp ada.numerics.aux

On Oct 18, 2020, Alexandre Oliva wrote: > The option is provided by default, but there is an alternate version > that doesn't, that is used for vxworks targets. vxworks float EFs not precise enough -> use long float From: Alexandre Oliva Some acats-4 tests that check the precision of Float el

Re: [Ada,FYI] revamp ada.numerics.aux

On Oct 20, 2020, Rainer Orth wrote: > your patch similarly broke sparc*-sun-solaris* bootstrap. The attached > snippet on top of this workaround fixes that. Thanks, here's what I'm installing, approved by me with my build machinery maintainer hat on ;-) Use Aux_Long_Long_Float wraplf for spar

Re: [Ada,FYI] revamp ada.numerics.aux

On Oct 19, 2020, Alexandre Oliva wrote: > Hello, Andreas, > On Oct 19, 2020, Andreas Schwab wrote: >> -nostdinc a-nallfl.ads -o a-nallfl.o >> a-nallfl.ads:48:13: warning: intrinsic binding type mismatch on return value >> a-nallfl.ads:48:13: warning: intrinsic binding type mismatch on argument

Re: enable sincos optimization on cygming targets

Err, sorry, I mislabeled this patch as [FYI,Ada], but it is neither about Ada nor pre-approved. It does require a review before I can check it in. On Oct 22, 2020, Alexandre Oliva wrote: > for gcc/ChangeLog > * config/i386/cygming.h (TARGET_LIBC_HAS_FUNCTION): Enable > sincos opti

[FYI,Ada] enable sincos optimization on cygming targets

The sincos transformation does not take place on all platforms, because the libc_has_function target hook disables it by default. Current w64-mingw's math library supports sincos, sincosl and sincosf, in 32- and 64-bit modes. I suppose this has been this way for long, also with mingw32 and cygw

Re: [PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

On Thu, Oct 22, 2020 at 12:36 AM Segher Boessenkool wrote: > > On Wed, Oct 21, 2020 at 04:43:29PM +0100, Richard Sandiford wrote: > > Hongtao Liu writes: > > > + poly_uint64 nunits > > > + = GET_MODE_NUNITS (GET_MODE (SUBREG_REG (trueop0))); > > > + rtx par = trueop1; >

Re: [PATCH] Put absolute address jump table in data.rel.ro.local if targets support relocations

I had a wrong email setting and got your reply later. I modified the patch according to your advice. Could you please review it again? Thanks. On 2/10/2020 上午 1:47, Richard Sandiford wrote: Sorry for the slow review. HAO CHEN GUI via Gcc-patches writes: diff --git a/gcc/config/mips/mips.c b/

Re: [PATCH] RISC-V: Extend syntax for the multilib-generator

On Wed, Oct 21, 2020 at 7:36 PM Jim Wilson wrote: > > > On Fri, Oct 16, 2020 at 2:34 AM Kito Cheng wrote: > >> +# Example 2: >> +# rv32imafd-ilp32d--c*b >> +# means that, in addition to rv32imafd, these configurations can also >> use the >> +# rv32imafd-ilp32d libraries: rv32imafd-ilp32dc, rv32

Re: [PATCH] RISC-V: Extend syntax for the multilib-generator

On Fri, Oct 16, 2020 at 2:34 AM Kito Cheng wrote: > +# Example 2: > +# rv32imafd-ilp32d--c*b > +# means that, in addition to rv32imafd, these configurations can also use > the > +# rv32imafd-ilp32d libraries: rv32imafd-ilp32dc, rv32imafd-ilp32db, > +# rv32imafd-ilp32d

Re: [PATCH 1/2] [target 87767] Refactor AVX512 broadcast patterns with speical memory constraint.

On Wed, Oct 21, 2020 at 11:04 PM Vladimir Makarov wrote: > > > On 2020-10-20 10:11 p.m., Hongtao Liu wrote: > > > > Changed, and it passed the i386/x86-64 regression test. > > > > Update patch. > > > Thank you, Hongtao. This patch is ok for the trunk. > > Thanks for the review, committed. -- B

Ping: [PATCH][Arm] Auto-vectorization for MVE: vsub

Ping: https://gcc.gnu.org/pipermail/gcc-patches/2020-October/555646.html Thanks From: Dennis Zhang Sent: Tuesday, October 6, 2020 5:46 PM To: gcc-patches@gcc.gnu.org Cc: Kyrylo Tkachov; nd; Richard Earnshaw; Ramana Radhakrishnan Subject: Re: [PATCH][Arm] A

Re: [PATCH][Arm] Auto-vectorization for MVE: vmin/vmax

Hi Kyrylo, > > From: Kyrylo Tkachov > Sent: Wednesday, October 14, 2020 10:15 AM > To: Dennis Zhang; gcc-patches@gcc.gnu.org > Cc: nd; Richard Earnshaw; Ramana Radhakrishnan > Subject: RE: [PATCH][Arm] Auto-vectorization for MVE: vmin/vmax > > Hi Dennis, >

Move nested function info out of cgraph_node

Hi, this patch moves nested function information out of cgraph_node (to a summary). This saves memory (especially at WPA time) and also makes nested function support more contained. Bootstrapped/regtested x86_64-linux. Plan to commit it tomorrow. gcc/ChangeLog: 2020-10-22 Jan Hubicka

[PATCH] Handle a_2= &b properly in range calculations.

Pick up the correct type for the RHS of  a_2 = &b. bootstrapped on  x86_64-pc-linux-gnu, no regressions, pushed. Andrew commit 966fdb2e12c0347aa3f9efaf5f4e1cd8237fa024 Author: Andrew MacLeod Date: Wed Oct 21 20:11:16 2020 -0400 Handle a_2= &b properly in range calculations. when

Re: [PATCH][Arm] Auto-vectorization for MVE: vmul

Hi kyrylo, > > From: Kyrylo Tkachov > Sent: Wednesday, October 14, 2020 10:14 AM > To: Dennis Zhang; gcc-patches@gcc.gnu.org > Cc: nd; Richard Earnshaw; Ramana Radhakrishnan > Subject: RE: [PATCH][Arm] Auto-vectorization for MVE: vmul > > Hi Dennis, > >

[PATCH] Check for undefined before not returning a constant value

Full comments in the PR, but basically substitute and fold was expecting to see a constant returned for any range which globally evaluates to a constant. This allowed it to replace all uses of an ssa name as they were encountered. The ranger model can return UNDEFINED for the range of names in

libgo patch committed: Update BSD socket code

This libgo patch by Nikhil Benesch imports the upstream code for BSD sockets and sysctls into the syscall package. This code is sufficiently different that it doesn't get merged by the scripts. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian d031aa7b3be4155b

Increase weight of builtin_constant_p hint

hi, this patch makes builtin_constant_p hint to combine with other loop hints we already support. This is necessary for it to be realy effective since most such functions will already get big_speedup hint. Bootstrapped/regtested x86_64-linux, comitted. gcc/ChangeLog: 2020-10-22 Jan Hubicka

Re: [PATCH 2/8] [RS6000] rs6000_rtx_costs for AND

On Wed, Oct 21, 2020 at 03:29:11PM -0500, Segher Boessenkool wrote: > Anyway: > > + || (outer_code == AND > + && rs6000_is_valid_2insn_and (x, mode))) > { > *total = COSTS_N_INSNS (1); > return true; > > It should return COSTS_N_INSNS (2)

Re: [PATCH] Implement no_stack_protect attribute.

+ correct kernel mailing list this time. On Wed, Oct 21, 2020 at 2:33 PM Nick Desaulniers wrote: > > Thanks for the quick feedback! > > On Wed, Oct 21, 2020 at 2:13 PM Jakub Jelinek wrote: > > > > On Wed, Oct 21, 2020 at 02:04:15PM -0700, Nick Desaulniers via Gcc-patches > > wrote: > > > Tangen

Re: [PATCH] c++: Handle RANGE_EXPR indexes in init_subob_ctx [PR97328]

On 10/21/20 5:46 PM, Patrick Palka wrote: On Wed, 21 Oct 2020, Jason Merrill wrote: On 10/8/20 4:47 PM, Patrick Palka wrote: In the testcase below, we're ICEing during constexpr evaluation of the CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'. The apparently unique thing about this C

Re: PATCH [DR2303][PR97453]

On 10/21/20 6:32 AM, kamlesh kumar wrote: gcc/cp/ChangeLog --- 2020-10-21 Kamlesh Kumar PR c++/97453 * pt.c (get_template_base): Implement DR2303, Consider closest base while template deduction when base of base also matches. gcc/testsuite/ChangeLog -

Re: [PATCH] c++: Handle RANGE_EXPR indexes in init_subob_ctx [PR97328]

On Wed, 21 Oct 2020, Jason Merrill wrote: > On 10/8/20 4:47 PM, Patrick Palka wrote: > > In the testcase below, we're ICEing during constexpr evaluation of the > > CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'. The apparently > > unique thing about this CONSTRUCTOR is that it has a RANG

Re: [PATCH] Implement no_stack_protect attribute.

Thanks for the quick feedback! On Wed, Oct 21, 2020 at 2:13 PM Jakub Jelinek wrote: > > On Wed, Oct 21, 2020 at 02:04:15PM -0700, Nick Desaulniers via Gcc-patches > wrote: > > Tangentially related question: > > We're running into a bug related to LTO for the kernel when code > > compiled with -f

Re: Increase inlining limits for inline functions with builtin_constant_p on parameter

> On Wed, Oct 21, 2020 at 09:03:03PM +0200, Martin Liška wrote: > > Maybe a silly question, but isn't the code only an obfuscation? > > What about doing: > > > > if (__builtin_constant_p(x)) > > return x < 2 ? 0 : __builtin_clz(x); > > > > which is fully eliminated in a c.031t.ccp1 pass right a

Re: Increase inlining limits for inline functions with builtin_constant_p on parameter

> > Hello. > > Maybe a silly question, but isn't the code only an obfuscation? > What about doing: > > if (__builtin_constant_p(x)) > return x < 2 ? 0 : __builtin_clz(x); > > which is fully eliminated in a c.031t.ccp1 pass right after einline happens > for a call context where 'x' is a consta

Re: [PATCH] Implement no_stack_protect attribute.

On Wed, Oct 21, 2020 at 02:04:15PM -0700, Nick Desaulniers via Gcc-patches wrote: > Tangentially related question: > We're running into a bug related to LTO for the kernel when code > compiled with -fno-stack-protector is called from and inlined into > code that is compiled with -fstack-protector.

Re: [PATCH] c++: constexpr evaluation and bare EMPTY_CLASS_EXPR [PR96575]

On 10/21/20 12:37 PM, Patrick Palka wrote: In the testcase below, folding of the initializer for 'ret' inside the instantiated f::lambda ends up yielding an initializer for which potential_constant_expression returns false. This causes finish_function to mark the lambda as non-constexpr, which u

Re: [PATCH] Implement no_stack_protect attribute.

On Tue, Oct 20, 2020 at 5:19 AM Richard Biener wrote: > > On Tue, Oct 20, 2020 at 1:24 PM Martin Liška wrote: > > > > PING^5 > > So can we use the same identifier as clang here as Nick > requests? Thus, OK with re-naming everything alongside > no_stack_protector. It isn't really the opposite of

Re: [PATCH 2/2, rs6000, V2] VSX load/store rightmost element operations

On Tue, Oct 20, 2020 at 04:34:46PM -0500, will schmidt wrote: > This adds support for the VSX load/store rightmost element operations. > This includes the instructions lxvrbx, lxvrhx, lxvrwx, lxvrdx, > stxvrbx, stxvrhx, stxvrwx, stxvrdx; And the builtins > vec_xl_sext() /* vector load sign extend *

Re: [PATCH] c++: Handle RANGE_EXPR indexes in init_subob_ctx [PR97328]

On 10/8/20 4:47 PM, Patrick Palka wrote: In the testcase below, we're ICEing during constexpr evaluation of the CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'. The apparently unique thing about this CONSTRUCTOR is that it has a RANGE_EXPR index whose corresponding sub-aggregate initiali

Re: [PATCH] c++: Check DECL_TEMPLATE_PARM_P in duplicate_decls [PR97511]

On 10/21/20 4:35 PM, Patrick Palka wrote: This makes duplicate_decls differentiate a TYPE_DECL for an alias template from a TYPE_DECL for one of its template parameters. The recently added assert in template_parm_to_arg revealed this latent issue because merging of the two TYPE_DECLs cleared the

[PATCH] c++: Check DECL_TEMPLATE_PARM_P in duplicate_decls [PR97511]

This makes duplicate_decls differentiate a TYPE_DECL for an alias template from a TYPE_DECL for one of its template parameters. The recently added assert in template_parm_to_arg revealed this latent issue because merging of the two TYPE_DECLs cleared the DECL_TEMPLATE_PARM_P flag. With this patch

Re: [PATCH 2/8] [RS6000] rs6000_rtx_costs for AND

On Wed, Oct 21, 2020 at 01:27:42PM +1030, Alan Modra wrote: > On Tue, Oct 20, 2020 at 01:55:56PM -0500, Segher Boessenkool wrote: > > On Thu, Oct 08, 2020 at 09:27:54AM +1030, Alan Modra wrote: > > > The existing "case AND" in this function is not sufficient for > > > optabs.c:avoid_expensive_const

[committed] libstdc++: Simplify std::shared_ptr construction from std::weak_ptr

The _M_add_ref_lock() and _M_add_ref_lock_nothrow() members of _Sp_counted_base are very similar, except that the former throws an exception when the use count is zero and the latter returns false. The former (and its callers) can be implemented in terms of the latter. This results in a small reduc

Re: [PATCH] libstdc++: Add c++2a

> On Oct 21, 2020, at 10:34 AM, Jonathan Wakely wrote: > > On 21/10/20 09:53 -0700, Thomas Rodgers wrote: >> From: Thomas Rodgers >> >> libstdc++/Changelog: >> libstdc++-v3/doc/doxygen/user.cfg.in (INPUT): Add new header. >> libstdc++-v3/include/Makefile.am (std_headers): Add new h

Re: [PATCH] rs6000: MMA type causes an ICE in ranger pass due to incompatible types

On 10/21/20 1:34 PM, Segher Boessenkool wrote: >> The following patch from Andrew and richi fixes the ICE on Martin's test >> case and passes bootstrap and regtesting on powerpc64le-linux. >> Ok for trunk? > > Yes, okay for trunk. Thanks! Ok, pushed to trunk. Thanks! >> Since the ranger code

Re: Increase inlining limits for inline functions with builtin_constant_p on parameter

On Wed, Oct 21, 2020 at 09:03:03PM +0200, Martin Liška wrote: > Maybe a silly question, but isn't the code only an obfuscation? > What about doing: > > if (__builtin_constant_p(x)) > return x < 2 ? 0 : __builtin_clz(x); > > which is fully eliminated in a c.031t.ccp1 pass right after einline hap

Re: Increase inlining limits for inline functions with builtin_constant_p on parameter

On 10/21/20 5:11 PM, Jan Hubicka wrote: return ( __builtin_constant_p((size) - 1) ? ( __builtin_constant_p((size) - 1) ? ( ((size) - 1) < 2 ? 0 : ((size) - 1) & (1ULL << 63) ? 63 : ((size) - 1) & (1ULL << 62) ? 62 : ((size) - 1) & (1ULL << 61) ? 61 : ((size) - 1) & (1ULL << 60) ? 60 : ((size) - 1

Re: [PATCH] rs6000: MMA type causes an ICE in ranger pass due to incompatible types

Hi! On Wed, Oct 21, 2020 at 01:00:20PM -0500, Peter Bergner wrote: > PR97360 shows a problem in how we create our PXI and POI modes that cause > an ICE in the ranger pass. The problem seems to be that the extra call > to build_distinct_type_copy() also creates new TYPE_{MIN,MAX}_VALUEs that > are

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Wed, Oct 21, 2020 at 06:09:28PM +0200, Uros Bizjak wrote: > On Wed, Oct 21, 2020 at 4:45 PM Qing Zhao wrote: > > Looks like it’s very complicate to use the st/mm register set correctly, So, > > I assume that this set of registers might be very hard to be used by the > > attacker correctly. > >

[PATCH] rs6000: MMA type causes an ICE in ranger pass due to incompatible types

PR97360 shows a problem in how we create our PXI and POI modes that cause an ICE in the ranger pass. The problem seems to be that the extra call to build_distinct_type_copy() also creates new TYPE_{MIN,MAX}_VALUEs that are not compatible/the same as the base type itself. The simple "fix" is to ac

Re: [PATCH] phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]

On Wed, Oct 21, 2020 at 07:30:46PM +0200, Rainer Orth wrote: > this broke sparc-sun-solaris2.11 bootstrap > > /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c: In function 'bool > cond_removal_in_popcount_clz_ctz_pattern(basic_block, basic_block, edge, > edge, gimple*, tree, tree)': > /vol/gcc

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On 21/10/2020 17:11, Christophe Lyon via Gcc-patches wrote: > On Wed, 21 Oct 2020 at 18:07, Richard Earnshaw > wrote: >> >> On 21/10/2020 16:49, Christophe Lyon via Gcc-patches wrote: >>> On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw >>> wrote: On 20/10/2020 12:22, Richard Earnshaw wro

Re: [PATCH] libstdc++: Add c++2a

On 21/10/20 09:53 -0700, Thomas Rodgers wrote: From: Thomas Rodgers libstdc++/Changelog: libstdc++-v3/doc/doxygen/user.cfg.in (INPUT): Add new header. libstdc++-v3/include/Makefile.am (std_headers): Add new header. libstdc++-v3/include/Makefile.in: Regenerate. li

Re: [PATCH] phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]

Hi Jakub, > While we have at the RTL level noce_try_ifelse_collapse combined with > simplify_cond_clz_ctz, that optimization doesn't always trigger because > e.g. on powerpc there is an define_insn to compare a reg against zero and > copy that register to another one and so we end up with a differ

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

> >What about instead putting above extern long long __gnat_file_time the > >following: > > > >#if __APPLE__ > >#define st_mtim st_mtimespec > >#define st_atim st_atimespec > >#endif > > > >To avoid having the two (nested) #if __APPLE__ and keep the code easier two => three :-) > >to follow? > >

[PATCH] libstdc++: Add c++2a

From: Thomas Rodgers libstdc++/Changelog: libstdc++-v3/doc/doxygen/user.cfg.in (INPUT): Add new header. libstdc++-v3/include/Makefile.am (std_headers): Add new header. libstdc++-v3/include/Makefile.in: Regenerate. libstdc++-v3/include/precompiled/stdc++.h: Include

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

> On Oct 21, 2020, at 11:09 AM, Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 4:45 PM Qing Zhao wrote: >> >> >> >> -- q -- >> The CPU shall be in x87 mode upon entry to a function. Therefore, >> every function that uses the MMX registers is required to issue an >> emms or femms instructio

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

Got it. thanks. Qing > On Oct 21, 2020, at 10:47 AM, Richard Sandiford > wrote: > > Qing Zhao writes: + /* For each of the hard registers, check to see whether we should zero it if: + 1. it is a call-used-registers; + and 2. it is not a fixed-registers; + and 3

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

Arnaud Charlet wrote: This patch breaks bootstrap on Darwin platforms. Pierre-Marie de Rodat wrote: The modification file time precision now defined by OS. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * adaint.c (__gnat_file_time): New routine. (__gnat_copy_

Re: [PATCH] c++: Handle RANGE_EXPR indexes in init_subob_ctx [PR97328]

On Thu, 8 Oct 2020, Patrick Palka wrote: > In the testcase below, we're ICEing during constexpr evaluation of the > CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'. The apparently > unique thing about this CONSTRUCTOR is that it has a RANGE_EXPR index > whose corresponding sub-aggregate i

[PATCH] c++: constexpr evaluation and bare EMPTY_CLASS_EXPR [PR96575]

In the testcase below, folding of the initializer for 'ret' inside the instantiated f::lambda ends up yielding an initializer for which potential_constant_expression returns false. This causes finish_function to mark the lambda as non-constexpr, which ultimately causes us to reject 'f(g)' as a cal

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

> This patch breaks bootstrap on Darwin platforms. > > Pierre-Marie de Rodat wrote: > > > The modification file time precision now defined by OS. > > > > Tested on x86_64-pc-linux-gnu, committed on trunk > > > > gcc/ada/ > > > > * adaint.c (__gnat_file_time): New routine. > > (__gnat_

Re: [PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

On Wed, Oct 21, 2020 at 04:43:29PM +0100, Richard Sandiford wrote: > Hongtao Liu writes: > > + poly_uint64 nunits > > + = GET_MODE_NUNITS (GET_MODE (SUBREG_REG (trueop0))); > > + rtx par = trueop1; > > + for (int i = 0; i != l1; i++) > > + { > > +

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

Hi Folks, This patch breaks bootstrap on Darwin platforms. Pierre-Marie de Rodat wrote: > The modification file time precision now defined by OS. > > Tested on x86_64-pc-linux-gnu, committed on trunk > > gcc/ada/ > > * adaint.c (__gnat_file_time): New routine. > (__gnat_copy_attr

Re: [PATCH] x86: Allow configuring with --with-arch_64=x86-64-v[234]

On Wed, Oct 21, 2020 at 5:15 PM Jakub Jelinek wrote: > > On Wed, Sep 30, 2020 at 06:06:31PM +0200, Florian Weimer wrote: > > --- a/gcc/common/config/i386/i386-common.c > > +++ b/gcc/common/config/i386/i386-common.c > > @@ -1795,9 +1795,13 @@ const pta processor_alias_table[] = > > PTA_MMX | P

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On Wed, 21 Oct 2020 at 18:07, Richard Earnshaw wrote: > > On 21/10/2020 16:49, Christophe Lyon via Gcc-patches wrote: > > On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw > > wrote: > >> > >> On 20/10/2020 12:22, Richard Earnshaw wrote: > >>> On 19/10/2020 17:32, Christophe Lyon via Gcc-patches wro

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Wed, Oct 21, 2020 at 4:45 PM Qing Zhao wrote: > > > > On Oct 21, 2020, at 3:03 AM, Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 9:18 AM Uros Bizjak wrote: > > > On Tue, Oct 20, 2020 at 10:04 PM Qing Zhao wrote: > > +/* Check whether the register REGNO should be zeroed on X86. > + When AL

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On 21/10/2020 16:49, Christophe Lyon via Gcc-patches wrote: > On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw > wrote: >> >> On 20/10/2020 12:22, Richard Earnshaw wrote: >>> On 19/10/2020 17:32, Christophe Lyon via Gcc-patches wrote: On Mon, 19 Oct 2020 at 16:39, Richard Earnshaw wrote:

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw wrote: > > On 20/10/2020 12:22, Richard Earnshaw wrote: > > On 19/10/2020 17:32, Christophe Lyon via Gcc-patches wrote: > >> On Mon, 19 Oct 2020 at 16:39, Richard Earnshaw > >> wrote: > >>> > >>> On 12/10/2020 08:59, Christophe Lyon via Gcc-patches w

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

Qing Zhao writes: >>> + /* For each of the hard registers, check to see whether we should zero >>> it if: >>> + 1. it is a call-used-registers; >>> + and 2. it is not a fixed-registers; >>> + and 3. it is not live at the return of the routine; >>> + and 4. it is general registor if gpr_only

Re: [PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

Hongtao Liu writes: > + poly_uint64 nunits > + = GET_MODE_NUNITS (GET_MODE (SUBREG_REG (trueop0))); > + rtx par = trueop1; > + for (int i = 0; i != l1; i++) > + { > + rtx idx = XVECEXP (trueop1, 0, i); > + if (!CONST

Re: [PATCH] x86: Allow configuring with --with-arch_64=x86-64-v[234]

* Jakub Jelinek: > On Wed, Sep 30, 2020 at 06:06:31PM +0200, Florian Weimer wrote: >> --- a/gcc/common/config/i386/i386-common.c >> +++ b/gcc/common/config/i386/i386-common.c >> @@ -1795,9 +1795,13 @@ const pta processor_alias_table[] = >> PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE | PTA_FXS

[PATCH] x86: Allow configuring with --with-arch_64=x86-64-v[234]

On Wed, Sep 30, 2020 at 06:06:31PM +0200, Florian Weimer wrote: > --- a/gcc/common/config/i386/i386-common.c > +++ b/gcc/common/config/i386/i386-common.c > @@ -1795,9 +1795,13 @@ const pta processor_alias_table[] = > PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE | PTA_FXSR, 0, P_NONE}, >{"at

Increase inlining limits for inline functions with builtin_constant_p on parameter

Hi, this patch implements heuristics that increases inline limits (by the hints mechanism) for inline functions that use builtin_constant_p on parameter. Those are very likely intended to be always inlined and simplify after inlining. The PR is about a function that we used to inline with --param

[patch] vxworks: Remove interfering default #undefs from vx-common.h

This patch removes the #undef issued for LIB_SPEC and LINK_SPEC in vx-common.h, which all the ports do on their own and which impairs the bi-arch’d ppc*-vx7r2 targets, relying on linux64 definitions. Tested together with the previous changes posted for the newly introduced powerpc ports. Committ

Re: [PATCH 1/2] [target 87767] Refactor AVX512 broadcast patterns with speical memory constraint.

On 2020-10-20 10:11 p.m., Hongtao Liu wrote: Changed, and it passed the i386/x86-64 regression test. Update patch. Thank you, Hongtao.  This patch is ok for the trunk.

[PATCH] SLP: Move load/store-lanes check till late

Hi All, This moves the code that checks for load/store lanes further in the pipeline and places it after slp_optimize. This would allow us to perform optimizations on the SLP tree and only bail out if we really have a permute. With this change it allows us to handle permutes such as {1,1,1,1} wh

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

> On Oct 21, 2020, at 3:03 AM, Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 9:18 AM Uros Bizjak > wrote: >> >> On Tue, Oct 20, 2020 at 10:04 PM Qing Zhao wrote: >> >>> +/* Check whether the register REGNO should be zeroed on X86. >>> + When ALL_SSE_ZEROED is t

[committed] libstdc++: Make structured bindings always work for subranges [PR 97512]

The definition of ranges::subrange was moved to the new header so that it could be used in without including the whole of . However, the tuple-like support that enables subrange to be used with structured bindings was left in . This is arguably conforming (to use a subrange you should include ) b

[Patch, committed] Fortran: class.c - update vtable comment

I was confused as I saw _deallocate – but didn't show up in the big comment at the beginning of class.c. Hence, I added it. Committed as r11-4186-g310fe80babe04ccb7d2e15c8fca7dc98180701a8 but if you have have follow-up suggestions, we can surely change it. Tobias - Mentor Graphi

[RFC2][PATCH] SLP vectorize across PHI nodes

This enables SLP build to handle PHI nodes in full, continuing the SLP build to non-backedges. For loop vectorization this enables outer loop vectorization of nested SLP cycles and for BB vectorization this enables vectorization of PHIs at CFG merges. Vectorized backedge defs are now filled using

Re: PING [PATCH] Enable GCC support for Intel Key Locker extension

On Wed, Oct 21, 2020 at 1:48 PM Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 11:11 AM Hongyu Wang wrote: > > > > Hi, > > > > > IIRC, adding a new regclass is O(n^2), so it should be avoided. I > > > think that the new patterns should follow the same path as vzeroall > > > and vzeroupper pattern

[PATCH] openmp: Change omp_get_initial_device () to match OpenMP 5.1 requirements

On Thu, Oct 15, 2020 at 01:02:29PM +0200, Jakub Jelinek via Gcc-patches wrote: > Therefore, I think until omp_get_initial_device () value is changed, we The following so far untested patch implements that change. OpenMP 4.5 said for omp_get_initial_device: The value of the device number is implem

Re: PING [PATCH] Enable GCC support for Intel Key Locker extension

On Wed, Oct 21, 2020 at 11:11 AM Hongyu Wang wrote: > > Hi, > > > IIRC, adding a new regclass is O(n^2), so it should be avoided. I > > think that the new patterns should follow the same path as vzeroall > > and vzeroupper patterns, where we emit the pattern with explicit hard > > regs. > > > > BT

Re: [PATCH] LTO: get_section: add new argument

On 10/21/20 1:17 PM, Martin Liška wrote: On 10/21/20 12:06 PM, Jan Hubicka wrote: I think the streaming should happen only from ipa-fnsummary. Oriignally ipa-prop was ipa-cp only, then indirect inlining was added, but these days we have specialized analysis pass and thus ipa-prop should be inter

Re: [PATCH] LTO: get_section: add new argument

On 10/21/20 12:06 PM, Jan Hubicka wrote: I think the streaming should happen only from ipa-fnsummary. Oriignally ipa-prop was ipa-cp only, then indirect inlining was added, but these days we have specialized analysis pass and thus ipa-prop should be intergrated to it. All right, there's a WIP p

PATCH [DR2303][PR97453]

gcc/cp/ChangeLog --- 2020-10-21 Kamlesh Kumar PR c++/97453 * pt.c (get_template_base): Implement DR2303, Consider closest base while template deduction when base of base also matches. gcc/testsuite/ChangeLog -- 2020-10-2

Re: [patch] Introduce vxworks7r2 support for ppc and ppc64

Hi Segher! > On 20 Oct 2020, at 22:06, Segher Boessenkool > wrote: > >> +# Wind River 7 post SR0600 is mostly like Linux so we setup >> +# out config in a very similar fashion and adjust to a few >> +# specificities. > > "our config"? > >> + - Starting with VxWorks 7 (post SR600

Re: [PATCH] LTO: get_section: add new argument

> Hey. > > During partial linking we ipa_prop_write_jump_functions twice from 2 IPA > pass (fnsummary and cp). That produces 2 compressed blocks in an ELF section > and then zstd complains as sections size does not correspond to the compressed > stream. > > I'm adding both sanity check changes an

[PATCH] LTO: get_section: add new argument

Hey. During partial linking we ipa_prop_write_jump_functions twice from 2 IPA pass (fnsummary and cp). That produces 2 compressed blocks in an ELF section and then zstd complains as sections size does not correspond to the compressed stream. I'm adding both sanity check changes and the fix in ip

[PATCH] tree-optimization/97500 - avoid SLP backedges for inductions

Inductions are not vectorized as cycle but materialized from SCEV data. Filling in backedge SLP nodes confuses this process. Bootstrapped / tested on x86_64-unknown-linux-gnu, pushed. 2020-10-21 Richard Biener PR tree-optimization/97500 * tree-vect-slp.c (vect_analyze_slp_back

Re: [PATCH][PR 97506] Simplify trivial vcond_expr in expander.

On Wed, Oct 21, 2020 at 5:07 PM Jakub Jelinek wrote: > > On Wed, Oct 21, 2020 at 02:29:07PM +0800, Hongtao Liu via Gcc-patches wrote: > > gcc/ChangeLog: > > > > PR target/97506 > > * config/i386/i386-expand.c (ix86_expand_sse_movcc): Move > > op_true to dest directly When o

Re: [PATCH] vect: Remove redundant LOOP_VINFO_FULLY_MASKED_P

On Wed, Oct 21, 2020 at 10:58 AM Kewen.Lin via Gcc-patches wrote: > > Hi, > > This is a very trivial patch, it's to remove a redundant > LOOP_VINFO_FULLY_MASKED_P condition check which will be > checked in vect_use_loop_mask_for_alignment_p. > > Is it OK for trunk? OK. > > BR, > Kewen > - >

Re: [PATCH] Saturate overflows return from SCEV in ranger.

On Wed, Oct 21, 2020 at 10:50 AM Aldy Hernandez wrote: > > > > On 10/21/20 9:59 AM, Richard Biener wrote: > > >>> /* Even for valid range info, sometimes overflow flag will leak in. > >>>As GIMPLE IL should have no constants with TREE_OVERFLOW set, we > >>>drop them. */ > >>>

[PATCH] aarch64: Add vcopy(q)__lane(q)_bf16 intrinsics

Hi all, I'd like to submit the following patch implementing the bfloat16_t neon related copy intrinsics: vcopy_lane_bf16, vcopyq_lane_bf16, vcopyq_laneq_bf16, vcopy_laneq_bf16. Please see refer to: ACLE ISA

[PATCH 2/2] libsanitizer: add test-case

gcc/testsuite/ChangeLog: PR sanitizer/97414 * g++.dg/asan/pr97414.C: New test. (cherry picked from commit 6c5b08a2ca935c5db68e79d33e5c5b752252115c) --- gcc/testsuite/g++.dg/asan/pr97414.C | 19 +++ 1 file changed, 19 insertions(+) create mode 100644 gcc/testsuit

[PATCH 1/2] ASAN: Support detect_invalid_pointer_pairs=1 with detect_stack_use_after_return=1

Do not crash when AsanThread::GetStackVariableShadowStart does not find a variable for a pointer on a shadow stack. Cherry-pick from ad2be02a833e56f7fe280797280b219eb3312621. Differential Revision: https://reviews.llvm.org/D89552 (cherry picked from commit b69f33f477b9ac38af3c39465600ae74a35548

Re: PING [PATCH] Enable GCC support for Intel Key Locker extension

Hi, > IIRC, adding a new regclass is O(n^2), so it should be avoided. I > think that the new patterns should follow the same path as vzeroall > and vzeroupper patterns, where we emit the pattern with explicit hard > regs. > > BTW: We do have SSE_FIRST_REG class, but this class was added to solve >

Re: [PATCH][PR 97506] Simplify trivial vcond_expr in expander.

On Wed, Oct 21, 2020 at 02:29:07PM +0800, Hongtao Liu via Gcc-patches wrote: > gcc/ChangeLog: > > PR target/97506 > * config/i386/i386-expand.c (ix86_expand_sse_movcc): Move > op_true to dest directly When op_true equals op_false, Lowercase when in the middle of sentence.

[PATCH] vect: Remove redundant LOOP_VINFO_FULLY_MASKED_P

Hi, This is a very trivial patch, it's to remove a redundant LOOP_VINFO_FULLY_MASKED_P condition check which will be checked in vect_use_loop_mask_for_alignment_p. Is it OK for trunk? BR, Kewen - gcc/ChangeLog: * tree-vect-loop.c (vect_transform_loop): Remove the redundant L

Re: [PATCH] Saturate overflows return from SCEV in ranger.

On 10/21/20 9:59 AM, Richard Biener wrote: /* Even for valid range info, sometimes overflow flag will leak in. As GIMPLE IL should have no constants with TREE_OVERFLOW set, we drop them. */ if (TREE_OVERFLOW_P (*min)) *min = drop_tree_overflow (*min); if (TREE

[PATCH 1/2] Separate new_edges compute in copy_bbs

This separates out a loop finding new_edges from edges in copy_bbs, making its complexity cheaper overall from total number of succs in copied bbs times num_edges to num_edges times the complexity of find_edge. Bootstrapped / tested on x86_64-unknown-linux-gnu, pushed. 2020-10-21 Richard Biener

[PATCH 2/2] Simplify CFG copying tables

This simplifies the maps between original and new basic blocks and loops as used for CFG copying. Instead of using a pointer hash table to allocated mapping entries use a hash_map with int_hash, removing the indirection and code duplication. We can use -1 and -2 as empty/deleted values as those a

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