Re: [Intel-gfx] [PATCH v4 5/7] lib/hexdump.c: Allow multiple groups to be separated by lines '|'

2019-06-24 Thread Joe Perches
On Tue, 2019-06-25 at 13:17 +1000, Alastair D'Silva wrote: > From: Alastair D'Silva > > With the wider display format, it can become hard to identify how many > bytes into the line you are looking at. > > The patch adds new flags to hex_dump_to_buffer() and print_hex_dump() to > print vertical

Re: [Intel-gfx] [PATCH v4 4/7] lib/hexdump.c: Replace ascii bool in hex_dump_to_buffer with flags

2019-06-24 Thread Joe Perches
On Tue, 2019-06-25 at 15:06 +1000, Alastair D'Silva wrote: > The change actions Jani's suggestion: > https://lkml.org/lkml/2019/6/20/343 I suggest not changing any of the existing uses of hex_dump_to_buffer and only use hex_dump_to_buffer_ext when necessary for your extended use cases.

Re: [Intel-gfx] [PATCH v4 4/7] lib/hexdump.c: Replace ascii bool in hex_dump_to_buffer with flags

2019-06-24 Thread Joe Perches
On Tue, 2019-06-25 at 15:06 +1000, Alastair D'Silva wrote: > On Mon, 2019-06-24 at 22:01 -0700, Joe Perches wrote: > > On Tue, 2019-06-25 at 13:17 +1000, Alastair D'Silva wrote: > > > From: Alastair D'Silva > > > > > > In order to support additional features, rename hex_dump_to_buffer > > > to >

Re: [Intel-gfx] [PATCH v5] drm/i915/execlists: Disable preemption under GVT

2019-06-24 Thread Zhang, Xiaolin
On 06/24/2019 05:48 PM, Chris Wilson wrote: > Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across > preemption, but mediated gvt does not fully support semaphores. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++-- >

Re: [Intel-gfx] [PATCH v4 0/7] Hexdump Enhancements

2019-06-24 Thread Joe Perches
On Tue, 2019-06-25 at 13:17 +1000, Alastair D'Silva wrote: > From: Alastair D'Silva > > Apologies for the large CC list, it's a heads up for those responsible > for subsystems where a prototype change in generic code causes a change > in those subsystems. [] > The default behaviour of hexdump is

Re: [Intel-gfx] [PATCH v4 4/7] lib/hexdump.c: Replace ascii bool in hex_dump_to_buffer with flags

2019-06-24 Thread Joe Perches
On Tue, 2019-06-25 at 13:17 +1000, Alastair D'Silva wrote: > From: Alastair D'Silva > > In order to support additional features, rename hex_dump_to_buffer to > hex_dump_to_buffer_ext, and replace the ascii bool parameter with flags. [] > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c >

[Intel-gfx] ✓ Fi.CI.IGT: success for Display uncore (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: Display uncore (rev2) URL : https://patchwork.freedesktop.org/series/61735/ State : success == Summary == CI Bug Log - changes from CI_DRM_6337_full -> Patchwork_13408_full Summary --- **SUCCESS** No

Re: [Intel-gfx] [PATCH v3 2/4] drm/panel: set display info in panel attach

2019-06-24 Thread dbasehore .
On Fri, Jun 21, 2019 at 8:41 PM Derek Basehore wrote: > > Devicetree systems can set panel orientation via a panel binding, but > there's no way, as is, to propagate this setting to the connector, > where the property need to be added. > To address this, this patch sets orientation, as well as

[Intel-gfx] ✗ Fi.CI.BAT: failure for Enable Transcoder Port Sync feature for Tiled displays (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: Enable Transcoder Port Sync feature for Tiled displays (rev2) URL : https://patchwork.freedesktop.org/series/59837/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6337 -> Patchwork_13409 Summary

[Intel-gfx] ✓ Fi.CI.BAT: success for Display uncore (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: Display uncore (rev2) URL : https://patchwork.freedesktop.org/series/61735/ State : success == Summary == CI Bug Log - changes from CI_DRM_6337 -> Patchwork_13408 Summary --- **SUCCESS** No

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable Transcoder Port Sync feature for Tiled displays (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: Enable Transcoder Port Sync feature for Tiled displays (rev2) URL : https://patchwork.freedesktop.org/series/59837/ State : warning == Summary == $ dim checkpatch origin/drm-tip e1dacdba0522 drm/i915/display: Rename update_crtcs() to commit_modeset_enables()

Re: [Intel-gfx] [PATCH v6 3/4] drm/i915/psr: Make PSR registers relative to transcoders

2019-06-24 Thread Souza, Jose
On Thu, 2019-06-20 at 17:36 +, Souza, Jose wrote: > On Thu, 2019-06-20 at 11:13 +0300, Jani Nikula wrote: > > On Wed, 19 Jun 2019, José Roberto de Souza > > wrote: > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > > b/drivers/gpu/drm/i915/i915_reg.h > > > index 4fc8dc083766..31fb4de5081c

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915/icl: Add new supported CD clocks

2019-06-24 Thread Souza, Jose
On Fri, 2019-06-21 at 09:15 -0700, Matt Roper wrote: > On Thu, Jun 20, 2019 at 05:45:54PM -0700, José Roberto de Souza > wrote: > > Now 180, 172.8 and 192 MHz are supported. > > > > 180 and 172.8 MHz CD clocks will only be used when audio is not > > enabled as state by BSpec and implemented in >

[Intel-gfx] [PATCH v3 8/8] drm/i915/display/icl: In port sync mode disable slaves first then masters

2019-06-24 Thread Manasi Navare
In the transcoder port sync mode, the slave transcoders mask their vblanks until master transcoder's vblank so while disabling them, make sure slaves are disabled first and then the masters. Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Cc: Jani Nikula Signed-off-by: Manasi Navare

[Intel-gfx] [PATCH v3 5/8] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-06-24 Thread Manasi Navare
After the state is committed, we readout the HW registers and compare the HW state with the SW state that we just committed. For Transcdoer port sync, we add master_transcoder and the salves bitmask to the crtc_state, hence we need to read those during the HW state readout to avoid pipe state

[Intel-gfx] [PATCH v3 3/8] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync

2019-06-24 Thread Manasi Navare
In case of tiled displays when the two tiles are sent across two CRTCs over two separate DP SST connectors, we need a mechanism to synchronize the two CRTCs and their corresponding transcoders. So use the master-slave mode where there is one master corresponding to last horizontal and vertical

[Intel-gfx] [PATCH v3 6/8] drm/i915/display/icl: Enable master-slaves in trans port sync mode in correct order

2019-06-24 Thread Manasi Navare
As per the display enable sequence, we need to follow the enable sequence for slaves first with DP_TP_CTL set to Idle and configure the transcoder port sync register to select the corersponding master, then follow the enable sequence for master leaving DP_TP_CTL to idle. At this point the

[Intel-gfx] [PATCH v3 4/8] drm/i915/display/icl: Enable TRANSCODER PORT SYNC for tiled displays across separate ports

2019-06-24 Thread Manasi Navare
In case of tiled displays where different tiles are displayed across different ports, we need to synchronize the transcoders involved. This patch implements the transcoder port sync feature for synchronizing one master transcoder with one or more slave transcoders. This is only enbaled in slave

[Intel-gfx] [PATCH v3 2/8] drm/i915/display: Move the commit_tail() disable sequence to commit_modeset_disables() hook

2019-06-24 Thread Manasi Navare
Create a new hook commit_modeset_disables() consistent with the naming in drm atomic helpers and similar to the commit_modeset_enables() hook. This helps better organize the disable sequence in atomic_commit_tail() and move that to this disable hook. No functional change Suggested-by: Daniel

[Intel-gfx] [PATCH v3 0/8] Enable Transcoder Port Sync feature for tiled displays

2019-06-24 Thread Manasi Navare
First two patches are cleanup patches with no functional changes to rename the existing update_crtc() hook to commit_modeset_enables() to better match the drm_atomic naming conventions. This also prepares to add new hook for ICL since that adds support for transcoder port sync feature. Rest of

[Intel-gfx] [PATCH v3 7/8] drm/i915/display/icl: Disable transcoder port sync as part of crtc_disable() sequence

2019-06-24 Thread Manasi Navare
This clears the transcoder port sync bits of the TRANS_DDI_FUNC_CTL2 register during crtc_disable(). Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Cc: Jani Nikula Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display.c | 44 1 file

[Intel-gfx] [PATCH v3 1/8] drm/i915/display: Rename update_crtcs() to commit_modeset_enables()

2019-06-24 Thread Manasi Navare
This patch has no functional changes. This just renames the update_crtcs() hooks to commit_modeset_enables() to match the drm_atomic helper naming conventions. Suggested-by: Daniel Vetter Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Cc: Jani Nikula Signed-off-by: Manasi Navare ---

Re: [Intel-gfx] [PATCH 1/3] drm/i915/icl: Add new supported CD clocks

2019-06-24 Thread Souza, Jose
On Mon, 2019-06-24 at 15:39 +0300, Ville Syrjälä wrote: > On Thu, Jun 20, 2019 at 11:33:27PM +, Souza, Jose wrote: > > On Wed, 2019-06-19 at 20:47 +0300, Ville Syrjälä wrote: > > > On Tue, Jun 18, 2019 at 03:50:33PM -0700, José Roberto de Souza > > > wrote: > > > > Now 180, 172.8 and 192 MHz

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Display uncore (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: Display uncore (rev2) URL : https://patchwork.freedesktop.org/series/61735/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: split out uncore_mmio_debug +drivers/gpu/drm/i915/intel_uncore.c:1192:1: warning: context

Re: [Intel-gfx] [PATCH v1 0/2] drm: drop uapi dependencies from include/drm

2019-06-24 Thread Sam Ravnborg
Hi Daniel. > > drm_file.h: > > - needs drm_magic_t > > drm_magic_t is a simple typedef, a simple unsigned int would do the trick > > I think we could switch over to unsigned int for this. OK, will send a v2 with this addressed. There is some preparatory patches to fix build breakage when the

Re: [Intel-gfx] [PATCH v3 1/4] drm/panel: Add helper for reading DT rotation

2019-06-24 Thread Sam Ravnborg
Hi Derek. On Fri, Jun 21, 2019 at 08:41:02PM -0700, Derek Basehore wrote: > This adds a helper function for reading the rotation (panel > orientation) from the device tree. > > Signed-off-by: Derek Basehore > --- > drivers/gpu/drm/drm_panel.c | 42 + >

[Intel-gfx] [RFC 4/4] drm/i915: convert intel_hdmi to display reg accessors

2019-06-24 Thread Daniele Ceraolo Spurio
As an example of usage of the new accessors. Changes done mechanically with some manual post-processing to use rmw where appropriate and fix line length and formatting. Signed-off-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/display/intel_hdmi.c | 278 ++ 1 file

[Intel-gfx] [RFC 0/4] Display uncore

2019-06-24 Thread Daniele Ceraolo Spurio
More focused proposal for display/GT uncore split. A few notes/considerations: - I've copied the MMIO ranges check in patch 3 from a patch from Ville that did something similar in regards to splitting GT/DE register access. I'm seeing some check failures on gen 3 and 4 [1], so I'd

[Intel-gfx] [RFC 3/4] drm/i915: introduce display_uncore

2019-06-24 Thread Daniele Ceraolo Spurio
A forcewake-less uncore to be used to decouple GT accesses from display ones to avoid serializing them when there is no need. New accessors that implicitly use the new uncore have also been added. Signed-off-by: Daniele Ceraolo Spurio Cc: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [RFC 1/4] drm/i915: split out uncore_mmio_debug

2019-06-24 Thread Daniele Ceraolo Spurio
Multiple uncore structures will share the debug infrastructure, so move it to a common place and add extra locking around it. Signed-off-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/i915_drv.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_uncore.c |

[Intel-gfx] [RFC 2/4] drm/i915: rework mmio debug stop/start

2019-06-24 Thread Daniele Ceraolo Spurio
Since we now have a separate object, it is cleaner to have dedicated functions working on the object to stop and restart the mmio debug. Apart from the cosmetic changes, this patch introduces 2 functional updates: - All calls to check_for_unclaimed_mmio will now return false when the debug is

Re: [Intel-gfx] [PATCH 19/19] drm/i915: Replace struct_mutex for batch pool serialisation

2019-06-24 Thread Matthew Auld
On Mon, 24 Jun 2019 at 06:45, Chris Wilson wrote: > > Switch to tracking activity via i915_active on individual nodes, only > keeping a list of retired objects in the cache, and reaping the cache > when the engine itself idles. > > Signed-off-by: Chris Wilson > --- >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Clear read/write domains for GPU clear

2019-06-24 Thread Patchwork
== Series Details == Series: drm/i915/gem: Clear read/write domains for GPU clear URL : https://patchwork.freedesktop.org/series/62646/ State : success == Summary == CI Bug Log - changes from CI_DRM_6334_full -> Patchwork_13407_full

[Intel-gfx] [RFC][PATCH] wake_up_var() memory ordering

2019-06-24 Thread Peter Zijlstra
Hi all, I tried using wake_up_var() today and accidentally noticed that it didn't imply an smp_mb() and specifically requires it through wake_up_bit() / waitqueue_active(). Now, wake_up_bit() doesn't imply the barrier because it is assumed to be used with the atomic bitops API which either

Re: [Intel-gfx] [PATCH 5/6] drm/i915/sdvo: Reduce the size of the on stack buffers

2019-06-24 Thread Ville Syrjälä
On Wed, Jun 19, 2019 at 07:21:48PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2019-06-19 19:03:11) > > From: Ville Syrjälä > > > > The strings we want to print to the on stack buffers should > > be no more than > > 8 * 3 + strlen("(GET_SCALED_HDTV_RESOLUTION_SUPPORT)") + 1 = 61 > >

Re: [Intel-gfx] [PATCH] drm/i915/gem: Clear read/write domains for GPU clear

2019-06-24 Thread Matthew Auld
On 24/06/2019 17:00, Chris Wilson wrote: Quoting Matthew Auld (2019-06-24 16:50:48) On 24/06/2019 15:16, Chris Wilson wrote: Update the domains for the write via the GPU so that we do not shortcircuit any set-domain wait afterwards. I'm lost. How do we short-circuit the set-domain wait? If

[Intel-gfx] [PATCH i-g-t v4 2/4] gitlab-ci: add libatomic to docker images

2019-06-24 Thread Guillaume Tucker
Add libatomic to the Fedora docker image so it can link binaries that use __atomic_* functions. Also explicitly add libatomic1 to Debian docker images as it is needed in particular on non-x86 architectures for run-time linkage. Signed-off-by: Guillaume Tucker --- Notes: v2: add libatomic1

[Intel-gfx] [PATCH i-g-t v4 1/4] meson: add libatomic dependency

2019-06-24 Thread Guillaume Tucker
Add conditional dependency on GCC's libatomic in order to be able to use the __atomic_* functions instead of the older __sync_* ones. The libatomic library is only needed when there aren't any native support on the current architecture, so a linker test is used for this purpose. This makes

[Intel-gfx] [PATCH i-g-t v4 4/4] tests/sw_sync: use atomic_* instead of __sync_*

2019-06-24 Thread Guillaume Tucker
Replace calls to the older __sync_* functions with the new atomic_* standard ones to be consistent with other tests and improve portability across CPU architectures. Add dependency of sw_sync on libatomic. Signed-off-by: Guillaume Tucker Reviewed-by: Simon Ser --- Notes: v2: use atomic_*

[Intel-gfx] [PATCH i-g-t v4 3/4] i915/gem_create: use atomic_* instead of __sync_*

2019-06-24 Thread Guillaume Tucker
This fixes builds on some architectures, in particular MIPS which doesn't have __sync_add_and_fetch_8 and __sync_val_compare_and_swap_8 for 64-bit variable handling. * replace calls to the older __sync_* functions with the new atomic_* standard ones * use the _Atomic type modifier as required

[Intel-gfx] [PATCH i-g-t v4 0/4] Use C11 atomics

2019-06-24 Thread Guillaume Tucker
This series replaces calls to the __sync_* functions with the more recent atomic_* ones defined in stdatomic.h in gem_create and sw_sync. It also adds dependency on libatomic when required, that is to say when the CPU architecture doesn't provide native support for some atomic operations. This

Re: [Intel-gfx] [PATCH 6/9] drm/i915: Use intel state as much as possible in wm code

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:46:10PM +0200, Maarten Lankhorst wrote: > Instead of directly referencing drm_crtc_state, convert to > intel_ctc_state and use the base struct. This is useful when we're > making the split between uapi and hw state, and also makes the > code slightly more readable. > >

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Pass intel state to plane functions as well

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:46:09PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > .../gpu/drm/i915/display/intel_atomic_plane.c | 39 +++-- > .../gpu/drm/i915/display/intel_atomic_plane.h | 5 +- > drivers/gpu/drm/i915/display/intel_display.c | 58

Re: [Intel-gfx] [PATCH] drm/i915/gem: Clear read/write domains for GPU clear

2019-06-24 Thread Chris Wilson
Quoting Matthew Auld (2019-06-24 16:50:48) > On 24/06/2019 15:16, Chris Wilson wrote: > > Update the domains for the write via the GPU so that we do not > > shortcircuit any set-domain wait afterwards. > > I'm lost. How do we short-circuit the set-domain wait? If we never change the read_domain,

Re: [Intel-gfx] [PATCH 4/9] drm/i915: Use intel_crtc_state in sanitize_watermarks() too

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:46:08PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/display/intel_display.c | 14 ++ > 1 file changed, 6 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c >

Re: [Intel-gfx] [PATCH 3/9] drm/i915: Convert hw state verifier to take more intel state

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:46:07PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/display/intel_display.c | 154 +-- > 1 file changed, 74 insertions(+), 80 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c

Re: [Intel-gfx] [PATCH] drm/i915/gem: Clear read/write domains for GPU clear

2019-06-24 Thread Matthew Auld
On 24/06/2019 15:16, Chris Wilson wrote: Update the domains for the write via the GPU so that we do not shortcircuit any set-domain wait afterwards. I'm lost. How do we short-circuit the set-domain wait? Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110978 Fixes: b2dbf8d982a4

Re: [Intel-gfx] [PATCH 1/9] drm/i915: Pass intel_crtc_state to needs_modeset()

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:46:05PM +0200, Maarten Lankhorst wrote: Commit msg missing from some of these. Apart from that: Reviewed-by: Ville Syrjälä > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/display/intel_display.c | 68 ++-- > 1 file changed, 34

Re: [Intel-gfx] [PATCH 2/9] drm/i915: Convert most of atomic commit to take more intel state

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:46:06PM +0200, Maarten Lankhorst wrote: > Instead of passing along drm_crtc_state and drm_atomic_state, pass > along more intel_atomic_state and intel_crtc_state. This will > make the code more readable by not casting between drm state > and intel state all the time. >

Re: [Intel-gfx] [PATCH 0/5] drm: Aspect ratio fixes

2019-06-24 Thread Ville Syrjälä
On Fri, Jun 21, 2019 at 07:28:30PM -0400, Alex Deucher wrote: > On Thu, Jun 20, 2019 at 10:26 AM Ville Syrjala > wrote: > > > > From: Ville Syrjälä > > > > Ilia pointed out some oddball crap in the i915 aspect ratio handling. > > While looking at that I noticed a bunch of fail in the core as

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Clear read/write domains for GPU clear

2019-06-24 Thread Patchwork
== Series Details == Series: drm/i915/gem: Clear read/write domains for GPU clear URL : https://patchwork.freedesktop.org/series/62646/ State : success == Summary == CI Bug Log - changes from CI_DRM_6334 -> Patchwork_13407 Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/execlists: Switch to using STOP_RING instead of a semaphore

2019-06-24 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/execlists: Switch to using STOP_RING instead of a semaphore URL : https://patchwork.freedesktop.org/series/62641/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6334 -> Patchwork_13405

Re: [Intel-gfx] [PATCH 1/6] dma-buf: add dynamic DMA-buf handling v10

2019-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2019 at 03:58:00PM +0200, Christian König wrote: > Am 24.06.19 um 13:23 schrieb Koenig, Christian: > > Am 21.06.19 um 18:27 schrieb Daniel Vetter: > > > > > So I pondered a few ideas while working out: > > > > > > 1) We drop this filtering. Importer needs to keep track of all its

Re: [Intel-gfx] [PATCH 1/6] dma-buf: add dynamic DMA-buf handling v10

2019-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2019 at 11:23:34AM +, Koenig, Christian wrote: > Am 21.06.19 um 18:27 schrieb Daniel Vetter: > >>> Your scenario here is new, and iirc my suggestion back then was to > >>> count the number of pending mappings so you don't go around calling > >>> ->invalidate on mappings that

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] dma-buf: add dynamic DMA-buf handling v11

2019-06-24 Thread Patchwork
== Series Details == Series: series starting with [1/6] dma-buf: add dynamic DMA-buf handling v11 URL : https://patchwork.freedesktop.org/series/62644/ State : failure == Summary == Applying: dma-buf: add dynamic DMA-buf handling v11 Applying: drm/ttm: remove the backing store if no placement

[Intel-gfx] [PATCH] drm/i915/gem: Clear read/write domains for GPU clear

2019-06-24 Thread Chris Wilson
Update the domains for the write via the GPU so that we do not shortcircuit any set-domain wait afterwards. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110978 Fixes: b2dbf8d982a4 ("drm/i915/blt: Remove recursive vma->lock") Signed-off-by: Chris Wilson Cc: Matthew Auld ---

[Intel-gfx] [PATCH 3/6] drm/ttm: use the parent resv for ghost objects v2

2019-06-24 Thread Christian König
This way we can even pipeline imported BO evictions. v2: Limit this to only cases when the parent object uses a separate reservation object as well. This fixes another OOM problem. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo_util.c | 20 +++- 1 file

[Intel-gfx] [PATCH 5/6] drm/amdgpu: add independent DMA-buf export v6

2019-06-24 Thread Christian König
The caching of SGT's is actually quite harmful and should probably removed altogether when all drivers are audited. Start by providing a separate DMA-buf export implementation in amdgpu. This is also a prerequisite of unpinned DMA-buf handling. v2: fix unintended recursion, remove debugging

[Intel-gfx] [PATCH 2/6] drm/ttm: remove the backing store if no placement is given

2019-06-24 Thread Christian König
Pipeline removal of the BOs backing store when no placement is given during validation. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index

[Intel-gfx] [PATCH 6/6] drm/amdgpu: add independent DMA-buf import v7

2019-06-24 Thread Christian König
Instead of relying on the DRM functions just implement our own import functions. This prepares support for taking care of unpinned DMA-buf. v2: enable for all exporters, not just amdgpu, fix invalidation handling, lock reservation object while setting callback v3: change to new dma_buf attach

[Intel-gfx] [PATCH 4/6] drm/amdgpu: use allowed_domains for exported DMA-bufs

2019-06-24 Thread Christian König
Avoid that we ping/pong the buffers when we stop to pin DMA-buf exports by using the allowed domains for exported buffers. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 1/6] dma-buf: add dynamic DMA-buf handling v11

2019-06-24 Thread Christian König
On the exporter side we add optional explicit pinning callbacks. If those callbacks are implemented the framework no longer caches sg tables and the map/unmap callbacks are always called with the lock of the reservation object held. On the importer side we add an optional invalidate callback.

Re: [Intel-gfx] [PATCH 1/6] dma-buf: add dynamic DMA-buf handling v10

2019-06-24 Thread Christian König
Am 24.06.19 um 13:23 schrieb Koenig, Christian: Am 21.06.19 um 18:27 schrieb Daniel Vetter: So I pondered a few ideas while working out: 1) We drop this filtering. Importer needs to keep track of all its mappings and filter out invalidates that aren't for that specific importer (either

Re: [Intel-gfx] [PATCH v3 3/4] drm/connector: Split out orientation quirk detection

2019-06-24 Thread Ville Syrjälä
On Fri, Jun 21, 2019 at 08:41:04PM -0700, Derek Basehore wrote: > Not every platform needs quirk detection for panel orientation, so > split the drm_connector_init_panel_orientation_property into two > functions. One for platforms without the need for quirks, and the > other for platforms that

[Intel-gfx] [PATCH 3/3] drm/i915/execlists: Convert recursive defer_request() into iterative

2019-06-24 Thread Chris Wilson
As this engine owns the lock around rq->sched.link (for those waiters submitted to this engine), we can use that link as an element in a local list. We can thus replace the recursive algorithm with an iterative walk over the ordered list of waiters. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 2/3] drm/i915: Emit final breadcrumb in request_add

2019-06-24 Thread Chris Wilson
With everything now known at the point of adding the request to the context's timeline, we can move the emission of the final breadcrumb to the request add and pull it out of the CS interrupt service handler. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_request.c | 6 +++--- 1 file

[Intel-gfx] [PATCH 1/3] drm/i915/execlists: Switch to using STOP_RING instead of a semaphore

2019-06-24 Thread Chris Wilson
Not all mediated environments yet support HW semaphores, so we should avoid using one for our preempt-to-busy barrier and instead request that the CS be paused and not advance on to the next execlist. There's a natural advantage with the register writes being serialised with the writes to the

Re: [Intel-gfx] [PATCH 1/3] drm/i915/icl: Add new supported CD clocks

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:33:27PM +, Souza, Jose wrote: > On Wed, 2019-06-19 at 20:47 +0300, Ville Syrjälä wrote: > > On Tue, Jun 18, 2019 at 03:50:33PM -0700, José Roberto de Souza > > wrote: > > > Now 180, 172.8 and 192 MHz are supported. > > > > > > 180 and 172.8 MHz CD clocks will only

Re: [Intel-gfx] [PATCH 1/2] drm: Pretty print mode flags

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 10:25:42PM +0200, Sam Ravnborg wrote: > Hi Ville. > > On Thu, Jun 20, 2019 at 09:50:48PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Decode the mode flags when printing the modeline so that I > > no longer have to decode the hex number myself. > You are

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Chris Wilson
Quoting Patchwork (2019-06-24 09:55:07) > Possible regressions > > * igt@gem_ctx_switch@basic-queue-heavy: > - shard-skl: [PASS][1] -> [INCOMPLETE][2] >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6331/shard-skl4/igt@gem_ctx_swi...@basic-queue-heavy.html >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Always clear ring_pause if we do not submit (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Always clear ring_pause if we do not submit (rev2) URL : https://patchwork.freedesktop.org/series/62540/ State : success == Summary == CI Bug Log - changes from CI_DRM_6331_full -> Patchwork_13403_full

Re: [Intel-gfx] [PATCH 1/6] dma-buf: add dynamic DMA-buf handling v10

2019-06-24 Thread Koenig, Christian
Am 21.06.19 um 18:27 schrieb Daniel Vetter: >>> Your scenario here is new, and iirc my suggestion back then was to >>> count the number of pending mappings so you don't go around calling >>> ->invalidate on mappings that don't exist. >> Well the key point is we don't call invalidate on mappings,

Re: [Intel-gfx] [PATCH v1 0/2] drm: drop uapi dependencies from include/drm

2019-06-24 Thread Jani Nikula
On Mon, 24 Jun 2019, Emil Velikov wrote: > On Mon, 24 Jun 2019 at 09:21, Daniel Vetter wrote: > >> > drm_legacy.h >> > - needs drm_map_type and drm_map_flags. Seems legit. >> >> enum in uapi, sweet (never do this, it's not portable across compilers, >> #defines all the way). > > Don't look too

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Disable preemption under GVT (rev5)

2019-06-24 Thread Chris Wilson
Quoting Chris Wilson (2019-06-24 11:37:06) > Quoting Patchwork (2019-06-24 11:30:47) > > == Series Details == > > > > Series: drm/i915/execlists: Disable preemption under GVT (rev5) > > URL : https://patchwork.freedesktop.org/series/62533/ > > State : failure > > > > == Summary == > > > > CI

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Disable preemption under GVT (rev5)

2019-06-24 Thread Chris Wilson
Quoting Patchwork (2019-06-24 11:30:47) > == Series Details == > > Series: drm/i915/execlists: Disable preemption under GVT (rev5) > URL : https://patchwork.freedesktop.org/series/62533/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_6331 -> Patchwork_13404 >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Disable preemption under GVT (rev5)

2019-06-24 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Disable preemption under GVT (rev5) URL : https://patchwork.freedesktop.org/series/62533/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6331 -> Patchwork_13404 Summary

Re: [Intel-gfx] [PATCH v2] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Mika Kuoppala
Chris Wilson writes: > In the unlikely case (thank you CI!), we may find ourselves wanting to > issue a preemption but having no runnable requests left. In this case, > we set the semaphore before computing the preemption and so must unset > it before forgetting (or else we leave the machine

Re: [Intel-gfx] [PATCH 01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-06-24 10:03:48) >> Chris Wilson writes: >> >> > In the unlikely case (thank you CI!), we may find ourselves wanting to >> > issue a preemption but having no runnable requests left. In this case, >> > we set the semaphore before computing the

Re: [Intel-gfx] [PATCH v1 0/2] drm: drop uapi dependencies from include/drm

2019-06-24 Thread Emil Velikov
On Mon, 24 Jun 2019 at 09:21, Daniel Vetter wrote: > > drm_legacy.h > > - needs drm_map_type and drm_map_flags. Seems legit. > > enum in uapi, sweet (never do this, it's not portable across compilers, > #defines all the way). Don't look too closely then $ git grep enum -- include/uapi/drm/ | wc

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Always clear ring_pause if we do not submit (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Always clear ring_pause if we do not submit (rev2) URL : https://patchwork.freedesktop.org/series/62540/ State : success == Summary == CI Bug Log - changes from CI_DRM_6331 -> Patchwork_13403

[Intel-gfx] [PATCH v5] drm/i915/execlists: Disable preemption under GVT

2019-06-24 Thread Chris Wilson
Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across preemption, but mediated gvt does not fully support semaphores. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++-- drivers/gpu/drm/i915/gt/intel_lrc.c | 21 -

[Intel-gfx] [PATCH v4] drm/i915/execlists: Disable preemption under GVT

2019-06-24 Thread Chris Wilson
Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across preemption, but mediated gvt does not fully support semaphores. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++-- drivers/gpu/drm/i915/gt/intel_lrc.c | 21 - 2

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Always clear ring_pause if we do not submit (rev2)

2019-06-24 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Always clear ring_pause if we do not submit (rev2) URL : https://patchwork.freedesktop.org/series/62540/ State : warning == Summary == $ dim checkpatch origin/drm-tip 975f9c471da0 drm/i915/execlists: Always clear ring_pause if we do not submit

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Disable preemption under GVT (rev3)

2019-06-24 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Disable preemption under GVT (rev3) URL : https://patchwork.freedesktop.org/series/62533/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6331 -> Patchwork_13402 Summary

[Intel-gfx] [PATCH v2] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Chris Wilson
In the unlikely case (thank you CI!), we may find ourselves wanting to issue a preemption but having no runnable requests left. In this case, we set the semaphore before computing the preemption and so must unset it before forgetting (or else we leave the machine busywaiting until the next request

Re: [Intel-gfx] [PATCH 01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Chris Wilson
Quoting Mika Kuoppala (2019-06-24 10:03:48) > Chris Wilson writes: > > > In the unlikely case (thank you CI!), we may find ourselves wanting to > > issue a preemption but having no runnable requests left. In this case, > > we set the semaphore before computing the preemption and so must unset >

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Disable preemption under GVT

2019-06-24 Thread Chris Wilson
Quoting Zhenyu Wang (2019-06-24 10:02:31) > On 2019.06.21 20:13:13 +0100, Chris Wilson wrote: > > Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across > > preemption, but mediated gvt does not fully support semaphores. > > > > Current looks semaphore is still used from

Re: [Intel-gfx] [PATCH 01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Chris Wilson
Quoting Mika Kuoppala (2019-06-24 10:03:48) > Chris Wilson writes: > > > In the unlikely case (thank you CI!), we may find ourselves wanting to > > issue a preemption but having no runnable requests left. In this case, > > we set the semaphore before computing the preemption and so must unset >

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Disable preemption under GVT

2019-06-24 Thread Zhenyu Wang
On 2019.06.21 20:13:13 +0100, Chris Wilson wrote: > Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across > preemption, but mediated gvt does not fully support semaphores. > Current looks semaphore is still used from emit_fini_breadcrumb which caused gvt error, gvt may support

Re: [Intel-gfx] [PATCH 01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Mika Kuoppala
Chris Wilson writes: > In the unlikely case (thank you CI!), we may find ourselves wanting to > issue a preemption but having no runnable requests left. In this case, > we set the semaphore before computing the preemption and so must unset > it before forgetting (or else we leave the machine

[Intel-gfx] [PATCH v3] drm/i915/execlists: Disable preemption under GVT

2019-06-24 Thread Chris Wilson
Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across preemption, but mediated gvt does not fully support semaphores. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Patchwork
== Series Details == Series: series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit URL : https://patchwork.freedesktop.org/series/62612/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6331_full -> Patchwork_13401_full

Re: [Intel-gfx] [PATCH v1 0/2] drm: drop uapi dependencies from include/drm

2019-06-24 Thread Daniel Vetter
On Sat, Jun 22, 2019 at 02:11:54PM +0200, Sam Ravnborg wrote: > include/drm/* shall have no or at least minimal dependencies > to include/uapi/drm/*. > Following two patches do a small effort to drop such dependencies. > > After these patches there are two users > of uapi/drm/drm.h left in

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Patchwork
== Series Details == Series: series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit URL : https://patchwork.freedesktop.org/series/62612/ State : success == Summary == CI Bug Log - changes from CI_DRM_6331 -> Patchwork_13401

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Patchwork
== Series Details == Series: series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit URL : https://patchwork.freedesktop.org/series/62612/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/execlists: Always

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

2019-06-24 Thread Patchwork
== Series Details == Series: series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit URL : https://patchwork.freedesktop.org/series/62612/ State : warning == Summary == $ dim checkpatch origin/drm-tip 64d75313cafc drm/i915/execlists: Always clear