On Thu, Jan 27, 2022 at 08:27:11AM +0100, Christian König wrote:
Am 26.01.22 um 21:36 schrieb Lucas De Marchi:
When dma_buf_map struct is passed around, it's useful to be able to
initialize a second map that takes care of reading/writing to an offset
of the original map.
Add a helper that copie
On Tue, Jan 25, 2022 at 07:03:44PM +0200, Jani Nikula wrote:
> Abstract link status check to a function that takes 128b/132b and 8b/10b
> into account, and use it. Also dump link status on failures.
>
> Cc: Uma Shankar
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i9
On Tue, Jan 25, 2022 at 07:03:43PM +0200, Jani Nikula wrote:
> +static bool
> +intel_dp_128b132b_lane_cds(struct intel_dp *intel_dp,
> +const struct intel_crtc_state *crtc_state,
> +int lttpr_count)
> +{
> + struct intel_encoder *encoder = &dp_to
On Thu, Jan 27, 2022 at 08:24:04AM +0100, Christian König wrote:
> Am 26.01.22 um 21:36 schrieb Lucas De Marchi:
> > In certain situations it's useful to be able to read or write to an
> > offset that is calculated by having the memory layout given by a struct
> > declaration. Usually we are going
On Tue, Jan 25, 2022 at 07:03:41PM +0200, Jani Nikula wrote:
> Add some of the new additions from DP 2.0 E11.
>
> Cc: Uma Shankar
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> include/drm/dp/drm_dp_helper.h | 2 ++
> 1 file changed, 2 insertions(+)
>
>
On Tue, Jan 25, 2022 at 07:03:39PM +0200, Jani Nikula wrote:
> The DP 2.0 errata changes DP_128B132B_TRAINING_AUX_RD_INTERVAL (DPCD
> 0x2216) completely. Add a new function to read that. Follow-up will need
> to clean up existing functions.
>
> v2: fix reversed interpretation of bit 7 meaning (Uma
On 1/26/22 21:04, a...@linux-foundation.org wrote:
> The mm-of-the-moment snapshot 2022-01-26-21-04 has been uploaded to
>
>https://www.ozlabs.org/~akpm/mmotm/
>
> mmotm-readme.txt says
>
> README for mm-of-the-moment:
>
> https://www.ozlabs.org/~akpm/mmotm/
>
> This is a snapshot of my
== Series Details ==
Series: series starting with [v10,1/5] drm: improve drm_buddy_alloc function
URL : https://patchwork.freedesktop.org/series/99382/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11147_full -> Patchwork_22117_full
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use dma_buf_map
URL : https://patchwork.freedesktop.org/series/99378/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11147_full -> Patchwork_22116_full
Summar
Hi Lucas,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on next-20220125]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next
drm/drm-next tegra-drm/drm/tegra/for-next linus/master airlied/drm-next
v5.17-rc1
As per the rev 5 CI results between this patch and patch7, i have introduced a
lockdep splat bug, i shall fix that in
the next rev.
...alan
On Wed, 2022-01-26 at 02:48 -0800, Alan Previn wrote:
> GuC log buffer regions for debug-log-events, crash-dumps and
> error-state-capture are all a single
== Series Details ==
Series: drm/i915/adlp: Fix TypeC PHY-ready status readout
URL : https://patchwork.freedesktop.org/series/99359/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11145 -> Patchwork_22111
Summary
---
Hi Umesh,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to linus/master drm-intel/for-linux-next v5.17-rc1 next-20220125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to
== Series Details ==
Series: series starting with [1/2] drm/i915/pmu: Fix KMD and GuC race on
accessing busyness
URL : https://patchwork.freedesktop.org/series/99388/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11148 -> Patchwork_22119
==
Hi Lucas,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on next-20220125]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next
drm/drm-next tegra-drm/drm/tegra/for-next linus/master airlied/drm-next
v
GuC updates shared memory and KMD reads it. Since this is not
synchronized, we run into a race where the value read is inconsistent.
Sometimes the inconsistency is in reading the upper MSB bytes of the
last_switch_in value. 2 types of cases are seen - upper 8 bits are zero
and upper 24 bits are zer
Use intel_uncore_read64_2x32 to read upper and lower fields of the GPM
timestamp.
v2: Fix compile error
Signed-off-by: Umesh Nerlige Ramappa
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm
== Series Details ==
Series: series starting with [1/2] drm/i915/pmu: Fix KMD and GuC race on
accessing busyness
URL : https://patchwork.freedesktop.org/series/99386/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
C
== Series Details ==
Series: drm/i915: Remove all frontbuffer tracking calls from the gem code
URL : https://patchwork.freedesktop.org/series/99365/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11145_full -> Patchwork_22113_full
===
Hi Lucas,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on next-20220125]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next
drm/drm-next tegra-drm/drm/tegra/for-next linus/master airlied/drm-next
v
== Series Details ==
Series: series starting with [v10,1/5] drm: improve drm_buddy_alloc function
URL : https://patchwork.freedesktop.org/series/99382/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11147 -> Patchwork_22117
Use intel_uncore_read64_2x32 to read upper and lower fields of the GPM
timestamp.
Signed-off-by: Umesh Nerlige Ramappa
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_s
GuC updates shared memory and KMD reads it. Since this is not
synchronized, we run into a race where the value read is inconsistent.
Sometimes the inconsistency is in reading the upper MSB bytes of the
last_switch_in value. 2 types of cases are seen - upper 8 bits are zero
and upper 24 bits are zer
== Series Details ==
Series: lib/string_helpers: Add a few string helpers (rev2)
URL : https://patchwork.freedesktop.org/series/99030/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11145_full -> Patchwork_22110_full
Summary
== Series Details ==
Series: series starting with [v10,1/5] drm: improve drm_buddy_alloc function
URL : https://patchwork.freedesktop.org/series/99382/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c9a375384fb3 drm: improve drm_buddy_alloc function
-:383: WARNING:AVOID_BUG: Avo
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use dma_buf_map
URL : https://patchwork.freedesktop.org/series/99378/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
CC [M] drive
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use dma_buf_map
URL : https://patchwork.freedesktop.org/series/99378/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11147 -> Patchwork_22116
Summary
---
On Tue, Dec 14, 2021 at 3:03 PM Sebastian Andrzej Siewior <
bige...@linutronix.de> wrote:
> From: Mike Galbraith
>
> Mario Kleiner suggest in commit
> ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into
> kms driver.")
>
> a spots where preemption should be disabled on PREE
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use dma_buf_map
URL : https://patchwork.freedesktop.org/series/99378/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use dma_buf_map
URL : https://patchwork.freedesktop.org/series/99378/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
65454816ee9c dma-buf-map: Add read/write helpers
-:105: CHECK:MACRO_ARG_PRECEDENCE: Macro argume
== Series Details ==
Series: drm/i915/display/vrr: Reset VRR capable property on a long hpd (rev2)
URL : https://patchwork.freedesktop.org/series/98801/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11147 -> Patchwork_22115
On Wed, Jan 26, 2022 at 02:48:13AM -0800, Alan Previn wrote:
Update GuC ADS size allocation to include space for
the lists of error state capture register descriptors.
Also, populate the lists of registers we want GuC to report back to
Host on engine reset events. This list should include global
== Series Details ==
Series: drm/i915/display/vrr: Reset VRR capable property on a long hpd (rev2)
URL : https://patchwork.freedesktop.org/series/98801/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
071c4ebbb036 drm/i915/display/vrr: Reset VRR capable property on a long hpd
-:7
On Mon, Jan 24, 2022 at 06:08:26PM -0800, Matt Roper wrote:
Several of our i915 header files, have been including i915_reg.h. This
means that any change to i915_reg.h will trigger a full rebuild of
pretty much every file of the driver, even those that don't have any
kind of register access. Let
On Mon, Jan 24, 2022 at 06:08:25PM -0800, Matt Roper wrote:
+#define MEMSWCTL _MMIO(0x11170) /* Ironlake only */
+#define MEMCTL_CMD_MASK 0xe000
+#define MEMCTL_CMD_SHIFT 13
+#define MEMCTL_CMD_RCLK_OFF 0
+#define MEMCTL_CMD_RCLK_ON 1
+#define MEMCTL_CMD_CHFREQ
On Mon, Jan 24, 2022 at 06:08:24PM -0800, Matt Roper wrote:
The various MI_PREDICATE registers have per-engine instances. Today we
only utilize the RCS0 instance of each, but that will likely change in
the future; switch to parameterized register definitions to make these
easier to work with goi
On Mon, Jan 24, 2022 at 06:08:22PM -0800, Matt Roper wrote:
Let's use 'struct i915_range' to express sets of b-counter and mux
registers in the perf code. This makes the code more similar to how we
handle things like multicast register ranges, forcewake tables, shadow
tables, etc. and also lets
On Mon, Jan 24, 2022 at 06:08:23PM -0800, Matt Roper wrote:
At the moment we only use R_PWR_CLK_STATE in the context of the RCS
engine, but upcoming support for compute engines will start using
instances relative to the CCS engine base offsets. Let's parameterize
the register and move it to the
On Mon, Jan 24, 2022 at 06:08:21PM -0800, Matt Roper wrote:
The OA unit registers are only used by the perf code; move them to their
own header file.
Cc: Jani Nikula
Cc: Umesh Nerlige Ramappa
Cc: Lionel Landwerlin
Signed-off-by: Matt Roper
I checked the output from git show --color-moved t
Thanks Jani for taking the time to review...
1. apologies on the const issue, this is my bad, i think it was
one of the comments from earlier rev not sure how i missed it.
Will fix this on next rev.
2. I do have a question below on the const for one of specific types
of tables. Need your though
== Series Details ==
Series: Initial support for small BAR recovery
URL : https://patchwork.freedesktop.org/series/99370/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11146 -> Patchwork_22114
Summary
---
**FAILURE**
On Wed, Jan 26, 2022 at 04:42:52PM +0200, Jani Nikula wrote:
> On Fri, 12 Nov 2021, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Use REG_GENMASK() & co. when dealing with PIPESRC.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/display/i9xx_plane.c| 4 ++--
> >
== Series Details ==
Series: Initial support for small BAR recovery
URL : https://patchwork.freedesktop.org/series/99370/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Initial support for small BAR recovery
URL : https://patchwork.freedesktop.org/series/99370/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8c8317fbf210 drm: improve drm_buddy_alloc function
-:399: WARNING:AVOID_BUG: Avoid crashing the kernel - try u
Now that all the called functions from __guc_ads_init() are converted to
use ads_map, stop using ads_blob in __guc_ads_init().
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
---
drivers/gpu
Currently guc_mmio_reg_add() relies on having enough memory available in
the array to add a new slot. It uses
`GEM_BUG_ON(count >= regset->size);` to protect going above the
threshold.
In order to allow guc_mmio_reg_add() to handle the memory allocation by
itself, it must return an error in case o
Use dma_buf_map to read fields from the dma_blob so access to IO and
system memory is abstracted away.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/uc/intel_gu
Use dma_buf_map to write the fields ads.capture_*.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 10 +-
1 file changed, 5 insertion
The ADS initialitazion was using 2 passes to calculate the regset sent
to GuC to initialize each engine: the first pass to just have the final
object size and the second to set each register in place in the final
gem object.
However in order to maintain an ordered set of registers to pass to guc,
Now we have the access to content of GuC ADS either using dma_buf_map
API or using a temporary buffer. Remove guc->ads_blob as there shouldn't
be updates using the bare pointer anymore.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Cerao
Use dma_buf_map_memset() to zero the private data as ADS may be either
on system or IO memory.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
Now that the regset list is prepared, convert guc_mmio_reg_state_init()
to use dma_buf_map to copy the array to the final location and
initialize additional fields in ads.reg_state_list.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Cera
In the other places in this function, guc->ads_map is being protected
from access when it's not yet set. However the last check is actually
about guc->ads_golden_ctxt_size been set before. These checks should
always match as the size is initialized on the first call to
guc_prep_golden_context(), b
Use dma_buf_map to write the policies update so access to IO and system
memory is abstracted away.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ad
Use the saved ads_map to prepare the golden context. One difference from
the init context is that this function can be called before there is a
gem object (and thus the guc->ads_map) to calculare the size of the
golden context that should be allocated for that object.
So in this case the function
Add a variant of shmem_read() that takes a dma_buf_map pointer rather
than a plain pointer as argument. It's mostly a copy __shmem_rw() but
adapting the api and removing the write support since there's currently
only need to use dma_buf_map as destination.
Reworking __shmem_rw() to share the imple
Add helpers on top of dma_buf_map_read_field() /
dma_buf_map_write_field() functions so they always use the right
arguments and make code easier to read.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas
Use dma_buf_map to write the fields system_info.mapping_table[][].
Since we already have the info_map around where needed, just use it
instead of going through guc->ads_map.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
S
In certain situations it's useful to be able to read or write to an
offset that is calculated by having the memory layout given by a struct
declaration. Usually we are going to read/write a u8, u16, u32 or u64.
Add a pair of macros dma_buf_map_read_field()/dma_buf_map_write_field()
to calculate th
Just like memcpy_toio(), there is also need to write a direct value to a
memory block. Add dma_buf_map_memset() to abstract memset() vs memset_io()
Cc: Matt Roper
Cc: Sumit Semwal
Cc: Christian König
Cc: linux-me...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: linaro-mm-...@lists.lin
When dma_buf_map struct is passed around, it's useful to be able to
initialize a second map that takes care of reading/writing to an offset
of the original map.
Add a helper that copies the struct and add the offset to the proper
address.
Cc: Sumit Semwal
Cc: Christian König
Cc: linux-me...@vge
Now the map is saved during creation, so use it to initialize the
golden context, reading from shmem and writing to either system or IO
memory.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: Daniel Vetter
Cc: John Harrison
Cc: Matthew Brost
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
While porting i915 to arm64 we noticed some issues accessing lmem.
Some writes were getting corrupted and the final state of the buffer
didn't have exactly what we wrote. This became evident when enabling
GuC submission: depending on the number of engines the ADS struct was
being corrupted and GuC
Convert intel_guc_ads_create() and initialization to use dma_buf_map
rather than plain pointer and save it in the guc struct. This will help
with additional updates to the ads_blob after the
creation/initialization by abstracting the IO vs system memory.
Cc: Matt Roper
Cc: Thomas Hellström
Cc: D
On Wed, Jan 26, 2022 at 10:58:46AM -0800, John Harrison wrote:
> On 1/24/2022 07:01, Matthew Brost wrote:
> > Change the preemption timeout to the smallest possible value (1 us) when
> > disabling scheduling to cancel a request and restore it after
> > cancellation. This not only cancels the reques
On Wed, Jan 26, 2022 at 11:03:24AM -0800, John Harrison wrote:
> On 1/24/2022 07:01, Matthew Brost wrote:
> > More than 1 request can be submitted to a single ELSP at a time if
> > multiple requests are ready run to on the same context. When a request
> > is canceled it is marked bad, an idle pulse
On Wed, Jan 26, 2022 at 08:24:54PM +0200, Jani Nikula wrote:
On Tue, 25 Jan 2022, Lucas De Marchi wrote:
Only x86 and in some cases PPC have support added in drm_cache.c for the
clflush class of functions. However warning once is sufficient to taint
the log instead of spamming it with "Architec
Thanks for the offline run through of all the corner
cases we are trying to handle through below codes.
Reviewed-by: Alan Previn
...alan
On Mon, 2022-01-24 at 18:01 -0800, Umesh Nerlige Ramappa wrote:
> GuC updates shared memory and KMD reads it. Since this is not
> synchronized, we run int
to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Matthew-Auld/Initial-support-for-small-BAR-recovery/20220126-232640
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a013-202201
== Series Details ==
Series: drm/i915: Remove all frontbuffer tracking calls from the gem code
URL : https://patchwork.freedesktop.org/series/99365/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11145 -> Patchwork_22113
Sum
to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Matthew-Auld/Initial-support-for-small-BAR-recovery/20220126-232640
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a002-202201
With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
settings.
When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore MSA
bit
in the DPCD. Currently the driver parses that onevery HPD but fails to reset
the corresponding VRR Capable Connector property.
Henc
On Wed, Jan 26, 2022 at 06:47:33PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/adlp: Fix TypeC PHY-ready status readout
> URL : https://patchwork.freedesktop.org/series/99359/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11145 -> Patchwork_22
On Wed, Jan 26, 2022 at 02:30:38AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/rpl-s: Add stepping info (rev4)
> URL : https://patchwork.freedesktop.org/series/99162/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11135_full -> Patchwork_22105_
== Series Details ==
Series: drm/i915: Remove all frontbuffer tracking calls from the gem code
URL : https://patchwork.freedesktop.org/series/99365/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add GuC Error Capture Support (rev5)
URL : https://patchwork.freedesktop.org/series/97187/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11145 -> Patchwork_22112
Summary
---
**FAILURE**
On 1/24/2022 07:01, Matthew Brost wrote:
More than 1 request can be submitted to a single ELSP at a time if
multiple requests are ready run to on the same context. When a request
is canceled it is marked bad, an idle pulse is triggered to the engine
(high priority kernel request), the execlists s
On 1/24/2022 07:01, Matthew Brost wrote:
Change the preemption timeout to the smallest possible value (1 us) when
disabling scheduling to cancel a request and restore it after
cancellation. This not only cancels the request as fast as possible, it
fixes a bug where the preemption timeout is 0 whi
== Series Details ==
Series: Add GuC Error Capture Support (rev5)
URL : https://patchwork.freedesktop.org/series/97187/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add GuC Error Capture Support (rev5)
URL : https://patchwork.freedesktop.org/series/97187/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
233b325e5a87 drm/i915/guc: Update GuC ADS size for error capture lists
-:32: WARNING:FILE_PATH_CHANGES: added, m
== Series Details ==
Series: drm/i915/adlp: Fix TypeC PHY-ready status readout
URL : https://patchwork.freedesktop.org/series/99359/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11145 -> Patchwork_22111
Summary
---
On 26/01/2022 15:21, Matthew Auld wrote:
From: Arunpravin
Implemented a function which walk through the order list,
compares the offset and returns the maximum offset block,
this method is unpredictable in obtaining the high range
address blocks which depends on allocation and deallocation.
On Tue, 25 Jan 2022, Anusha Srivatsa wrote:
> Add stepping-substepping info in
> accordance to BSpec changes.
> Though it looks weird, the revision ID
> for the newer stepping is indeed backwards
> and is in accordance to the spec.
>
> v2: Rearrange the platforms in logical order (Matt)
>
> Bspec:
On Tue, 25 Jan 2022, Lucas De Marchi wrote:
> Only x86 and in some cases PPC have support added in drm_cache.c for the
> clflush class of functions. However warning once is sufficient to taint
> the log instead of spamming it with "Architecture has no drm_cache.c
> support" every few millisecond.
On Fri, Jan 14, 2022 at 02:33:29PM +0200, Jani Nikula wrote:
> On Wed, 12 Jan 2022, Manasi Navare wrote:
> > With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> > settings.
> > When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore
> > MSA bit
> > in th
On Wed, 26 Jan 2022, Alan Previn wrote:
> Update GuC ADS size allocation to include space for
> the lists of error state capture register descriptors.
>
> Also, populate the lists of registers we want GuC to report back to
> Host on engine reset events. This list should include global,
> engine-cl
On Wed, 26 Jan 2022, Alan Previn wrote:
> Add device specific tables and register lists to cover different engines
> class types for GuC error state capture for XE_LP products.
>
> Also, add runtime allocation and freeing of extended register lists
> for registers that need steering identifiers th
== Series Details ==
Series: lib/string_helpers: Add a few string helpers (rev2)
URL : https://patchwork.freedesktop.org/series/99030/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11145 -> Patchwork_22110
Summary
---
On Wed, 26 Jan 2022, Alan Previn wrote:
> Update GuC ADS size allocation to include space for
> the lists of error state capture register descriptors.
>
> Also, populate the lists of registers we want GuC to report back to
> Host on engine reset events. This list should include global,
> engine-cl
On Wed, Jan 19, 2022 at 05:58:06PM +0200, Alexander Usyskin wrote:
> From: Tomas Winkler
>
> Implement runtime handlers for mei-gsc, to track
> idle state of the device properly.
>
> CC: Rodrigo Vivi
> Signed-off-by: Tomas Winkler
> Signed-off-by: Alexander Usyskin
> ---
> drivers/misc/mei/g
On Wed, Jan 19, 2022 at 05:58:04PM +0200, Alexander Usyskin wrote:
> From: Tomas Winkler
>
> GSC is a graphics system controller, based on CSE, it provides
> a chassis controller for graphics discrete cards, as well as it
> supports media protection on selected devices.
>
> mei_gsc binds to a au
On Wed, 26 Jan 2022, Matthew Auld wrote:
> From: Arunpravin
>
> - Make drm_buddy_alloc a single function to handle
> range allocation and non-range allocation demands
>
> - Implemented a new function alloc_range() which allocates
> the requested power-of-two block comply with range limitation
== Series Details ==
Series: lib/string_helpers: Add a few string helpers (rev2)
URL : https://patchwork.freedesktop.org/series/99030/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: lib/string_helpers: Add a few string helpers (rev2)
URL : https://patchwork.freedesktop.org/series/99030/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7b5dcbd538bd lib/string_helpers: Consolidate string helpers implementation
f129a0e5877f drm/i915:
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix oops due to missing stack depot
URL : https://patchwork.freedesktop.org/series/99353/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11141_full -> Patchwork_22109_full
On 26/01/2022 14:05, Thomas Hellström (Intel) wrote:
On 1/25/22 20:35, Robert Beckett wrote:
add test to check handling of misaligned offsets and sizes
v4:
* remove spurious blank lines
* explicitly cast intel_region_id to intel_memory_type in
misaligned_pin
Reported-by: kernel te
On 26/01/2022 15:45, Thomas Hellström (Intel) wrote:
On 1/25/22 20:35, Robert Beckett wrote:
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support vm->min_alignment > 4K, depending
on the vm itself and the ty
On 26/01/2022 13:49, Thomas Hellström (Intel) wrote:
On 1/25/22 20:35, Robert Beckett wrote:
From: Ramalingam C
Add a new platform flag, needs_compact_pt, to mark the requirement of
compact pt layout support for the ppGTT when using 64K GTT pages.
With this flag has_64k_pages will only in
On 1/25/22 20:35, Robert Beckett wrote:
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support vm->min_alignment > 4K, depending
on the vm itself and the type of object we are inserting.
With this in mind update
Just for CI.
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 5 ++---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +-
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_c
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