[Intel-gfx] [PATCH v3 2/3] igt/gem_wait: Use new igt_spin_batch

Cc: Chris Wilson Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue --- tests/gem_wait.c | 125 --- 1 file changed, 7 insertions(+), 118 deletions(-) diff --git a/tests/gem_wait.c b/tests/gem_wait.c index b4127de..785bb14 100644 --- a/tests

[Intel-gfx] [PATCH v3 1/3] lib: add igt_dummyload

consume exactly a specific amount of time. v2 : Add recursive batch feature from Chris v3 : Drop auto-tuned stuff. Add bo dependecy to recursive batch by adding a dummy reloc to the bo as suggested by Ville. Cc: Daniel Vetter Cc: Ville Syrjälä Cc: Chris Wilson Signed-off-by: Abdiel Janulgue

Re: [Intel-gfx] [PATCH 3/3] igt/kms_flip: Use new igt_spin_batch

On 10/28/2016 07:02 PM, Ville Syrjälä wrote: > On Fri, Oct 28, 2016 at 06:47:26PM +0300, Abdiel Janulgue wrote: >> Cc: Chris Wilson >> Cc: Daniel Vetter >> Signed-off-by: Abdiel Janulgue >> --- >> tests/kms_flip.c | 4 ++-- >> 1 file changed, 2 inserti

[Intel-gfx] [PATCH 2/3] igt/gem_wait: Use new igt_spin_batch

Cc: Chris Wilson Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue --- tests/gem_wait.c | 125 --- 1 file changed, 7 insertions(+), 118 deletions(-) diff --git a/tests/gem_wait.c b/tests/gem_wait.c index b4127de..630058c 100644 --- a/tests

[Intel-gfx] [PATCH 3/3] igt/kms_flip: Use new igt_spin_batch

Cc: Chris Wilson Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue --- tests/kms_flip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 9829b35..13cb262 100644 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c @@ -866,10 +866,10

[Intel-gfx] [PATCH 1/3] lib: add igt_dummyload

Generalized from auto-tuned GPU dummy workload in gem_wait and kms_flip v2 : Add recursive batch feature from Chris Cc: Chris Wilson Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue --- lib/Makefile.sources | 2 + lib/igt.h| 1 + lib/igt_dummyload.c | 613

[Intel-gfx] [RFC v2 i-g-t] Auto-tuned dummyload + recursive batch

consume exactly a specific amount of time. v2: Add recursive batch feature from Chris and use in gem_wait and kms_flip. I've retained the previous auto-tuned dummy load functions. Let me know if we need to drop those. Abdiel Janulgue (3): lib: add igt_dummyload igt/gem_wait

Re: [Intel-gfx] [RFC i-g-t PATCH 2/3] igt/gem_wait: Use new igt_dummyload api

On 10/13/2016 06:17 PM, Daniel Vetter wrote: > On Thu, Oct 13, 2016 at 10:49:39AM +0100, Chris Wilson wrote: >> On Thu, Oct 13, 2016 at 12:31:13PM +0300, Abdiel Janulgue wrote: >>> >>> >>> On 10/12/2016 03:07 PM, Chris Wilson wrote: >>>> On Wed, O

Re: [Intel-gfx] [RFC i-g-t PATCH 2/3] igt/gem_wait: Use new igt_dummyload api

On 10/12/2016 03:07 PM, Chris Wilson wrote: > On Wed, Oct 12, 2016 at 02:59:53PM +0300, Abdiel Janulgue wrote: >> Signed-off-by: Abdiel Janulgue >> --- >> tests/gem_wait.c | 77 >> +--- >> 1 file change

[Intel-gfx] [RFC i-g-t PATCH 1/3] lib: add igt_dummyload

Generalized from auto-tuned GPU dummy workload in gem_wait and kms_flip Signed-off-by: Abdiel Janulgue --- lib/Makefile.sources | 2 + lib/igt.h| 1 + lib/igt_dummyload.c | 419 +++ lib/igt_dummyload.h | 63 4 files

[Intel-gfx] [RFC i-g-t PATCH 3/3] igt/kms_flip: Use new igt_dummyload api

Signed-off-by: Abdiel Janulgue --- tests/kms_flip.c | 191 +++ 1 file changed, 10 insertions(+), 181 deletions(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 065ad66..93cf391 100644 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c

[Intel-gfx] [RFC i-g-t] Extract autotuned dummy load into lib

dynamically tuned to consume a specific amount of time. This functionality is generalized to lib from existing features in gem_wait and kms_flip. In the future, we could update test cases that could benefit from auto-tuned dummy workloads to use this new api. Abdiel Janulgue (3): lib: add

[Intel-gfx] [RFC i-g-t PATCH 2/3] igt/gem_wait: Use new igt_dummyload api

Signed-off-by: Abdiel Janulgue --- tests/gem_wait.c | 77 +--- 1 file changed, 12 insertions(+), 65 deletions(-) diff --git a/tests/gem_wait.c b/tests/gem_wait.c index 461efdb..24a5f5e 100644 --- a/tests/gem_wait.c +++ b/tests/gem_wait.c

Re: [Intel-gfx] [PATCH v4] drm/i915: Adjust size of PIPE_CONTROL used for gen8 render seqno write

ting in rendering corruptions. > > v2: Fix BAT failures > v3: Comments on alignment and thrashing high dword of seqno (Chris) > v4: Updated commit msg (Mika) > > Testcase: igt/gem_pipe_control_store_loop/*-qword-write > Issue: VIZ-7393 > Cc: sta...@vger.kernel.org > Cc: Ch

Re: [Intel-gfx] [PATCH v3 5/5] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

On 07/06/2015 11:28 AM, Daniel Vetter wrote: > On Thu, Jul 02, 2015 at 11:15:40AM +0100, Chris Wilson wrote: >> On Wed, Jul 01, 2015 at 10:12:23AM +0300, Abdiel Janulgue wrote: >>> Ensures that the batch buffer is executed by the resource streamer >>> >>> v2:

[Intel-gfx] [PATCH v3 5/5] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer v2: Don't skip 1<<15 for the exec flags (Jani Nikula) v3: Use HAS_RESOURCE_STREAMER macro for execbuf validation (Chris Wilson) Testcase: igt/gem_exec_params Cc: Jani Nikula Reviewed-by: Chris Wilson Signed-off

[Intel-gfx] [PATCH v4 4/5] drm/i915: add I915_PARAM_HAS_RESOURCE_STREAMER to i915_getparam

ed-by: Kenneth Graunke Cc: Kenneth Graunke Cc: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_dma.c | 3 +++ drivers/gpu/drm/i915/i915_drv.h | 3 +++ include/uapi/drm/i915_drm.h | 1 + 3 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/dr

Re: [Intel-gfx] [PATCH v3 resend 4/5] drm/i915: add I915_PARAM_HAS_RESOURCE_STREAMER to i915_getparam

On 06/24/2015 09:30 AM, Abdiel Janulgue wrote: > > > On 06/16/2015 03:41 PM, Abdiel Janulgue wrote: >> This will let userspace know whether Resource Streamer is supported >> in the kernel. >> >> v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after

Re: [Intel-gfx] [PATCH v3 resend 4/5] drm/i915: add I915_PARAM_HAS_RESOURCE_STREAMER to i915_getparam

On 06/16/2015 03:41 PM, Abdiel Janulgue wrote: > This will let userspace know whether Resource Streamer is supported > in the kernel. > > v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after > I915_PARAM_HAS_GPU_RESET. > v3: Only advertise RS support for ha

[Intel-gfx] [PATCH v3 resend 4/5] drm/i915: add I915_PARAM_HAS_RESOURCE_STREAMER to i915_getparam

d-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_dma.c | 3 +++ include/uapi/drm/i915_drm.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 88795d2..4f55f51 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/dr

[Intel-gfx] [PATCH v2 resend 4/5] drm/i915: add I915_PARAM_HAS_RESOURCE_STREAMER to i915_getparam

This will let userspace know whether Resource Streamer is supported in the kernel. v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after I915_PARAM_HAS_GPU_RESET. Suggested-by: Kenneth Graunke Cc: Kenneth Graunke Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_dma.

[Intel-gfx] [PATCH resend 5/5] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer v2: Don't skip 1<<15 for the exec flags (Jani Nikula) Testcase: igt/gem_exec_params Cc: Jani Nikula Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbu

[Intel-gfx] [PATCH resend 4/5] drm/i915: add I915_PARAM_HAS_RESOURCE_STREAMER to i915_getparam

This will let userspace know whether Resource Streamer is supported in the kernel. Suggested-by: Kenneth Graunke Cc: Kenneth Graunke Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_dma.c | 3 +++ include/uapi/drm/i915_drm.h | 1 + 2 files changed, 4 insertions(+) diff --git

[Intel-gfx] [PATCH resend 3/5] drm/i915: Enable resource streamer on Execlists

restore for Execlists. Cc: ville.syrj...@linux.intel.com Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/intel_lrc.c | 8 ++-- drivers/gpu/drm/i915/intel_lrc.h | 1 + 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm

[Intel-gfx] [PATCH resend 2/5] drm/i915: Enable Resource Streamer state save/restore on MI_SET_CONTEXT

aniel) Suggested-by: Chris Wilson Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_context.c | 4 +++- drivers/gpu/drm/i915/i915_reg.h | 5 - 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/dr

[Intel-gfx] [PATCH resend 1/5] drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START

Adds support for enabling the resource streamer on the legacy ringbuffer for HSW and GEN8. Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++-- drivers/gpu/drm/i915/intel_ringbuffer.h

[Intel-gfx] [PATCH i-g-t v3] tests/gem_exec_params: check invalid flags for Resource Streamer

Make sure resource streamer flags works only in correct ring in addition to checking next flag after the RS boundary fails. v2: Make sure we reject RS on pre-hsw. v3: Don't skip 1<<15 for the exec flags (Jani Nikula) Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue --- tests/gem_ex

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START

On 06/08/2015 07:10 PM, Ville Syrjälä wrote: > On Mon, Jun 08, 2015 at 01:04:07PM +0300, Abdiel Janulgue wrote: >> Adds support for executing the resource streamer on BDW and HSW >> >> v2: Add support for Execlists (Minu Mathai ) >> >> Reviewed-by: Chris Wilson

Re: [Intel-gfx] drm/i915/hsw/bdw: Enable resource streamer v3

terribly sorry for the typos: On 06/08/2015 01:04 PM, Abdiel Janulgue wrote: > > Although most of this patches were alread reviewed, I am resending them *already > due to additional changes suggested by Jani Nikula. In addition > Mesa folks want RS to be working with hiccups on

[Intel-gfx] [PATCH 3/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

a Cc: kenn...@whitecape.org Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_dma.c| 3 +++ drivers/gpu/drm/i915/i915_gem_execbuffer.c | 14 ++ include/uapi/drm/i915_drm.h| 8 +++- 3 files changed, 24 insertions(+), 1 deleti

[Intel-gfx] [PATCH 2/3] drm/i915: Enable Resource Streamer state save/restore

: Add RS save restore for GEN8 Cc: ville.syrj...@linux.intel.com Suggested-by: Chris Wilson Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_context.c | 4 +++- drivers/gpu/drm/i915/i915_reg.h | 5 - drivers/gpu/drm/i915/intel_lrc.c

[Intel-gfx] drm/i915/hsw/bdw: Enable resource streamer v3

Hi, Although most of this patches were alread reviewed, I am resending them due to additional changes suggested by Jani Nikula. In addition Mesa folks want RS to be working with hiccups on GEN8 as well so I added the necessary support for that platform as well. Changes since last posting: - Make

[Intel-gfx] [PATCH 1/3] drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START

Adds support for executing the resource streamer on BDW and HSW v2: Add support for Execlists (Minu Mathai ) Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_lrc.c| 4 +++- drivers/gpu/drm/i915

[Intel-gfx] [PATCH resend 2/3] drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START

Adds support for executing the resource streamer on BDW and HSW v2: Add support for Execlists (Minu Mathai ) Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_lrc.c| 3 ++- drivers/gpu/drm/i915

[Intel-gfx] [PATCH resend 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer Testcase: igt/gem_exec_params Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++ drivers/gpu/drm/i915/intel_ringbuffer.h| 1 + include/uapi/drm

[Intel-gfx] [PATCH resend 3/3] drm/i915: Enable Resource Streamer state save/restore in HSW

aniel) Suggested-by: Chris Wilson Reviewed-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_context.c | 4 +++- drivers/gpu/drm/i915/i915_reg.h | 5 - 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/dr

[Intel-gfx] [PATCH v2] tests/gem_exec_params: check invalid flags for Resource Streamer

Make sure resource streamer flags works only in correct ring in addition to checking next flag after the RS boundary fails. v2: Make sure we reject RS on pre-hsw. Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue --- tests/gem_exec_params.c | 27 ++- 1 file changed, 26

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

On 05/18/2015 05:55 PM, Chris Wilson wrote: > On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote: >> Ensures that the batch buffer is executed by the resource streamer >> >> Signed-off-by: Abdiel Janulgue > > 1-3: > Reviewed-by: Chris Wilson > &g

Re: [Intel-gfx] [PATCH v3 3/3] drm/i915: Enable Resource Streamer state save/restore in HSW

On 05/19/2015 11:26 AM, Daniel Vetter wrote: > On Tue, May 19, 2015 at 09:58:52AM +0300, Abdiel Janulgue wrote: >> >> >> On 05/18/2015 07:07 PM, Ville Syrjälä wrote: >>> On Mon, May 18, 2015 at 04:41:51PM +0100, Chris Wilson wrote: >>>> On Mon, May 1

[Intel-gfx] [PATCH] tests/gem_exec_params: check invalid flags for Resource Streamer

Make sure resource streamer flags works only in correct ring in addition to checking next flag after the RS boundary fails. Cc: Daniel Vetter Signed-off-by: Abdiel Janulgue --- tests/gem_exec_params.c | 21 - 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a

Re: [Intel-gfx] [PATCH v3 3/3] drm/i915: Enable Resource Streamer state save/restore in HSW

On 05/18/2015 07:07 PM, Ville Syrjälä wrote: > On Mon, May 18, 2015 at 04:41:51PM +0100, Chris Wilson wrote: >> On Mon, May 18, 2015 at 06:36:18PM +0300, Ville Syrjälä wrote: >>> On Mon, May 18, 2015 at 11:31:56AM +0300, Abdiel Janulgue wrote: >>>> Also clarify com

[Intel-gfx] [PATCH i-g-t] tests/gem_exec_params: check invalid flags for Resource Streamer

Signed-off-by: Abdiel Janulgue --- tests/gem_exec_params.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c index 54f0dc3..fd9d7bd 100644 --- a/tests/gem_exec_params.c +++ b/tests/gem_exec_params.c @@ -220,7 +220,7 @@ igt_main

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

On 05/18/2015 12:01 PM, Daniel Vetter wrote: > On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote: >> Ensures that the batch buffer is executed by the resource streamer >> >> Signed-off-by: Abdiel Janulgue > > Maybe I missed them, but we also need a patc

[Intel-gfx] [PATCH v3 2/3] drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START

Adds support for executing the resource streamer on BDW and HSW v2: Add support for Execlists (Minu Mathai ) Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_lrc.c| 3 ++- drivers/gpu/drm/i915/intel_ringbuffer.c | 6 -- 3

[Intel-gfx] [PATCH v3 3/3] drm/i915: Enable Resource Streamer state save/restore in HSW

Also clarify comments on context size that the extra state for Resource Streamer is included. Suggested-by: Chris Wilson Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 3 ++- 2 files changed, 3 insertions(+), 2

[Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++ drivers/gpu/drm/i915/intel_ringbuffer.h| 1 + include/uapi/drm/i915_drm.h| 7 ++- 3 files changed, 22

Re: [Intel-gfx] [PATCH 2/2] drm/i915/hsw/bdw: Enable resource streamer bits on MI_BATCH_BUFFER_START

Hi, On 05/13/2015 01:22 PM, Chris Wilson wrote: > On Wed, May 13, 2015 at 11:13:24AM +0300, Abdiel Janulgue wrote: >> Adds support for executing the resource streamer on BDW and HSW >> >> v2: Add support for Execlists (Minu Mathai ) >> >> Signed-off-by: Abdiel Jan

[Intel-gfx] [PATCH 1/2] drm/i915/hsw/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++ drivers/gpu/drm/i915/intel_ringbuffer.h| 1 + include/uapi/drm/i915_drm.h| 7 ++- 3 files changed, 22

[Intel-gfx] [PATCH 2/2] drm/i915/hsw/bdw: Enable resource streamer bits on MI_BATCH_BUFFER_START

Adds support for executing the resource streamer on BDW and HSW v2: Add support for Execlists (Minu Mathai ) Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_lrc.c| 3 ++- drivers/gpu/drm/i915/intel_ringbuffer.c | 6 -- 3

[Intel-gfx] drm/i915/hsw/bdw: Enable resource streamer v2

Changes since initial posting: - Don't split the conversion from args->flags to ring from its subsequent EINVAL check (Chris Wilson ) - Execlists support (Minu Mathai ) -- Abdiel Janulgue (2): drm/i915/hsw/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag drm/i915/hsw/bdw

Re: [Intel-gfx] [PATCH 1/2] drm/i915/hsw/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag

On 05/12/2015 12:49 PM, Chris Wilson wrote: > On Mon, May 11, 2015 at 12:01:11PM +0300, Abdiel Janulgue wrote: >> Ensures that the batch buffer is executed by the resource streamer >> >> Signed-off-by: Abdiel Janulgue >> --- >> drivers/gpu/dr

Re: [Intel-gfx] drm/i915/hsw/bdw: Enable resource streamer

On 05/11/2015 12:26 PM, Chris Wilson wrote: > On Mon, May 11, 2015 at 12:01:10PM +0300, Abdiel Janulgue wrote: >> This is a re-spin of my resource streamer patchset from a year ago. >> The resource streamer is a hw-feature that helps in reducing commands >> submitted by

[Intel-gfx] [PATCH 1/2] drm/i915/hsw/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++ drivers/gpu/drm/i915/intel_ringbuffer.h| 1 + include/uapi/drm/i915_drm.h| 7 ++- 3 files changed, 22

[Intel-gfx] drm/i915/hsw/bdw: Enable resource streamer

This is a re-spin of my resource streamer patchset from a year ago. The resource streamer is a hw-feature that helps in reducing commands submitted by the CPU. We have finally have the Mesa optimization that requires the use of this interface. Abdiel Janulgue (2): drm/i915/hsw/bdw: Expose

[Intel-gfx] [PATCH 2/2] drm/i915/hsw/bdw: Enable resource streamer bits on MI_BATCH_BUFFER_START

Adds support for executing the resource streamer on BDW Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ringbuffer.c | 6 -- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers

Re: [Intel-gfx] drm/i915/bdw: Enable resource streamer on Broadwell

On 11.06.2014 11:10, Jesse Barnes wrote: On Tue, 6 May 2014 22:25:04 +0300 Abdiel Janulgue wrote: From: Abdiel Janulgue This is a re-spin of my resource streamer patchset from October adapted to enable the feature on Broadwell instead. The resource streamer is a hw-feature that helps in

Re: [Intel-gfx] [PATCH 1/2] rendercopy/bdw: Enable hw-generated binding tables

On Wednesday, May 07, 2014 02:49:31 PM Ville Syrjälä wrote: > I quickly cobbled together a hsw version of this and gave it a whirl on > one machine. Seems to work just fine here, and no lockups when switching > between hw and sw binding tables. Did you get the lockups on hsw even > with rendercopy?

Re: [Intel-gfx] [PATCH 1/2] rendercopy/bdw: Enable hw-generated binding tables

On Wednesday, May 07, 2014 12:38:04 AM Ville Syrjälä wrote: > On Tue, May 06, 2014 at 10:48:02PM +0300, Abdiel Janulgue wrote: > > Use on-chip hw-binding table generator to generate binding > > tables when the test emits SURFACE_STATES packets. The hw generates > > these

[Intel-gfx] [PATCH] igt tests/gem_exec_params: Test for -EINVAL for invalid platform and ring when executing RS

Add test that makes sure RS bit only gets executed on BDW and on the render ring. Signed-off-by: Abdiel Janulgue --- tests/gem_exec_params.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c index 769969d..a3f765b 100644 --- a

[Intel-gfx] [PATCH 1/2] rendercopy/bdw: Enable hw-generated binding tables

Use on-chip hw-binding table generator to generate binding tables when the test emits SURFACE_STATES packets. The hw generates these binding table packets internally so we don't have to allocate space on the batchbuffer. Signed-off-by: Abdiel Janulgue --- lib/gen8_render.h |

[Intel-gfx] [PATCH 2/2] tests/gem_render_copy: Add option to test resource streamer

Add option in basic test for the render_copy to test and toggle hw-generated binding tables feature. Signed-off-by: Abdiel Janulgue --- tests/gem_render_copy.c |8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tests/gem_render_copy.c b/tests/gem_render_copy.c index

[Intel-gfx] igt tests/rendercopy: Add option to test resource streamer functionality

to verify if the resulting data is still correct. Abdiel Janulgue (2): rendercopy/bdw: Enable hw-generated binding tables tests/gem_render_copy: Add option to test resource streamer lib/gen8_render.h | 13 +++ lib/intel_batchbuffer.c | 12 ++ lib/intel_batchbuffer.h

[Intel-gfx] drm/i915/bdw: Enable resource streamer on Broadwell

From: Abdiel Janulgue This is a re-spin of my resource streamer patchset from October adapted to enable the feature on Broadwell instead. The resource streamer is a hw-feature that helps in reducing commands being submitted by the CPU. Haswell initially has this feature. Unfortunately, HSW

[Intel-gfx] [PATCH 2/2] drm/i915/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c |8 include/uapi/drm/i915_drm.h|7 ++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 1/2] drm/i915/bdw: Enable resource streamer bits on MI_BATCH_BUFFER_START

Adds support for executing the resource streamer on BDW Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/drm/i915/intel_ringbuffer.c |3 ++- drivers/gpu/drm/i915/intel_ringbuffer.h |1 + 3 files changed, 4 insertions(+), 1 deletion

Re: [Intel-gfx] [RFC] xf86-video-intel: enable hw-generated binding tables

Hi all! On Thursday, April 24, 2014 01:17:14 PM Ville Syrjälä wrote: > On Thu, Apr 24, 2014 at 11:25:15AM +0300, Abdiel Janulgue wrote: > > On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote: > > > On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote: > &

Re: [Intel-gfx] [RFC] xf86-video-intel: enable hw-generated binding tables

On Thursday, April 24, 2014 01:17:14 PM Ville Syrjälä wrote: > On Thu, Apr 24, 2014 at 11:25:15AM +0300, Abdiel Janulgue wrote: > > On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote: > > > On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote: > > > &

Re: [Intel-gfx] [RFC] xf86-video-intel: enable hw-generated binding tables

On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote: > On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote: > > Anyway I haven't tried the work-around where we explictly only disable the > > BT and RS on the other user-space clients (xorg driver in this ca

Re: [Intel-gfx] [RFC] xf86-video-intel: enable hw-generated binding tables

On Wednesday, April 23, 2014 08:50:21 PM Ville Syrjälä wrote: > On Wed, Apr 23, 2014 at 06:52:09PM +0200, Daniel Vetter wrote: > > On Wed, Apr 23, 2014 at 1:21 PM, Abdiel Janulgue > > > > wrote: > > > I've already tried disabling RS at the end of every batch so

Re: [Intel-gfx] [RFC] xf86-video-intel: enable hw-generated binding tables

On Tuesday, April 22, 2014 07:20:58 PM Daniel Vetter wrote: > On Tue, Apr 22, 2014 at 04:23:12PM +0100, Chris Wilson wrote: > > On Tue, Apr 22, 2014 at 06:16:34PM +0300, Abdiel Janulgue wrote: > > > This patch series enables resource streamer for xf86-video-intel UXA. > >

[Intel-gfx] [RFC] xf86-video-intel: enable hw-generated binding tables

8 + src/uxa/i965_render.c | 78 +++ src/uxa/intel.h |3 ++ src/uxa/intel_batchbuffer.c |7 ++-- src/uxa/intel_driver.c | 10 +- 8 files changed, 94 insertions(+), 19 deletions(-) Abdiel Janulgue (2): [PATCH 1/2] xf86-video-intel: A

[Intel-gfx] [RFC PATCH 1/2] xf86-video-intel: Add "ResourceStreamer" option

Signed-off-by: Abdiel Janulgue --- src/intel_options.c|1 + src/intel_options.h|1 + src/uxa/intel.h|3 +++ src/uxa/intel_driver.c | 10 +- 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/src/intel_options.c b/src/intel_options.c index 02a4ae1

[Intel-gfx] [RFC PATCH 2/2] xf86-video-intel: Enable hw-generated binding tables for UXA

Code is based on my hw-generated binding table code for Mesa adapted to i965_composite path in UXA. Signed-off-by: Abdiel Janulgue --- src/uxa/i965_3d.c |5 ++- src/uxa/i965_reg.h |8 + src/uxa/i965_render.c | 78

[Intel-gfx] [PATCH 2/2] drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START (v3)

v3: Use the I915_DISPATCH_RS flag to determine if batchbuffer needs resource streamer bit. Cc: Chris Wilson Cc: Daniel Vetter Cc: Ben Widawsky Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ++- 2 files

[Intel-gfx] [PATCH 1/2] drm/i915/hsw: Add I915_EXEC_RESOURCE_STREAMER flag (v3)

Ensures that the batch buffer is executed by the resource streamer. v3: - Make sure batch is only submitted on render ring and Haswell (Daniel) - Separate EXEC and DISPATCH flags (Chris) - Update __I915_EXEC_UNKNOWN_FLAGS (Kenneth) Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm

[Intel-gfx] [PATCH 2/2] drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START

Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/drm/i915/intel_ringbuffer.c |7 --- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c246727..f3c9103

[Intel-gfx] [PATCH 1/2] drm/i915/hsw: Add I915_EXEC_RESOURCE_STREAMER flag

Ensures that the batch buffer is executed by the resource streamer. Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 ++ include/uapi/drm/i915_drm.h|5 + 2 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] drm/i915/hsw: Enable resource streamer (v2)

v2 of drm-i915 part of resource streamer enabling. Re-submitted finally now that the Mesa portions are starting to take shape. I also addressed some of the comments from Daniel and Chris from the previous implementation. Cc: Daniel Vetter Cc: Chris Wilson Abdiel Janulgue (2): drm/i915

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Prevent loading of uninitialized context garbage

On Wednesday, August 21, 2013 11:12:36 PM Daniel Vetter wrote: > On Wed, Aug 21, 2013 at 06:31:07PM +0300, Ville Syrjälä wrote: > > On Wed, Aug 21, 2013 at 04:43:33PM +0300, Ville Syrjälä wrote: > > > On Thu, Aug 08, 2013 at 08:00:26PM +0100, Chris Wilson wrote: > > > > The extended state bits are

[Intel-gfx] [RFC libdrm PATCH] intel: Add support for resource streamer

Expose defines for resource streamer controls. Based on the work of: Lukasz Anaczkowski Signed-off-by: Abdiel Janulgue --- include/drm/i915_drm.h |1 + 1 file changed, 1 insertion(+) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index aa983f3..8ddda40 100644 --- a/include

[Intel-gfx] [PATCH 2/2] drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START

Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/drm/i915/intel_ringbuffer.c |6 -- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e9c50fa..3db1184

[Intel-gfx] [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags

Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 ++ include/uapi/drm/i915_drm.h|1 + 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 5aeb447

[Intel-gfx] RFC: drm/1915: Resource streamer initial support

Daniel Vetter suggested at some point we need to implement getparam ioctl so userspace can figure out whether kernel supports RS at runtime. For now, this will do to support the corresponding RFC mesa patches. Based on the work of: Lukasz Anaczkowski Abdiel Janulgue (2): drm/i915/hsw

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