The USB PHY used in the Allwinner H616 SoC inherits some traits from its
various predecessors: it has four full PHYs like the H3, needs some
extra bits to be set like the H6, and clears a different bit in the
PMU_UNK1 register like the A100.
Name all those properties in a new config struct and ass
The clocks itself are identical to the H6 R-CCU, it's just that the H616
has not all of them implemented (or connected).
Signed-off-by: Andre Przywara
---
drivers/clk/sunxi-ng/Kconfig | 2 +-
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 47 +-
drivers/clk/sunxi-ng/
Currently the AXP chip requires to have its IRQ line connected to some
interrupt controller, and will fail probing when this is not the case.
On a new Allwinner SoC (H616) there is no NMI pin anymore, so the
interrupt functionality of the AXP chip is simply not available.
Check whether the DT des
From: Yangtao Li
This patch adds support for A100 MMC controller, which use word address
for internal dma.
Signed-off-by: Yangtao Li
Signed-off-by: Andre Przywara
---
drivers/mmc/host/sunxi-mmc.c | 28 +---
1 file changed, 25 insertions(+), 3 deletions(-)
diff --git a
Add simple "allwinner,sun50i-h616-xxx" compatible names to existing
bindings, and pair them with an existing fallback compatible string,
as the devices are compatible.
This covers I2C, infrared, RTC and SPI.
Use enums to group all compatible devices together.
Signed-off-by: Andre Przywara
---
.
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml
b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml
ind
Newer SoCs (A100, H616) need to clear a different bit in our "unknown"
PMU PHY register.
Generalise the existing code by allowing configs to specify a bitmask
of bits to clear.
Signed-off-by: Andre Przywara
---
drivers/phy/allwinner/phy-sun4i-usb.c | 28 +++
1 file chang
Hi Miquel,
> "Miquel Raynal"
>
> Re: [PATCH 1/2] mtd: nand: ecc-bch: Fix the size of calc_buf/code_buf of
the BCH
>
> Hi YouChing,
>
> YouChing Lin wrote on Thu, 10 Dec 2020 11:22:08
> +0800:
>
(deleted)
> > The root cause is that the size of calc_buf/code_buf is limited to 64
> > bytes,
From: Yangtao Li
Add a binding for A100's watchdog controller.
Signed-off-by: Yangtao Li
Acked-by: Rob Herring
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/Documentation/devicetree/bin
This (relatively) new SoC is similar to the H6, but drops the (broken)
PCIe support and the USB 3.0 controller. It also gets the management
controller removed, which in turn removes *some*, but not all of the
devices formerly dedicated to the ARISC (CPUS).
There does not seem to be an extra interru
On 2020-12-10 2:38 p.m., Tyler Hicks wrote:
On 2020-12-09 11:42:06, Tushar Sugandhi wrote:
The original IMA buffer data measurement sizes were small (e.g. boot
command line), but the new buffer data measurement use cases have data
sizes that are a lot larger. Just as IMA measures the file da
From: Yangtao Li
Add binding for A100's and H616's mmc and emmc controller.
Signed-off-by: Yangtao Li
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/a
The H616 adds a second EMAC clock register. We don't know about the
exact SRAM properties yet, so this gets omitted for now.
Signed-off-by: Andre Przywara
---
.../bindings/sram/allwinner,sun4i-a10-system-control.yaml| 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devic
While the clocks are fairly similar to the H6, many differ in tiny
details, so a separate clock driver seems indicated.
Derived from the H6 clock driver, and adjusted according to the manual.
Signed-off-by: Andre Przywara
---
drivers/clk/sunxi-ng/Kconfig|5 +
drivers/clk/sun
From: "Paul E. McKenney"
This commit makes mem_dump_obj() call out NULL and zero-sized pointers
specially instead of classifying them as non-paged memory.
Cc: Christoph Lameter
Cc: Pekka Enberg
Cc: David Rientjes
Cc: Joonsoo Kim
Cc: Andrew Morton
Cc:
Reported-by: Andrii Nakryiko
Acked-by:
From: "Paul E. McKenney"
This commit adds vmalloc() support to mem_dump_obj(). Note that the
vmalloc_dump_obj() function combines the checking and dumping, in
contrast with the split between kmem_valid_obj() and kmem_dump_obj().
The reason for the difference is that the checking in the vmalloc()
From: "Paul E. McKenney"
This commit adds the starting address and number of pages to the vmalloc()
information dumped by way of vmalloc_dump_obj().
Cc: Andrew Morton
Cc: Joonsoo Kim
Cc:
Reported-by: Andrii Nakryiko
Suggested-by: Vlastimil Babka
Signed-off-by: Paul E. McKenney
---
mm/vmal
Hi,
this is the quite expanded second version of the support series for the
Allwinner H616 SoC.
Besides many fixes for the bugs discovered by the diligent reviewers
(many thanks for that!) this version adds some patches to support some
slightly changed devices, like the second EMAC and the AXP not
From: "Paul E. McKenney"
The debug-object double-free checks in __call_rcu() print out the
RCU callback function, which is usually sufficient to track down the
double free. However, all uses of things like queue_rcu_work() will
have the same RCU callback function (rcu_work_rcufn() in this case),
From: "Paul E. McKenney"
There are kernel facilities such as per-CPU reference counts that give
error messages in generic handlers or callbacks, whose messages are
unenlightening. In the case of per-CPU reference-count underflow, this
is not a problem when creating a new use of this facility bec
A new SoC, a new compatible string.
Also we were too miserly with just allowing seven interrupt banks.
Signed-off-by: Andre Przywara
---
.../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git
a/Documentation/devicetre
There are only two pins left now, used to connect to the PMIC via I2C.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
Reviewed-by: Jernej Skrabec
---
drivers/pinctrl/sunxi/Kconfig | 5 ++
drivers/pinctrl/sunxi/Makefile| 1 +
drivers/pinctrl/sunxi/pinctr
Port A is used for an internal connection to some analogue circuitry
which looks like an AC200 IP (as in the H6), though this is not
mentioned in the manual.
Signed-off-by: Andre Przywara
---
drivers/pinctrl/sunxi/Kconfig | 5 +
drivers/pinctrl/sunxi/Makefile | 1 +
While comparing clocks between the H6 and H616, some of the M factor
ranges were found to be wrong: the manual says they are only covering
two bits [1:0], but our code had "5" in the number-of-bits field.
By writing 0xff into that register in U-Boot and via FEL, it could be
confirmed that bits [4:
2020년 12월 11일 (금) 오전 3:37, Alexander Popov 님이 작성:
>
> Currently in CONFIG_SLAB init_on_free happens too late, and heap
> objects go to the heap quarantine not being erased.
>
> Lets move init_on_free clearing before calling kasan_slab_free().
> In that case heap quarantine will store erased objects
Hello!
This is v3 of the series the improves diagnostics by providing access
to additional information including the return addresses, slab names,
offsets, and sizes collected by the sl*b allocators and by vmalloc().
If the allocator is not configured to collect this information, the
diagnostics f
2020년 12월 11일 (금) 오전 1:00, Vlastimil Babka 님이 작성:
>
> The page allocator expects that page->mapping is NULL for a page being freed.
> SLAB and SLUB use the slab_cache field which is in union with mapping, but
> before freeing the page, the field is referenced with the "mapping" name when
> set to N
On 2020-12-10 2:14 p.m., Tyler Hicks wrote:
On 2020-12-09 11:42:05, Tushar Sugandhi wrote:
IMA functions such as ima_match_keyring(), process_buffer_measurement(),
ima_match_policy() etc. handle data specific to keyrings. Currently,
these constructs are not generic to handle any func specific
> On Dec 10, 2020, at 4:48 PM, Michael Roth wrote:
>
>> I think there are two reasonable ways to do this:
>>
>> 1. VMLOAD before STGI. This is obviously correct, and it's quite simple.
>
> For the testing I ended up putting it immediately after __svm_vcpu_run()
> since that's where we restored G
On 2020-12-11 02:03, Bean Huo wrote:
On Wed, 2020-12-09 at 05:35 -0800, Can Guo wrote:
ufshcd_hba_exit() is always called after ufshcd_exit_clk_scaling()
and
ufshcd_exit_clk_gating(), so move ufshcd_exit_clk_scaling/gating() to
ufshcd_hba_exit().
Signed-off-by: Can Guo
diff --git a/drivers/sc
On 2020-12-11 01:34, Bean Huo wrote:
Hi Can
On Wed, 2020-12-09 at 05:35 -0800, Can Guo wrote:
@@ -1160,6 +1166,7 @@ static void
ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
{
up_write(&hba->clk_scaling_lock);
ufshcd_scsi_unblock_requests(hba);
+ ufshcd_release(hb
AxiDMA driver exposed the dma_set_max_seg_size() to the DMAENGINE.
It shall helps the DMA clients to create size-optimized linked-list
for the controller.
However, there are certain situations where DMA client might not be
abled to benefit from the dma_get_max_seg_size() if the segment size
can't
Add support for DMA Scatter-Gather (SG) constraint so that DMA clients can
handle the AxiDMA limitation.
Without supporting DMA constraint the default Max segment size reported by
dmaengine is 64KB, which is not supported by Intel KeemBay AxiDMA.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia J
Add support for Intel KeemBay AxiDMA BYTE and HALFWORD registers
programming.
Intel KeemBay AxiDMA supports data transfer between device to memory
and memory to device operations.
This code is needed by I2C, I3C, I2S, SPI and UART which uses FIFO
size of 8bits and 16bits to perform memory to devi
Hi,
On Thu, Dec 10, 2020 at 4:51 PM Stephen Boyd wrote:
>
> Quoting Doug Anderson (2020-12-10 15:50:04)
> > Hi,
> >
> > On Thu, Dec 10, 2020 at 3:32 PM Stephen Boyd wrote:
> > >
> > > Quoting Doug Anderson (2020-12-10 15:07:39)
> > > > Hi,
> > > >
> > > > On Thu, Dec 10, 2020 at 2:58 PM Stephen
Add support for Intel KeemBay AxiDMA device handshake programming.
Device handshake number passed in to the AxiDMA shall be written to
the Intel KeemBay AxiDMA hardware handshake registers before DMA
operations are started.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
.../dma/dw
Add support for Intel KeemBay AxiDMA to the .compatible field.
The AxiDMA Apb region will be accessible if the compatible string
matches the "intel,kmb-axi-dma".
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8
1 file chan
Add support for DMA_RESIDUE_GRANULARITY_BURST so that AxiDMA can report
DMA residue.
Existing AxiDMA driver only support data transfer between
memory to memory operation, therefore reporting DMA residue
to the DMA clients is not supported.
Reporting DMA residue to the DMA clients is important as
Add support for Intel KeemBay DMA registers. These registers are required
to run data transfer between device to memory and memory to device on Intel
KeemBay SoC.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 14 ++
1 file chang
Add support for device_prep_dma_cyclic() callback function to benefit
DMA cyclic client, for example ALSA.
Existing AxiDMA driver only support data transfer between memory to memory.
Data transfer between device to memory and memory to device in cyclic mode
would failed if this interface is not su
Add support for Intel KeemBay AxiDMA to the dw-axi-dmac
Schemas DT binding.
Signed-off-by: Sia Jee Heng
---
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
b/Document
YAML schemas Device Tree (DT) binding is the new format for DT to replace
the old format. Introduce YAML schemas DT binding for dw-axi-dmac and
remove the old version.
Signed-off-by: Sia Jee Heng
---
.../bindings/dma/snps,dw-axi-dmac.txt | 39 --
.../bindings/dma/snps,dw-axi-dmac.ya
Add support for device_synchronize() callback function to sync with
dmaengine_terminate_sync().
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-
The below patch series are to support AxiDMA running on Intel KeemBay SoC.
The base driver is dw-axi-dmac. This driver only support DMA memory copy
transfers. Code refactoring is needed so that additional features can be
supported.
The features added in this patch series are:
- Replacing Linked Lis
Shortlog should use "KVM: x86: ...", and probably s/for/in. It currently reads
like the kernel is exposing the flag to KVM for KVM's supported CPUID, e.g.:
KVM: x86: Expose AVX512_FP16 in supported CPUID
On Mon, Dec 07, 2020, Kyung Min Park wrote:
> From: Cathy Zhang
>
> AVX512_FP16 is suppo
Add device_config() callback function so that the device address
can be passed to the dma driver.
DMA clients use this interface to pass in the device address to the
AxiDMA. Without this interface, data transfer between device to memory
and memory to device would failed.
Reviewed-by: Andy Shevche
Simplify and refactor the descriptor management by removing the redundant
Linked List Item (LLI) queue control logic from the AxiDMA driver.
The descriptor is split into virtual descriptor and hardware LLI so that
only hardware LLI memories are allocated from the DMA memory pool.
Up to 64 descript
Add device_prep_slave_sg() callback function so that DMA_MEM_TO_DEV
and DMA_DEV_TO_MEM operations in single mode can be supported.
Existing AxiDMA driver only support data transfer between
memory to memory. Data transfer between device to memory and
memory to device in single mode would failed if
The DMA memory block is created at driver load time and exist for
device lifetime. Move the dma_pool_create() to the ->chan_resource()
callback function allowing the DMA memory blocks to be created as needed
and destroyed when the channel is freed.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia
Add support for of_dma_controller_register() so that DMA clients
can pass in device handshake number to the AxiDMA driver.
DMA clients shall code the device handshake number in the Device tree.
When DMA activities are needed, DMA clients shall invoke OF helper
function to pass in the device handsh
Hi Linus,
Last week of fixes, just amdgpu and i915 collections. We had a i915
regression reported by HJ Lu reported this morning, and this contains
a fix for that he has tested.
There are a fair few other fixes, but they are spread across the two
drivers, and all fairly self contained.
I'm going
Enable serial driver to be built as a module. To do so, init the
console support on driver/module load instead of using
console_initcall().
Signed-off-by: Kevin Hilman
---
Yes, I'm well aware that having the serial console as a module makes
devices hard to debug, so I'm not changing any default
The pull request you sent on Thu, 10 Dec 2020 19:50:09 -0500:
> git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-ktest.git
> ktest-v5.10-rc6
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/33dc9614dc208291d0c4bcdeb5d30d481dcd2c4c
Thank you!
--
Deet-doot-d
Quoting Doug Anderson (2020-12-10 15:50:04)
> Hi,
>
> On Thu, Dec 10, 2020 at 3:32 PM Stephen Boyd wrote:
> >
> > Quoting Doug Anderson (2020-12-10 15:07:39)
> > > Hi,
> > >
> > > On Thu, Dec 10, 2020 at 2:58 PM Stephen Boyd wrote:
> > > > right? It will only ensure that other irq handlers have
Linus,
Fix issues with grub2bls in ktest.pl
ktest.pl does not know about grub2bls that was introduced in Fedora 30,
and now it does.
Please pull the latest ktest-v5.10-rc6 tree, which can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-ktest.git
ktest-v5.10-rc6
Tag
Hi Matti-san,
> From: Vaittinen, Matti, Sent: Thursday, December 10, 2020 8:56 PM
>
> Hi Yoshihiro san,
>
> On Thu, 2020-12-10 at 10:58 +, Yoshihiro Shimoda wrote:
> > Hi Matti,
> >
> > > From: Vaittinen, Matti, Sent: Thursday, December 10, 2020 5:28 PM
> > >
> > > On Tue, 2020-12-08 at 17:0
On Wed, Oct 28, 2020 at 02:08:01AM +0530, Sandeep Maheswaram wrote:
> Configure interrupts based on hs_phy_mode to avoid triggering of
> interrupts during system suspend and suspends successfully.
> Set genpd active wakeup flag for usb gdsc if wakeup capable devices
> are connected so that wake up
On Fri, Dec 11, 2020 at 01:15:15AM +0100, Frederic Weisbecker wrote:
> On Thu, Dec 10, 2020 at 01:17:56PM -0800, Paul E. McKenney wrote:
> > And please see attached. Lots of output, in fact, enough that it
> > was still dumping when the second instance happened.
>
> Thanks!
>
> So the issue is t
On Thu, 10 Dec 2020 15:09:46 -0800
Libo Chen wrote:
> Hi Steven,
>
>
> Just wanna check in and check on the status of it.
I have it applied in my local repo (even in my for-next, which I forgot
to push :-p)
I've been testing it on all my build machines along with my own patches.
Anyway, it'
Hi,
This series is the GPIO driver for Toshiba's ARM SoC, Visconti[0].
This provides DT binding documentation, device driver, MAINTAINER files, and
updates to DT files.
Best regards,
Nobuhiro
[0]:
https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-vi
On Thu, 2020-12-10 at 23:50 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月10日 週四 下午5:08寫道:
> >
> > This patch add RDMA fifo size error handle
> > rdma fifo size will not always bigger than the calculated threshold
> > if that case happened, we need set fifo size as the
Add the GPIO driver for Toshiba Visconti ARM SoCs.
Signed-off-by: Nobuhiro Iwamatsu
Reviewed-by: Punit Agrawal
---
drivers/gpio/Kconfig | 9 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-visconti.c | 230 ++
driver
Add entries for Toshiba Visconti GPIO Controller binding and driver.
Signed-off-by: Nobuhiro Iwamatsu
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 50fbbfffb921..8565272d95c4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2636,8 +2636,10 @@
Add bindings for the Toshiba Visconti GPIO Controller.
Signed-off-by: Nobuhiro Iwamatsu
Reviewed-by: Rob Herring
Reviewed-by: Punit Agrawal
---
.../bindings/gpio/toshiba,gpio-visconti.yaml | 85 +++
1 file changed, 85 insertions(+)
create mode 100644
Documentation/devicetree
Add the GPIO node in Toshiba Visconti5 SoC-specific DT file.
And enable the GPIO node in TMPV7708 RM main board's board-specific DT file.
Signed-off-by: Nobuhiro Iwamatsu
Reviewed-by: Punit Agrawal
---
.../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 4 +++
arch/arm64/boot/dts/toshiba/tmpv7708.
On Thu, 2020-12-10 at 23:40 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月10日 週四 下午5:22寫道:
> >
> > rdma fifo size may be different even in same SOC, add this
> > property to the corresponding rdma
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> > .../bindings/display/m
The pull request you sent on Fri, 11 Dec 2020 11:25:43 +1100:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-5.10-6
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/47003b9971cc7c38737f21e07034502ca35ab7af
Thank you!
--
Deet-doot-d
Signed-off-by: Stephen Zhang
---
arch/x86/kvm/vmx/vmx.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 47b8357..e1954df 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -4899,15 +4899,15 @@ static
On 12/10/20 5:10 PM, Andrew Delgadillo wrote:
On Thu, Dec 10, 2020 at 3:08 PM Nick Desaulniers
wrote:
On Thu, Dec 3, 2020 at 2:10 PM Andrew Delgadillo wrote:
lib.mk defaults to gcc when CC is not set. When building selftests
as part of a kernel compilation, MAKEFLAGS is cleared to allow imp
On 11/12/2020 01:23:57+0100, Thomas Gleixner wrote:
> Alexandre,
>
> On Fri, Dec 11 2020 at 00:59, Alexandre Belloni wrote:
> > On 06/12/2020 22:46:17+0100, Thomas Gleixner wrote:
> >>/* Drivers can revise this default after allocating the device. */
> >> - rtc->set_offset_nsec = NSEC_PER_SE
On Thu, Dec 10, 2020 at 03:18:45PM -0800, Nick Desaulniers wrote:
> On Fri, Dec 4, 2020 at 9:06 AM Arvind Sankar wrote:
> >
> > Why? Does this actually cause any problems?
> >
> > It seems like the options for gcc can actually be very straightforward:
> > you just need a cc-option check, and then
On Thu, Dec 10, 2020 at 10:48:10PM +0100, Thomas Gleixner wrote:
> On Thu, Dec 10 2020 at 12:26, Marcelo Tosatti wrote:
> > On Wed, Dec 09, 2020 at 09:58:23PM +0100, Thomas Gleixner wrote:
> >> Marcelo,
> >>
> >> On Wed, Dec 09 2020 at 13:34, Marcelo Tosatti wrote:
> >> > On Tue, Dec 08, 2020 at 1
Willem de Bruijn writes:
>> > If I understand correctly, you are trying to achieve a single delivery
>> > time.
>> > The need for two separate timestamps passed along is only because the
>> > kernel is unable to do the time base conversion.
>>
>> Yes, a correct point.
>>
>> >
>> > Else, ETF coul
On Wed, Oct 28, 2020 at 02:08:00AM +0530, Sandeep Maheswaram wrote:
> Adding suspend quirk function for dwc3 host which will be called
> during xhci suspend.
> Setting hs_phy_mode, ss_phy_mode flags and phy mode during host suspend.
>
> Signed-off-by: Sandeep Maheswaram
> ---
> drivers/usb/dwc3/
On Mon 23 Nov 04:46 CST 2020, Robert Foss wrote:
> 4k requires two dsi pipes, so don't report MODE_OK when only a
> single pipe is configured. But rather report MODE_PANEL to
> signal that requirements of the panel are not being met.
>
> Reported-by: Peter Collingbourne
> Suggested-by: Peter Col
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Linus,
Please pull one final powerpc fix for 5.10:
The following changes since commit a1ee28117077c3bf24e5ab6324c835eaab629c45:
powerpc/64s/powernv: Fix memory corruption when saving SLB entries on MCE
(2020-12-02 23:16:40 +1100)
are availa
Alexandre,
On Fri, Dec 11 2020 at 00:59, Alexandre Belloni wrote:
> On 06/12/2020 22:46:17+0100, Thomas Gleixner wrote:
>> /* Drivers can revise this default after allocating the device. */
>> -rtc->set_offset_nsec = NSEC_PER_SEC / 2;
>> +rtc->set_offset_nsec = 10 * NSEC_PER_MSEC;
>
On Thu, Dec 10, 2020 at 10:44:54AM +, John Garry wrote:
> Hi Ming,
>
> On 10/12/2020 02:07, Ming Lei wrote:
> > > Apart from this, my concern is that we come with for a solution, but it's
> > > a
> > > complicated solution and may not be accepted as this issue is not seen as
> > > a
> > > pr
Hi, Shuah,
> This patch set has several miscellaneous fixes to resctrl selftest tool that
> are
> easily visible to user. V1 had fixes to CAT test and CMT test but they were
> dropped in V2 because having them here made the patchset humongous. So,
> changes to CAT test and CMT test will be posted
On Thu, Dec 10, 2020 at 03:00:30PM -0800, Nick Desaulniers wrote:
> On Thu, Dec 3, 2020 at 2:34 PM Arnd Bergmann wrote:
> >
> > From: Arnd Bergmann
> >
> > clang produces a build failure in configurations without COMMON_CLK
> > when a timeout calculation goes wrong:
> >
> > arm-linux-gnueabi-ld:
On 12/6/20 10:11 AM, kernel test robot wrote:
> Hi Geert,
>
> First bad commit (maybe != root cause):
>
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: 7059c2c00a2196865c2139083cbef47cd18109b6
> commit: ea00d95200d02ece71f5814d41b14f2eb16d598b ASoC
Hi,
Thanks for your review.
On Thu, Dec 03, 2020 at 07:03:27PM +0900, Punit Agrawal wrote:
> Hi Iwamatsu-san,
>
> A couple of very minor comments below -
>
> Nobuhiro Iwamatsu writes:
>
> > Add the GPIO driver for Toshiba Visconti ARM SoCs.
> >
> > Signed-off-by: Nobuhiro Iwamatsu
> > ---
>
On Thu, Dec 10, 2020 at 01:17:56PM -0800, Paul E. McKenney wrote:
> And please see attached. Lots of output, in fact, enough that it
> was still dumping when the second instance happened.
Thanks!
So the issue is that ksoftirqd is parked on CPU down with vectors
still pending. Either:
1) Ksoftir
> On Dec 5, 2020, at 7:59 PM, Nicholas Piggin wrote:
>
> I'm still going to persue shoot-lazies for the merge window. As you
> see it's about a dozen lines and a if (IS_ENABLED(... in core code.
> Your change is common code, but a significant complexity (which
> affects all archs) so needs a lot
On Thu, Dec 10, 2020 at 3:08 PM Nick Desaulniers
wrote:
>
> On Thu, Dec 3, 2020 at 2:10 PM Andrew Delgadillo wrote:
> >
> > lib.mk defaults to gcc when CC is not set. When building selftests
> > as part of a kernel compilation, MAKEFLAGS is cleared to allow implicit
> > build rules to be used. Th
On Thu, Dec 10 2020 at 18:20, boris ostrovsky wrote:
> On 12/10/20 2:26 PM, Thomas Gleixner wrote:
>> All event channel setups bind the interrupt on CPU0 or the target CPU for
>> percpu interrupts and overwrite the affinity mask with the corresponding
>> cpumask. That does not make sense.
>>
>> The
On Thu, Dec 10, 2020 at 03:26:11PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.248 release.
> There are 39 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know
On Thu, Dec 10 2020 at 18:19, boris ostrovsky wrote:
> On 12/10/20 2:26 PM, Thomas Gleixner wrote:
>> -EXPORT_SYMBOL_GPL(bind_evtchn_to_irq_lateeoi);
>
> include/xen/events.h also needs to be updated (and in the next patch for
> xen_set_affinity_evtchn() as well).
Darn, I lost that.
On Thu, Dec 10 2020 at 15:19, Andy Lutomirski wrote:
>> On Dec 10, 2020, at 2:28 PM, Thomas Gleixner wrote:
>> Can we please focus on real problems instead of making up new ones?
>>
>> Correctness of time is a real problem despite the believe of virt folks
>> that it can be ignored or duct taped
On Sat, Nov 28, 2020 at 08:01:31AM +0530, mgau...@codeaurora.org wrote:
> Hi,
>
>
> On 2020-10-28 02:07, Sandeep Maheswaram wrote:
> > Avoiding phy powerdown in host mode so that it can be woken up by
> > devices.
> > Added hs_phy_mode flag to check connection status and set phy mode
> > and conf
On Thu, Dec 10, 2020 at 11:10:27AM -0800, Badhri Jagan Sridharan wrote:
> Hi Guenter,
>
> While I agree with what you are saying, since the logbuffer does not
> have the intelligence to drop older entries where no issues were seen,
> logbuffer gets full pretty quickly with good instances and there
Hi,
On 06/12/2020 22:46:17+0100, Thomas Gleixner wrote:
> The offset which is used to steer the start of an RTC synchronization
> update via rtc_set_ntp_time() is huge. The math behind this is:
>
> tsched twrite(t2.tv_sec - 1) t2 (seconds increment)
>
> twrite - tsched is the transport
We need to make sure we are not stomping on the control URB that was
issued when opening the device when attempting to toggle buzzer.
To do that we need to mark it as pending in cm109_open().
Reported-and-tested-by: syzbot+150f793ac5bc18eee...@syzkaller.appspotmail.com
Signed-off-by: Dmitry Torokh
-20201209
x86_64 randconfig-a013-20201209
x86_64 randconfig-a014-20201209
x86_64 randconfig-a015-20201209
x86_64 randconfig-a011-20201209
x86_64 randconfig-a016-20201210
x86_64 randconfig-a012-20201210
x86_64
Hi,
On Thu, Dec 10, 2020 at 3:32 PM Stephen Boyd wrote:
>
> Quoting Doug Anderson (2020-12-10 15:07:39)
> > Hi,
> >
> > On Thu, Dec 10, 2020 at 2:58 PM Stephen Boyd wrote:
> > > right? It will only ensure that other irq handlers have completed, which
> > > may be a problem, but not the only one.
> On Dec 10, 2020, at 1:27 PM, Michael Roth wrote:
>
> Quoting Andy Lutomirski (2020-12-10 13:23:19)
>>> On Thu, Dec 10, 2020 at 9:52 AM Michael Roth wrote:
>>> MSR_STAR, MSR_LSTAR, MSR_CSTAR,
>>> MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE,
>>> MSR_IA32_SYSENTER_CS,
>>> MSR_IA32_SYSENTER_ESP,
>>>
On Thu, 10 Dec 2020, Alexander Popov wrote:
> Currently in CONFIG_SLAB init_on_free happens too late, and heap
> objects go to the heap quarantine not being erased.
>
> Lets move init_on_free clearing before calling kasan_slab_free().
> In that case heap quarantine will store erased objects, simi
On Thu, 10 Dec 2020, Vlastimil Babka wrote:
> The page allocator expects that page->mapping is NULL for a page being freed.
> SLAB and SLUB use the slab_cache field which is in union with mapping, but
> before freeing the page, the field is referenced with the "mapping" name when
> set to NULL.
>
On Thu, Dec 10, 2020 at 03:26:25PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.9.14 release.
> There are 75 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
Hi Jan, Amir,
There's something wrong with linux-next commit ca7fbf0d29ab
("fsnotify: fix events reported to watching parent and child").
If I revert that commit, no problem;
but here's a one-line script "tailed":
for i in 1 2 3 4 5; do date; sleep 1; done &
Then if I run that (same result doin
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