xhci.c). Then, after xhci reset complete in xhci driver,
PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time,
no glitch happen and normal enumeration process has no impact.
Signed-off-by: Ran Wang
---
Changes in v3:
- Add macro PORT_REGS_SIZE to replace 0x10
- Change in
xhci.c).
Signed-off-by: Ran Wang
Reviewed-by: Rob Herring
---
Changes in v3:
- None
Changes in v2:
- Correct typos
- Shorten the name to snps,host-vbus-glitches
Documentation/devicetree/bindings/usb/dwc3.txt |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a
Hi Sirs,
Could anyone please comment this patch set or tell me if I have missed
maintainer in mail list? I'd like to let review process move forward.
Thank you.
Regards,
Ran
On Monday, May 20, 2019 17:53 Ran Wang wrote:
>
> Some user might want to go through all regist
Hi Felipe,
On Thursday, May 30, 2019 17:09, Ran Wang wrote:
>
>
> > >> >> > /* Global Debug Queue/FIFO Space Available Register */
> > >> >> > #define DWC3_GDBGFIFOSPACE_NUM(n) ((n) & 0x1f)
> > >> >> > #define DWC
Hi Felipe,
On Tuesday, May 28, 2019 18:20, Felipe Balbi wrote:
>
> >> >> > /* Global Debug Queue/FIFO Space Available Register */
> >> >> > #define DWC3_GDBGFIFOSPACE_NUM(n)((n) & 0x1f)
> >> >> > #define DWC3_GDBGFIFOSPACE_TYPE(n) (((n) << 5) & 0x1e0)
> >> >> > @@ -859,6 +867,7 @@ struc
Hi Felipe,
On Wednesday, May 29, 2019 18:25, Felipe Balbi wrote:
>
> Hi,
>
> Ran Wang writes:
> >> >> >> c) WHAT does this mean for PCI devices?
> >
> > According to DWC3 data book, I think this (PCI) mean to the case of 'master
> bus type
HI Felipe,
On Tuesday, May 28, 2019 18:20, Felipe Balbi wrote:
>
> Hi,
>
> Ran Wang writes:
>
> > Hi Felipe,
> >
> > Sorry for the late reply:
> >
> > On Wednesday, November 15, 2017 18:23, Felipe Balbi wrote:
>
> that's 1
Hi Felipe,
Sorry for the late reply:
On Wednesday, November 15, 2017 18:23, Felipe Balbi wrote:
>
> Hi,
>
> Ran Wang writes:
> >> Ran Wang writes:
> >> > Add support for USB3 snooping by asserting bits in register
> >> > DWC3_GSBUSCFG0 for da
Hi Shawn,
On Thursday, May 23, 2019 15:43, Shawn Guo wrote:
>
> On Wed, May 15, 2019 at 02:04:34PM +0800, Ran Wang wrote:
> > Enable USB3 HW LPM feature for lx2160a and active patch for snps
> > erratum A-010131. It will disable U1/U2 temperary when initiate U3
> > reques
owerpc SoC.
Signed-off-by: Ran Wang
---
Change in v4:
- Adjust indectation of 'ls1021a, ls1012a, ls1043a, ls1046a'.
Change in v3:
- None.
Change in v2:
- None.
Documentation/devicetree/bindings/soc/fsl/rcpm.txt |8 +++-
1 files changed, 7 insert
igned-off-by: Ran Wang
Acked-by: Pavel Machek
---
Change in v4:
- Remove extra ',' in author line of rcpm.c
- Update usage of wakeup_source_get_next() to be less confusing to the
reader, code logic remain the same.
Change in v3:
- Some whitespace ajdu
he is interested in.
Signed-off-by: Ran Wang
---
Change in v4:
- None.
Change in v3:
- Adjust indentation of *attached_dev;.
Change in v2:
- None.
drivers/base/power/wakeup.c | 18 ++
include/linux/pm_wakeup.h |3 +++
2 files changed, 21 insertions(
Hi Pavel,
On Monday, May 20, 2019 17:08 Pavel Machek wrote:
> > > Hi!
> > >
> > > > > > +static int rcpm_pm_prepare(struct device *dev) {
> > > > > > + struct device_node *np = dev->of_node;
> > > > > > + struct wakeup_source *ws;
> > > > > > + struct rcpm *rcpm;
> > > > > > + u32 value[RC
Hi Pavel,
On Monday, May 20, 2019 16:57, Pavel Machek wrote:
>
> Hi!
>
> > > > +static int rcpm_pm_prepare(struct device *dev) {
> > > > + struct device_node *np = dev->of_node;
> > > > + struct wakeup_source *ws;
> > > > + struct rcpm *rcpm;
> > > > + u32 value[RCPM_WAKE
eup source control.
> >
> > This driver depends on PM wakeup source framework which help to
> > collect wake information.
> >
> > Signed-off-by: Ran Wang
>
> > +// Copyright 2019 NXP
> > +//
> > +// Author: Ran Wang ,
>
> extra ,
OK, wil
he is interested in.
Signed-off-by: Ran Wang
---
Change in v3:
- Adjust indentation of *attached_dev;.
Change in v2:
- None.
drivers/base/power/wakeup.c | 18 ++
include/linux/pm_wakeup.h |3 +++
2 files changed, 21 insertions(+), 0 deletions(-)
diff --
owerpc SoC.
Signed-off-by: Ran Wang
---
Change in v3:
- None.
Change in v2:
- None.
Documentation/devicetree/bindings/soc/fsl/rcpm.txt |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Doc
igned-off-by: Ran Wang
---
Change in v3:
- Some whitespace ajdustment.
Change in v2:
- Rebase Kconfig and Makefile update to latest mainline.
drivers/soc/fsl/Kconfig |8 +++
drivers/soc/fsl/Makefile |1 +
drivers/soc/fsl/rcpm.c |
Hi Pavel,
On Monday, May 20, 2019 05:39, Pavel Machek wrote:
>
> Hi!
>
>
> > +
> > +struct rcpm {
> > + unsigned int wakeup_cells;
> > + void __iomem *ippdexpcr_base;
> > + boollittle_endian;
> > +};
>
> Inconsistent whitespace
OK, will make them aligned.
>
> > +static int rcpm_pm
Hi Pavel,
On Monday, May 20, 2019 05:35, Pavel Machek wrote:
>
> > --- a/include/linux/pm_wakeup.h
>
> > @@ -70,6 +71,7 @@ struct wakeup_source {
> > unsigned long wakeup_count;
> > boolactive:1;
> > boolautosleep_enabled:1;
> > + s
This patch adds USB dt nodes for LS1028A.
Signed-off-by: Ran Wang
---
Changes in v4:
- Move nodes to follow rule of unit-address in the address.
- Use macro to replace 'interrupts' values.
Changes in v3:
- Add space between label and node name.
- Add spcae with prop
Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch
owerpc SoC.
Signed-off-by: Ran Wang
---
Change in v2:
- None.
Documentation/devicetree/bindings/soc/fsl/rcpm.txt |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Documentation/devicetree/bindings/soc/fs
igned-off-by: Ran Wang
---
Change in v2:
- Rebase Kconfig and Makefile update to latest mainline.
drivers/soc/fsl/Kconfig |8 +++
drivers/soc/fsl/Makefile |1 +
drivers/soc/fsl/rcpm.c | 124 ++
3 files changed, 133 insertions(
he is interested in.
Signed-off-by: Ran Wang
---
Change in v2:
- None.
drivers/base/power/wakeup.c | 18 ++
include/linux/pm_wakeup.h |3 +++
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c
owerpc SoC.
Signed-off-by: Ran Wang
---
Documentation/devicetree/bindings/soc/fsl/rcpm.txt |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index e284e4e..0581
igned-off-by: Ran Wang
---
drivers/soc/fsl/Kconfig |8 +++
drivers/soc/fsl/Makefile |1 +
drivers/soc/fsl/rcpm.c | 124 ++
3 files changed, 133 insertions(+), 0 deletions(-)
create mode 100644 drivers/soc/fsl/rcpm.c
diff --git a/drivers/so
he is interested in.
Signed-off-by: Ran Wang
---
drivers/base/power/wakeup.c | 18 ++
include/linux/pm_wakeup.h |3 +++
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c
index 5fa1898..8d75795 100644
Enable USB3 HW LPM feature for lx2160a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.
Signed-off-by: Ran Wang
---
Depend on: https://lore.kernel.org/patchwork/patch/870134/
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |4
1
This patch adds USB dt nodes for LS1028A.
Signed-off-by: Ran Wang
---
Changes in v3:
- Add space between label and node name.
- Add spcae with properties and '='.
- Add SoC specific compatible.
Changes in v2:
- Rename node from usb3@... to usb@... to meet DTSpec
arch/arm6
Hi Rob,
On Wednesday, May 08, 2019 00:40, Rob Herring wrote:
>
> On Tue, May 7, 2019 at 3:48 AM Ran Wang wrote:
> >
> > Hi Rob,
> >
> > On Thursday, May 02, 2019 07:54 Rob Herring wrote:
> > >
> > > On Fri, Apr 26, 2019 at 05:54:26AM +, Ran
Hi Rob,
On Thursday, May 02, 2019 07:54 Rob Herring wrote:
>
> On Fri, Apr 26, 2019 at 05:54:26AM +0000, Ran Wang wrote:
> > This patch adds USB dt nodes for LS1028A.
> >
> > Signed-off-by: Ran Wang
> > ---
> > Changes in v2:
> > - Rename no
d-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index b045812..bf7f845 100644
--- a/arch/
This patch adds USB dt nodes for LS1028A.
Signed-off-by: Ran Wang
---
Changes in v2:
- Rename node from usb3@... to usb@... to meet DTSpec
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm64
lx2160a supports pw20 which could help save more power during cpu is
dile. It needs system firmware support via PSCI.
Signed-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 25
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch
This patch adds USB dt nodes for LS1028A.
Signed-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch/arm64/boot/dts/freescale/fsl
Hi Rob,
> -Original Message-
> From: Rob Herring
> Sent: Wednesday, February 27, 2019 00:40
> To: Ran Wang
> Cc: Greg Kroah-Hartman ; Yang Li
> ; linux-...@vger.kernel.org; devicet...@vger.kernel.org;
> linux-kernel@vger.kernel.org; Ran Wang
> Subject: Re: [PATC
xhci.c). Then, after xhci reset complete in xhci driver,
PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time,
no glitch happen and normal enumeration process has no impact.
Signed-off-by: Ran Wang
---
Changes in v3:
- Add macro PORT_REGS_SIZE to replace 0x10
- Change in
xhci.c).
Signed-off-by: Ran Wang
---
Changes in v3:
- None
Changes in v2:
- Correct typos
- Shorten the name to snps,host-vbus-glitches
Documentation/devicetree/bindings/usb/dwc3.txt |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree
Hi Leo,
> -Original Message-
> From: Yang Li
> Sent: Tuesday, February 26, 2019 05:29
> To: Ran Wang
> Cc: Greg Kroah-Hartman ; Rob Herring
> ; Mark Rutland ; Felipe Balbi
> ; linux-...@vger.kernel.org; devicet...@vger.kernel.org;
> linux-kernel@vger.kernel.org
xhci.c).
Signed-off-by: Ran Wang
---
Changes in v2:
- Correct typos
- Shorten the name to snps,host-vbus-glitches
Documentation/devicetree/bindings/usb/dwc3.txt |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
b
xhci.c). Then, after xhci reset complete in xhci driver,
PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time,
no glitch happen and normal enumeration process has no impact.
Signed-off-by: Ran Wang
---
Changes in v2:
- Rename related property to 'snps,host-vbu
Hi Felipe,
Sorry for the late response, I didn't receive your mail.
Felipe Balbi wrotes:
>Hi,
>
>Ran Wang writes:
>> +static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
>> +{
>> +int i, port_num;
>> +u32 reg, op_r
Hi Rob,
On January 22, 2019 09:03, Rob Herring wrote:
>
> On Wed, Jan 16, 2019 at 06:48:06AM +0000, Ran Wang wrote:
> > When DWC3 is set to host mode by programming register DWC3_GCTL,
> VUBS
>
> s/VUBS/VBUS/
Yes, will fix it in next version.
> > (or its control
Hi Alan,
On January 18, 2019 00:08, Alan Stern wrote:
>
> On Thu, 17 Jan 2019, Ran Wang wrote:
>
> > arm/arm64's io.h doesn't define clrbits32() and clrsetbits_be32(),
> > which causing compile failure on some Layerscape Platforms (such as
> > LS1021A and L
Signed-off-by: Ran Wang
---
Changes in v2:
- Recover writel() calling in code of handling pdata->has_fsl_erratum_a007792
- Remove unnecessary parens
- Move this patch to be first one to avoid breaking the build on ARM.
drivers/usb/host/ehci-fsl.c | 62
CONFIG_USB_EHCI_FSL is not dependent on FSL_SOC, it can be built on
non-PPC platforms.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Ran Wang
---
Changes in v2:
- remove 'depends on USB_EHCI_HCD'
- Move this patch to be second one to avoid breaking the build on ARM.
drivers/usb/ho
Badola
Signed-off-by: Yinbo Zhu
Signed-off-by: Ran Wang
---
Changes in v2:
- Correct signed-off name.
- Use tabs rather than spaces to make code aligned.
drivers/usb/host/ehci-fsl.c |7 +--
drivers/usb/host/fsl-mph-dr-of.c |6 ++
include/linux/fsl_devices.h |7
Hi Greg,
On 08, 2019 23:45, Greg Kroah-Hartman wrote:
>
> On Tue, Jan 08, 2019 at 06:04:26AM +0000, Ran Wang wrote:
> > arm/arm64's io.h doesn't define clrbits32() and clrsetbits_be32(),
> > which causing compile failure on some Layerscape Platforms (such as
> &
Hi,
On 16, 2019 14:48 Ran Wang wrote:
>
It seems the preface patch (0/2) failed to be accepted by patchwork (could
anyone tell me how to generate it properly with some sommand?),
I paste its content here for your reference :
This to fix USB enumeration compatibility issue found on DWC3 (h
xhci.c).
Signed-off-by: Ran Wang
---
Documentation/devicetree/bindings/usb/dwc3.txt |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
b/Documentation/devicetree/bindings/usb/dwc3.txt
index 8e5265e..dadb530 100644
--- a
xhci.c). Then, after xhci reset complete in xhci driver,
PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time,
no glitch happen and normal enumeration process has no impact.
Signed-off-by: Ran Wang
---
drivers/usb/dwc3/core.c |
not good from perspective of SW stack, but it seems
to be the only place to fix this real existing problem (test result show
that doing this in xhci-plat.c or xhci.c would not hlep on this kind of
failure). If who have better idea, please let me know, thanks in advanced.
Ran Wang (2):
dt-bindings
Hi Alan,
On Thursday, January 10, 2019, Alan wrote:
>
> On Thu, 10 Jan 2019, Ran Wang wrote:
>
> > Hi Alan,
> >
> > > -Original Message-
> > > From: Alan Stern
> > > Sent: Wednesday, January 09, 2019 23:14
> > > To
Hi Alan,
> -Original Message-
> From: Alan Stern
> Sent: Wednesday, January 09, 2019 23:14
> To: Ran Wang
> Cc: Greg Kroah-Hartman ; linux-
> u...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: RE: [PATCH 2/3] usb: ehci: fsl: Update register accessing for
Hi Alan,
> -Original Message-
> From: Alan Stern
> Sent: Wednesday, January 09, 2019 00:22
> To: Ran Wang
> Cc: Greg Kroah-Hartman ; linux-
> u...@vger.kernel.org; linux-kernel@vger.kernel.org; Yinbo Zhu
>
> Subject: Re: [PATCH 3/3] drivers: usb :fsl: Remove
Hi Alan,
> -Original Message-
> From: Alan Stern
> Sent: Wednesday, January 09, 2019 00:20
> To: Ran Wang
> Cc: Greg Kroah-Hartman ; linux-
> u...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 2/3] usb: ehci: fsl: Update register accessing for
Hi Alan,
> -Original Message-
> From: Alan Stern
> Sent: Wednesday, January 09, 2019 00:12
> To: Ran Wang
> Cc: Greg Kroah-Hartman ; linux-
> u...@vger.kernel.org; linux-kernel@vger.kernel.org; Rajesh Bhagat
>
> Subject: Re: [PATCH 1/3] usb: kconfig: remove dep
Hi Greg,
> -Original Message-
> From: Greg Kroah-Hartman
> Sent: Tuesday, January 08, 2019 23:45
> To: Ran Wang
> Cc: Alan Stern ; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; Yinbo Zhu
> Subject: Re: [PATCH 3/3] drivers: usb :fsl: Remove USB Errata
Signed-off-by: Ran Wang
---
drivers/usb/host/ehci-fsl.c | 64 ---
1 files changed, 42 insertions(+), 22 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 0a9fd20..59ebe1b 100644
--- a/drivers/usb/host/ehci-fsl.c
+++
-off-by: Ran Wang
---
drivers/usb/host/ehci-fsl.c |7 +--
drivers/usb/host/fsl-mph-dr-of.c |6 ++
include/linux/fsl_devices.h |7 ---
3 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index
From: Rajesh Bhagat
CONFIG_USB_EHCI_FSL is not dependent on FSL_SOC, it can be built on
non-PPC platforms.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Ran Wang
---
drivers/usb/host/Kconfig |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/Kconfig b
Add this property to all layerscape platforms to improve USB read write
performance.
Signed-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi |1 +
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |3 +++
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |3 +++
arch
Add this property to improve USB read write performance.
Signed-off-by: Ran Wang
---
arch/arm/boot/dts/ls1021a.dtsi |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index bdd6e66..f788a89 100644
--- a/arch
Hi Felipe & Mathias,
It seems that my below reply mail failed to be shown on lkml.org.
So I have to resend it. Like to have your comment/suggestion before I begin
the
solution implement work. Thanks
Ran Wang wrote:
>
> Hello Felipe,
>
> Felipe Balbi wrote:
> >
&
off-by: Zhao Chenhui
Signed-off-by: Wang Dongsheng
Signed-off-by: Tang Yuantian
Signed-off-by: Xie Xiaobo
Signed-off-by: Zhao Qiang
Signed-off-by: Shengzhou Liu
Signed-off-by: Ran Wang
---
Changes in v2:
- Resolve warnning of scripts/checkpatch.pl
arch/powerpc/include/asm/cacheflush.h
Enable Power Management feature on device tree, including MPC8536,
MPC8544, MPC8548, MPC8572, P1010, P1020, P1021, P1022, P2020, P2041,
P3041, T104X, T1024.
Signed-off-by: Zhao Chenhui
Signed-off-by: Ran Wang
---
Changes in v2:
- no change
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
From: Li Yang
Signed-off-by: Li Yang
Signed-off-by: Zhao Chenhui
Signed-off-by: Ran Wang
---
Changes in v2:
- new file
.../devicetree/bindings/powerpc/fsl/pmc.txt| 59 +++
1 files changed, 34 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree
caches in the current cpu.
Signed-off-by: Chenhui Zhao
Reviewed-by: Yang Li
Reviewed-by: Jose Rivera
Signed-off-by: Ran Wang
---
Changes in v2:
- no change
arch/powerpc/include/asm/cputable.h | 12
arch/powerpc/kernel/asm-offsets.c |3 +
arch/powerpc/kernel
.
This patch configure the EPU FSM preparing for deep sleep.
Signed-off-by: Hongbo Zhang
Signed-off-by: Chenhui Zhao
Signed-off-by: Ran Wang
---
Changes in v2:
- Resolve warnning of scripts/checkpatch.pl
drivers/soc/fsl/Kconfig |7 +
drivers/soc/fsl/Makefile|1 +
drivers/soc
Also, unselect FSL_PMC which is for older platfroms instead.
Signed-off-by: Ran Wang
---
Changes in v2:
- no change
arch/powerpc/Kconfig |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 73ce5dd..ed60c83 100644
--- a
caches in the current cpu.
Signed-off-by: Chenhui Zhao
Reviewed-by: Yang Li
Reviewed-by: Jose Rivera
Signed-off-by: Ran Wang
---
arch/powerpc/include/asm/cputable.h | 12
arch/powerpc/kernel/asm-offsets.c |3 +
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 81
Also, unselect FSL_PMC which is for older platfroms instead.
Signed-off-by: Ran Wang
---
arch/powerpc/Kconfig |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 73ce5dd..ed60c83 100644
--- a/arch/powerpc/Kconfig
+++ b
off-by: Zhao Chenhui
Signed-off-by: Wang Dongsheng
Signed-off-by: Tang Yuantian
Signed-off-by: Xie Xiaobo
Signed-off-by: Zhao Qiang
Signed-off-by: Shengzhou Liu
Signed-off-by: Ran Wang
---
arch/powerpc/include/asm/cacheflush.h |7 +
arch/powerpc/include/asm/fsl_pm.h
Enable Power Management feature on device tree, including MPC8536,
MPC8544, MPC8548, MPC8572, P1010, P1020, P1021, P1022, P2020, P2041,
P3041, T104X, T1024.
Signed-off-by: Zhao Chenhui
Signed-off-by: Ran Wang
---
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 14 ++-
arch/powerpc/boot
.
This patch configure the EPU FSM preparing for deep sleep.
Signed-off-by: Hongbo Zhang
Signed-off-by: Chenhui Zhao
Signed-off-by: Ran Wang
---
drivers/soc/fsl/Kconfig |7 +
drivers/soc/fsl/Makefile|1 +
drivers/soc/fsl/sleep_fsm.c | 279
Signed-off-by: Ran Wang
---
Changes in v5:
- no change
Changes in v4:
- Modify the codes according to the definition of this property.
Changes in v3:
- add new property for INCR burst in usb node to reset GSBUSCFG0.
Changes in v2:
- split patch
- create one new function to handle soc bus
e enabling undefined length INCR burst type and INCR16 burst type,
get better write performance on NXP Layerscape platforms:
around 3% improvement (from 364MB/s to 375MB/s).
Signed-off-by: Changming Huang
Signed-off-by: Ran Wang
---
Changes in v5:
- add support for ls1021a, ls1012a, ls1046a, ls1088
From: Changming Huang
Add the macro definition for global soc bus configuration register 0/1
Signed-off-by: Changming Huang
Signed-off-by: Ran Wang
---
Changes in v5:
- no change
Changes in v4:
- no change
Changes in v3:
- no change
Changes in v2:
- split the patch
- add more macro
Hi Shawn,
> -Original Message-
> From: Shawn Guo [mailto:shawn...@kernel.org]
> Sent: Saturday, February 24, 2018 3:13 PM
> To: Ran Wang
> Cc: Mark Rutland ; devicet...@vger.kernel.org; Andy
> Tang ; Catalin Marinas ; Will
> Deacon ; linux-kernel@vger.kernel.org; L
From: Yuantian Tang
Signed-off-by: Tang Yuantian
---
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 8
From: Yuantian Tang
According to PSCI standard v0.2, for CPU_SUSPEND call, which is
used by cpu idle framework, bit[16] of state parameter must be 0.
So update bit[16] of property 'arm,psci-suspend-param', which is
used as state parameter, to 0.
Signed-off-by: Tang Yuantian
---
arch/arm64/boot
From: Yuantian Tang
Signed-off-by: Tang Yuantian
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
inde
Enable USB3 HW LPM feature for ls1046a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.
Signed-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a
27;FF.
3. After U3 entry, re-enable the U2 timer by programming PORTPMSC
with the value saved in Step 1.
Signed-off-by: Ran Wang
---
drivers/usb/host/xhci-hub.c | 22 ++
drivers/usb/host/xhci-plat.c |6 +-
drivers/usb/host/xhci.h |1 +
3 files changed, 28 in
Enable USB3 HW LPM feature for ls1043a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.
Signed-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a
Enable USB3 HW LPM feature for ls1021a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.
Signed-off-by: Ran Wang
---
arch/arm/boot/dts/ls1021a.dtsi |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts
Hi Balbi,
> -Original Message-
> From: Felipe Balbi [mailto:ba...@kernel.org]
> Sent: Wednesday, November 15, 2017 4:52 PM
> To: Ran Wang
> Cc: Greg Kroah-Hartman ; open
> list:DESIGNWARE USB3 DRD IP DRIVER ; open
> list ; Jerry Huang ;
> Rajesh Bhagat ; Leo Li ;
Add support for USB3 snooping by asserting bits
in register DWC3_GSBUSCFG0 for data and descriptor.
Signed-off-by: Changming Huang
Signed-off-by: Rajesh Bhagat
Signed-off-by: Ran Wang
---
drivers/usb/dwc3/core.c | 24
drivers/usb/dwc3/core.h | 10 ++
2 files
Hi Michal,
> -Original Message-
> From: Michal Hocko [mailto:mho...@kernel.org]
> Sent: Tuesday, November 14, 2017 3:07 PM
> To: Ran Wang
> Cc: linux...@kvack.org; Michael Ellerman ; Vlastimil
> Babka ; Andrew Morton ;
> KAMEZAWA Hiroyuki ; Reza Arbab
> ; Yas
Hi Michal,
> -Original Message-
> From: Michal Hocko [mailto:mho...@kernel.org]
> Sent: Monday, November 13, 2017 7:03 PM
> To: Ran Wang
> Cc: linux...@kvack.org; Michael Ellerman ; Vlastimil
> Babka ; Andrew Morton ;
> KAMEZAWA Hiroyuki ; Reza Arbab
> ; Yas
Hello Michal,
> Date: Fri, 13 Oct 2017 14:00:12 +0200
>
> From: Michal Hocko
>
> Michael has noticed that the memory offline tries to migrate kernel code
> pages when doing echo 0 > /sys/devices/system/memory/memory0/online
>
> The current implementation will fail the operation after severa
This patch adds entries in dts to enable USB 3.0 PHY driver.
Signed-off-by: Sriram Dash
Signed-off-by: Ran Wang
---
Change in v2:
- Rename node name from 'usb3-phy' to 'usb-phy'
- Adjust phy node position
arch/arm64/boot/dts/freescale/f
Adds qoriq usb 3.0 phy driver to implement erratum related workaround
for qoriq SoC.
Signed-off-by: Sriram Dash
Signed-off-by: Ran Wang
---
Change in v2:
- Replace funciont __raw_writel() by iowrite32be()
- Remove qoriq_usb3_phy_read() and qoriq_usb3_phy_write()
- Remove
Adds entry point at dwc3 core init function to enable
USB 3.0 PHY driver.
Signed-off-by: Ran Wang
---
Change in v2:
- New file
drivers/usb/dwc3/core.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index
Hi Oliver
> -Original Message-
> From: Oliver Neukum [mailto:oneu...@suse.com]
> Sent: Monday, October 23, 2017 6:56 PM
> To: Ran Wang
> Cc: David S . Miller ; hayeswang
> ; linux-kernel@vger.kernel.org; linux-
> u...@vger.kernel.org; net...@vger.kernel.org
> Subj
This product is named 'TP-LINK USB 3.0 Gigabit Ethernet Network
Adapter (Model No.is UE300)'. It uses chip RTL8153 and works with
driver drivers/net/usb/r8152.c
Signed-off-by: Ran Wang
---
drivers/net/usb/cdc_ether.c | 8
drivers/net/usb/r8152.c | 2 ++
2 files c
requests from the host/hub and enter
low power.
Signed-off-by: Ran Wang
---
Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
drivers/usb/dwc3/core.c| 2 ++
drivers/usb/dwc3/core.h| 2 ++
drivers/usb/dwc3/ep0.c | 4
LS1012A has one USB 3.0(DWC3) controller and
one USB 2.0 controller.
Signed-off-by: Ran Wang
---
Change in v2:
Move node usb2@860 to the back of sata@320 to keep nodes
sorted in unit-address.
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 17
> -Original Message-
> From: Shawn Guo [mailto:shawn...@kernel.org]
> Sent: Thursday, July 13, 2017 4:07 PM
> To: Ran Wang
> Cc: Rob Herring ; Mark Rutland
> ; Catalin Marinas ; Will
> Deacon ; Andy Tang ; Harninder
> Rai ; Horia Geantă ; open
> list:OPEN FI
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