On 01/31/2019 06:55 PM, Boris Brezillon wrote:
> On Thu, 31 Jan 2019 16:15:28 +
> wrote:
>
>> From: Tudor Ambarus
>>
>> Cache MR value to avoid write access when setting the controller
>> in Serial Memory Mode (SMM). SMM is set in exec_op() and not at
>> probe time, to let room for future
On Thu, 31 Jan 2019 16:15:28 +
wrote:
> From: Tudor Ambarus
>
> Cache MR value to avoid write access when setting the controller
> in Serial Memory Mode (SMM). SMM is set in exec_op() and not at
> probe time, to let room for future regular SPI support.
>
> Signed-off-by: Tudor Ambarus
> -
From: Tudor Ambarus
Cache MR value to avoid write access when setting the controller
in Serial Memory Mode (SMM). SMM is set in exec_op() and not at
probe time, to let room for future regular SPI support.
Signed-off-by: Tudor Ambarus
---
v2: cache MR value instead of moving the write access at
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