On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> +static struct xilinx_cdma_tx_segment *
> +xilinx_cdma_alloc_tx_segment(struct xilinx_cdma_chan *chan)
> +{
> + struct xilinx_cdma_tx_segment *segment;
> + dma_addr_t phys;
> +
> + segment = dma_pool_alloc(chan->
angi; Michal Simek; Williams,
> Dan
> J; Soren Brinkmann; dmaeng...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; a...@arndb.de
> Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory
> Access Engine driver support
>
> On Mon, 2015-10-05 at 13:50 +0
On Mon, 2015-10-05 at 13:50 +, Appana Durga Kedareswara Rao wrote:
> >
> > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> > > This is the driver for the AXI Central Direct Memory Access (AXI
> > > CDMA) core, which is a soft Xilinx IP core that provides
> > > high-b
eswara Rao; dmaeng...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory
> Access Engine driver support
>
> On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> This is the driver for the AXI Central Direct Memory Access (AXI
> CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth
> Direct Memory Access (DMA) between a memory-mapped source address and a
> memory-map
This is the driver for the AXI Central Direct Memory Access (AXI
CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth
Direct Memory Access (DMA) between a memory-mapped source address and a
memory-mapped destination address.
This module works on Zynq (ARM Based SoC) and Microbla
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