On Thu, Jul 2, 2020 at 10:04 PM Florian Fainelli wrote:
>
>
>
> On 7/2/2020 12:18 PM, Robert Marko wrote:
> > On Thu, Jul 2, 2020 at 3:38 PM Andrew Lunn wrote:
> >>
> >>> + clock-frequency:
> >>> +default: 1
> >>
> >> IEEE 802.3 says the default should be 2.5MHz. Some PHYs will go
>
On 7/2/2020 12:18 PM, Robert Marko wrote:
> On Thu, Jul 2, 2020 at 3:38 PM Andrew Lunn wrote:
>>
>>> + clock-frequency:
>>> +default: 1
>>
>> IEEE 802.3 says the default should be 2.5MHz. Some PHYs will go
>> faster, but 100MHz seems unlikely!
> This MDIO controller has an internal
On Thu, Jul 2, 2020 at 3:38 PM Andrew Lunn wrote:
>
> > + clock-frequency:
> > +default: 1
>
> IEEE 802.3 says the default should be 2.5MHz. Some PHYs will go
> faster, but 100MHz seems unlikely!
This MDIO controller has an internal divider, by default its set for
100MHz clock.
In IPQ
> + clock-frequency:
> +default: 1
IEEE 802.3 says the default should be 2.5MHz. Some PHYs will go
faster, but 100MHz seems unlikely!
Andrew
This adds the necessary bindings for SoC-s that have a separate MDIO clock.
Signed-off-by: Robert Marko
---
.../devicetree/bindings/net/qcom,ipq4019-mdio.yaml| 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml
b/Docum
5 matches
Mail list logo
