Hello Stephen,
On 11/29/2018 2:40 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-11-21 23:53:41)
diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
index f133b7f..ba8ff99 100644
--- a/drivers/clk/qcom/gcc-sdm845.c
+++ b/drivers/clk/qcom/gcc-sdm845.c
@@ -3153,6 +3153,34
Hello Stephen,
On 11/27/2018 2:44 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-11-21 23:53:41)
+
+static struct clk_branch lpass_qdsp6ss_core_clk = {
+ .halt_reg = 0x20,
+ /* CLK_OFF would not toggle until LPASS is not out of reset */
Is this really "CLK_OFF won't toggle until
Quoting Taniya Das (2018-11-21 23:53:41)
> diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
> index f133b7f..ba8ff99 100644
> --- a/drivers/clk/qcom/gcc-sdm845.c
> +++ b/drivers/clk/qcom/gcc-sdm845.c
> @@ -3153,6 +3153,34 @@ enum {
> },
> };
>
> +static struct cl
Quoting Taniya Das (2018-11-21 23:53:41)
> +
> +static struct clk_branch lpass_qdsp6ss_core_clk = {
> + .halt_reg = 0x20,
> + /* CLK_OFF would not toggle until LPASS is not out of reset */
Is this really "CLK_OFF won't toggle until LPASS it out of reset"?
Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
LPASS clocks present on the global clock controller would be registered
with the clock framework based on the protect
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