On Thursday 30 May 2013 03:04 PM, Tomi Valkeinen wrote:
Split regulator and DSI PLL init code to their own functions for
clarity.
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/dss/dpi.c | 100 ++
1 file changed, 53 insertions(+), 47 deletions(-
On Thursday 30 May 2013 03:04 PM, Tomi Valkeinen wrote:
Separate the regulator initialization code to its own function, removing
duplicate code.
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/dss/dsi.c | 82 ---
1 file changed, 31 insertions(+),
On Thursday 30 May 2013 03:04 PM, Tomi Valkeinen wrote:
We currently have two steps in panel initialization and startup: probing
and enabling. After the panel has been probed, it's ready and can be
configured and later enabled.
This model is not enough with more complex display pipelines, where
On Thursday 30 May 2013 03:04 PM, Tomi Valkeinen wrote:
Currently omapdrm creates crtcs, which map directly to DSS overlay
managers, only on demand at init time. This would make it difficult to
manage connecting the display entities in the future, as the code cannot
just search for a suitable ove
On Thursday 30 May 2013 03:04 PM, Tomi Valkeinen wrote:
Split the function that creates overlay manager structs into two: one
that creates just the structs, and one that creates the sysfs files for
the manager.
This will help us use the overlay manager structs with omapdrm in the
following patch
+ Chris since the patch has some davinci_mmc.c changes.
Chris, Mark,
On 3/6/2013 9:45 PM, Matt Porter wrote:
> Move mach-davinci/dma.c to common/edma.c so it can be used
> by OMAP (specifically AM33xx) as well.
>
> Signed-off-by: Matt Porter
> Acked-by: Sekhar Nori
Can you please ack changes
On Friday 07 June 2013 12:16 AM, Nishanth Menon wrote:
> On 23:21-20130606, Sricharan R wrote:
>> Hi,
>> On Wednesday 05 June 2013 07:27 PM, Nishanth Menon wrote:
>>> On 12:16-20130605, Sricharan R wrote:
>>>> From: Roger Quadros
>>> [...]
>&
On Thursday 30 May 2013 03:04 PM, Tomi Valkeinen wrote:
On some platforms DPI requires a regulator to be enabled to power up the
output pins. This regulator is, for some reason, currently attached to
the virtual omapdss device, instead of the DPI device. This does not
work for DT, as the regulato
On Friday 07 June 2013 12:00 AM, Santosh Shilimkar wrote:
> On Thursday 06 June 2013 01:57 PM, Paul Walmsley wrote:
>> On Wed, 29 May 2013, Santosh Shilimkar wrote:
>>
>>> From: Sricharan R
>>>
>>> - The IO resource information like dma request lines, irq number and
>>> ocp address space can be
On 16:27-20130606, Kevin Hilman wrote:
> On most OMAP3 platforms, the twl4030 IRQ line is connected to the
> SYS_NIRQ line on OMAP. Add another DTS include file
> (twl4030_omap3_mux.dtsi) for boards that hook up the twl4030 this way
> to include.
>
> This allows RTC wake fro
On most OMAP3 platforms, the twl4030 IRQ line is connected to the
SYS_NIRQ line on OMAP. Add another DTS include file
(twl4030_omap3_mux.dtsi) for boards that hook up the twl4030 this way
to include.
This allows RTC wake from off-mode to work again on OMAP3-based
platforms with twl4030. Tested o
Paul Walmsley writes:
> On Wed, 29 May 2013, Santosh Shilimkar wrote:
>
>> From: Vaibhav Hiremath
>>
>> AM33XX only supports DT boot mode and with addition of
>> extracting module resources like, irq, dma and address space
>> from DT block, so now we can remove duplicate information from
>> hwm
Hi,
On Tue, Jun 04, 2013 at 10:40:37AM +0300, Tomi Valkeinen wrote:
> I've made some big changes on the omapdss device model, which involves
> converting all the panel drivers. I've got only a bunch of boards, so I
> hope some of you can perhaps do some minimal tests on some other boards.
>
> I'v
With pbias support in place remove dt workaround for pbias
Signed-off-by: Balaji T K
---
drivers/mmc/host/omap_hsmmc.c | 20 +---
1 files changed, 1 insertions(+), 19 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 8dd1cd3..f2e3d1a
omap3_pmx_core: padconf register are in two banks 0x48003000 to 0x48002268
and 0x480025c0 to 0x480025f8.
split omap3_pmx_core into 2 banks as register between 0x48002270 and 0x48002564
belongs to type pinctrl-single,bit-per-mux with access to certain bit
fields with bit field mask.
Signed-off-by:
Since regulator_put can handle NULL / IS_ERR(regulator)
use_reg can be removed, so that regulator_put in omap_hsmmc_reg_put
can be reused for vmmc_aux regulator error scenario.
Signed-off-by: Balaji T K
---
drivers/mmc/host/omap_hsmmc.c |8 ++--
1 files changed, 2 insertions(+), 6 deleti
Update needs_vmmc with info passed from board file via platform
data pdata->needs_vmmc.
Use needs_vmmc/needs_vmmc_aux to check whether
regulator is mandatory and handle regulator errors
like EPROBE_DEFER properly
Signed-off-by: Balaji T K
---
drivers/mmc/host/omap_hsmmc.c | 65
update needs_vmmc, needs_vmmc_aux for dt boot
Signed-off-by: Balaji T K
---
drivers/mmc/host/omap_hsmmc.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 21fc152..08f4ca7 100644
--- a/drivers/mmc/host/
Add needs_vmmc and needs_vmmc_aux to indicate whether regulator is
applicable so that omap_hsmmc can handle deferred probe error
properly for regulators.
Remove the assumption that vmmc_aux regulator to be available only if vmmc is
present. Platforms can have fixed-always-ON regulator for vmmc and/
PBIAS register configuration is based on the regulator voltage
which supplies these pbias cells, sd i/o pads.
With PBIAS register address and bit definitions different across
omap[3,4,5], Simplify PBIAS configuration under three different
regulator voltage levels - O V, 1.8 V, 3 V. Corresponding pi
add pbias states for pbias 0, 1.8V, 3V
add sd/mmc1 pull strength values for control_mmc1 in mmc_init pinctrl state
Signed-off-by: Balaji T K
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 34 +
arch/arm/boot/dts/omap4-sdp.dts | 34 ++
add pbias states for pbias 0, 1.8V, 3V
add omap3 sd/mmc2 loop back clock config for devconf1 in mmc2_init pinctrl state
add OMAP3430 sd/mmc1 loop back clock config for devconf0 in mmc1_init pinctrl
state
add OMAP3630 sd/mmc1 speed mode config for prog_io1 in mmc1_init pinctrl state
Signed-off-by:
This patch series adds support for configuring pbias register needed for
switching (ON/OFF, voltage scaling 3V, 1.8V) vmmc regulator suppling
OMAP mmc/sd1 i/o pads for device tree boot.
The control module registers are needed for mmc pbias i/o, speed mode
configuration of mmc1 and loopback clock co
handle vcc and vcc_aux independently
Signed-off-by: Balaji T K
---
drivers/mmc/host/omap_hsmmc.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 1865321..bda1a42 100644
--- a/drivers/mmc/host/oma
On 23:21-20130606, Sricharan R wrote:
> Hi,
> On Wednesday 05 June 2013 07:27 PM, Nishanth Menon wrote:
> > On 12:16-20130605, Sricharan R wrote:
> >> From: Roger Quadros
> > [...]
> >> diff --git a/arch/arm/boot/dts/omap5-uevm.dts
> >> b/arch/a
On Thursday 06 June 2013 01:57 PM, Paul Walmsley wrote:
> On Wed, 29 May 2013, Santosh Shilimkar wrote:
>
>> From: Sricharan R
>>
>> - The IO resource information like dma request lines, irq number and
>> ocp address space can be populated via dt blob. So such data is stripped
>> from OMAP4 S
* Adding pinctrl PM support for CPSW and MDIO for Power Optimization
* Adopted to the new pinctrl core PM helpers added by Linus Walleij in
http://marc.info/?l=linux-arm-kernel&m=137044113914184&w=2. This change
was suggested by Mark Brown in my another patch series posted for CPSW
and MDIO
This utilize the new pinctrl core PM helpers to transition
the driver to "default" and "sleep" states.
Signed-off-by: Mugunthan V N
---
drivers/net/ethernet/ti/cpsw.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.
This utilize the new pinctrl core PM helpers to transition
the driver to "default" and "sleep" states.
Signed-off-by: Mugunthan V N
---
drivers/net/ethernet/ti/davinci_mdio.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/ti/davinci_mdio.c
b/drivers/net/e
On Wed, 29 May 2013, Santosh Shilimkar wrote:
> From: Sricharan R
>
> - The IO resource information like dma request lines, irq number and
> ocp address space can be populated via dt blob. So such data is stripped
> from OMAP4 SOC hwmod data file.
>
> - The devices which are still missing t
Hi,
On Wednesday 05 June 2013 10:34 PM, Dan Murphy wrote:
> Sricharan
>
> Thanks for sending this up in the series.
>
> On 06/05/2013 01:46 AM, Sricharan R wrote:
>> From: Dan Murphy
>>
>> Add support for blue LED 1 off of GPIO 153.
>> Make the LED a heartbeat LED
>> Configure the MUX for GPIO out
Hi,
On Wednesday 05 June 2013 07:27 PM, Nishanth Menon wrote:
> On 12:16-20130605, Sricharan R wrote:
>> From: Roger Quadros
> [...]
>> diff --git a/arch/arm/boot/dts/omap5-uevm.dts
>> b/arch/arm/boot/dts/omap5-uevm.dts
>> index 843a001..cf862df 100644
>> --- a/arch/arm/boot/dts/omap5-uevm.dts
>>
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tony
The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:
Linux 3.10-rc4 (2013-06-02 17:11:17 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git
tags/oma
From: Dan Murphy
Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.
Cc: Dan Murphy
Signed-off-by: Dan Murphy
[Sricharan R : Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R
---
[V2] Removed the redundant comments
From: Sourav Poddar
Booting omap5 uevm results in the following error
"did not get pins for uart error: -19"
This happens because omap5 uevm dts file is not adapted to use uart through
pinctrl
framework. Populating uart pinctrl data to get rid of the error.
Cc: Sourav Poddar
Signed-off-by: So
The uevm is the official board supported for the OMAP5 soc
in mainline. The uevm has an OMAP5432 with a DDR3 memory.
Renaming the board dts file and adding the following cleanups.
* There are no devices connected on I2C 2,3,4 buses. So remove
the pinmux data for the same.
* DDR3 memory is us
From: Roger Quadros
Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.
Also provide pin multiplexer information for the USB host
pins.
Cc: Roger Quadros
Signed-off-by: Roger Quadros
[Sricharan R : Replaced constants with preprocessor macros]
Signed-off
uevm is the official board supported for OMAP5 soc in the mainline.
This series renames the board dts file for OMAP5 accordingly and cleans
up the same. Also a few additional device DT entry updates are done.
This is on top of the below branch
git://git.kernel.org/pub/scm/linux/kernel/git/bcou
* Paul Walmsley [130605 21:22]:
> Hi,
>
> also,
>
> On Wed, 5 Jun 2013, Aida Mynzhasova wrote:
>
> > Aida Mynzhasova (5):
> > ARM: OMAP: AM33xx: multiple renames for early initialization
>
> If this patch is what's responsible for all the file renaming, please drop
> it. Looks from the cha
* Grant Likely [130605 15:39]:
> On Mon, 20 May 2013 10:46:21 -0700, Tony Lindgren wrote:
> > * Tony Lindgren [130516 14:50]:
> > > * Aaro Koskinen [130516 14:05]:
> > > > On Thu, May 16, 2013 at 11:09:34AM -0700, Tony Lindgren wrote:
> > > > > * Aaro Koskinen [130513 13:58]:
> > > > > > I tes
On Thu, 6 Jun 2013, jean-philippe francois wrote:
> Does the first version [1] of the patch, that only touch the MSB of
> the divider also trigger the
> bug ?
>
> [1] https://patchwork.kernel.org/patch/2609681/
That one passes the PM test here. Will take this one for v3.10-rc fixes
instead, s
On 06/05/2013 04:50 PM, Wolfram Sang wrote:
The similar patch already exists:
https://patchwork.kernel.org/patch/2448251/ - [v2,1/2] RTC: rtc-twl:
Fix rtc_reg_map initialization
from Peter Ujfalusi
So, I think it is best if you resend this patch after all the fixes it
needs are applied or you re
Add code to parse the GPIO expander Device Tree node and extract platform data
out of it, and populate the struct 'pcf857x_platform_data' maintained by the
driver. This enables devices to reference the gpio expander from Device Tree.
Add DT binding info in Documentation.
CC: Grant Likely
Signed-
From: Philip Avinash
EHRPWM module requires explicit clock gating of TBCLK from control
module. Hence add TBCLK clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip Avinash
[bigeasy: remove CK_AM33XX]
Signed-off-by: Sebastian Andrzej Siewior
---
arch/arm/mach-omap2/cclock33xx_da
The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:
Linux 3.10-rc4 (2013-06-02 17:11:17 +0900)
are available in the git repository at:
git://git.breakpoint.cc/bigeasy/linux.git tags/am335x-pwm
for you to fetch changes up to 6b319b16a27463c93ec36e59458448aae3ab94cd:
From: Philip Avinash
Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to
AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by
adding necessary properties like pwm-cells, base reg & set disabled as
status.
Signed-off-by: Philip Avinash
Reviewed-by: Thierry
From: Philip Avinash
PWM output from ecap0 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales.
Signed-off-by: Philip Avinash
Reviewed-by: Thierry Reding
Signed-off-by: Sebastian Andrzej Siewior
---
arch/arm/boot/dts/am335x-evm.dts
From: Philip Avinash
PWM output from ecap2 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales with
inverse polarity.
Signed-off-by: Philip Avinash
Reviewed-by: Thierry Reding
Signed-off-by: Sebastian Andrzej Siewior
---
arch/arm/bo
Hi Sebastian,
On Thu, Jun 6, 2013 at 4:24 PM, Sebastian Andrzej Siewior
wrote:
> The itention was probably to make both pointers const but as it is now,
> it is just const used twice.
Yes, it's a typo I did accidentally. Good catch!
Regards,
Ruslan
>
> Signed-off-by: Sebastian Andrzej Siewior
The itention was probably to make both pointers const but as it is now,
it is just const used twice.
Signed-off-by: Sebastian Andrzej Siewior
---
arch/arm/mach-omap2/id.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
in
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tomi,
On 06/04/13 10:40, Tomi Valkeinen wrote:
> Hi guys,
>
> I've made some big changes on the omapdss device model, which involves
> converting all the panel drivers. I've got only a bunch of boards, so I
> hope some of you can perhaps do some m
On Thursday 06 of June 2013 10:50:39 Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 00:26 Thu 06 Jun , Grant Likely wrote:
> > On Tue, 09 Apr 2013 00:44:05 +0200, Javier Martinez Canillas
wrote:
> > > On 04/09/2013 12:05 AM, Rob Herring wrote:
> > > > On 04/05/2013 02:48 AM, Javier Martinez Ca
On 00:26 Thu 06 Jun , Grant Likely wrote:
> On Tue, 09 Apr 2013 00:44:05 +0200, Javier Martinez Canillas
> wrote:
> > On 04/09/2013 12:05 AM, Rob Herring wrote:
> > > On 04/05/2013 02:48 AM, Javier Martinez Canillas wrote:
> > >> This means that drivers that need the IRQ type/level flags defi
On Thu, Jun 6, 2013 at 10:50 AM, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 00:26 Thu 06 Jun , Grant Likely wrote:
>> On Tue, 09 Apr 2013 00:44:05 +0200, Javier Martinez Canillas
>> wrote:
>> > On 04/09/2013 12:05 AM, Rob Herring wrote:
>> > > On 04/05/2013 02:48 AM, Javier Martinez Canill
On Thu, Jun 06, 2013 at 11:29:39AM +0530, Mugunthan V N wrote:
> On 6/6/2013 12:53 AM, Mark Brown wrote:
> >Linus Walleij posted some patches which factor the state setting code
> >out into generic functions earlier on today - it probably makes sense to
> >pick those up rather than open coding
>
On 06/06/2013 01:34 AM, Grant Likely wrote:
> On Fri, 5 Apr 2013 09:48:08 +0200, Javier Martinez Canillas
> wrote:
> [...]
>> irq_of_parse_and_map() calls to irq_create_of_mapping() which calls to
>> the correct xlate function handler according to "#interrupt-cells"
>> (irq_domain_xlate_onecell
On 6/6/2013 1:12 PM, Benoit Cousson wrote:
Hi Mugunthan,
On 06/05/2013 07:08 PM, Mugunthan V N wrote:
This patch series adds the following features
* Adding pinctrl PM support for CPSW and MDIO for Power Optimization
* Adding phy address to the CPSW node for EVMsk board
Changes from initial ve
On 6/6/2013 12:36 PM, Florian Vaussard wrote:
Hello,
On 06/05/2013 07:08 PM, Mugunthan V N wrote:
Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Defau
Use module_platform_driver() to register the platform driver.
Signed-off-by: Peter Ujfalusi
Acked-by: Kevin Hilman
---
drivers/rtc/rtc-twl.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c
index c9060e9..e1776fd 1006
Initialize the rtc_reg_map in platform_driver's probe function instead at
module_init time. This way we can make sure that the twl-core has been already
probed and initialized (twl_priv->twl_id is valid) since the platform device
for the RTC driver will be created by the twl-core after it finished
On 06/06/2013 01:26 AM, Grant Likely wrote:
> On Tue, 09 Apr 2013 00:44:05 +0200, Javier Martinez Canillas
> wrote:
>> On 04/09/2013 12:05 AM, Rob Herring wrote:
>> > On 04/05/2013 02:48 AM, Javier Martinez Canillas wrote:
>> >> This means that drivers that need the IRQ type/level flags defined i
2013/6/5 Paul Walmsley :
> Hi
>
> On Thu, 30 May 2013, Jean-Philippe Francois wrote:
>
>> omap36xx_pwrdn_clk_enable_with_hsdiv_restore expects the parent hw of the
>> clock
>> to be a clk_hw_omap. However, looking at cclock3xxx_data.c, all concerned
>> clock
>> have parent defined as clk_divider.
Hi Mugunthan,
On 06/05/2013 07:08 PM, Mugunthan V N wrote:
> This patch series adds the following features
> * Adding pinctrl PM support for CPSW and MDIO for Power Optimization
> * Adding phy address to the CPSW node for EVMsk board
>
> Changes from initial version
> * Fixed the multiline functi
Hi,
On Wednesday 05 June 2013 10:59 PM, Emil Goode wrote:
It's not necessary to free memory allocated with devm_kzalloc
in a remove function and using kfree leads to a double free.
Looks fine to me. Tomi, could you take this for 3.11?
Archit
Signed-off-by: Emil Goode
---
drivers/video/o
Hello,
On 06/05/2013 07:08 PM, Mugunthan V N wrote:
Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Default mode is nothing but the values required for
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