On 4/17/12, Thomas Abraham wrote:
> From: Sangsu Park
>
> Add GPC4 bank instance which is included in rev1 of Exynos5.
>
> Cc: Grant Likely
> Signed-off-by: Sangsu Park
> ---
> arch/arm/mach-exynos/include/mach/gpio.h |9 ++---
> drivers/gpio/gpio-samsung.c |8
Hi,
On 4/17/12, Thomas Abraham wrote:
> From: Changhwan Youn
>
> Adapt to changes in GIC physical address in rev1 of Exynos5.
Does it different from rev0 and rev1? and does it support the rev1 only?
Thank you,
Kyungmin Park
>
> Signed-off-by: Changhwan Youn
> ---
> arch/arm/mach-exynos/commo
Hi,
It's already merged with different patch,
#ifdef CONFIG_OF
static const struct of_device_id s3c_rtc_dt_match[] = {
{
.compatible = "samsung,s3c2410-rtc",
.data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
}, {
.compatible = "samsung,
On 4/17/12, Thomas Abraham wrote:
> Add watchdog timer clock instance for Exynos5 watchdog controller.
>
> Signed-off-by: Thomas Abraham
> ---
> arch/arm/mach-exynos/clock-exynos5.c |5 +
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/clock-exyno
Add AUXDATA for i2c and MDMA controllers of Exynos5.
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/mach-exynos5-dt.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 4711
Updated Exynos5 device tree source files to reflect changes in rev1 of
Exynos5 SoC. This includes new additions to the Exynos5 dtsi and SMDK5250 dts
files and few minor fixes.
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 52 +
arch/a
From: Changhwan Youn
Redefine IRQ_MCT_L0,1 irq definition as it is changed in rev1 of Exynos5.
Signed-off-by: Changhwan Youn
---
arch/arm/mach-exynos/include/mach/irqs.h |4 ++--
arch/arm/mach-exynos/mct.c | 17 +++--
2 files changed, 13 insertions(+), 8 deletio
From: Kisoo Yu
The fout clock of BPLL and MPLL have a selectable source in rev1 of
Exynos5. The clock options are a fixed divided by 2 clock and the
output of the PLL itself. Add support for these new clock instances.
Signed-off-by: Kisoo Yu
---
arch/arm/mach-exynos/clock-exynos5.c |
From: Sangsu Park
Add GPC4 bank instance which is included in rev1 of Exynos5.
Cc: Grant Likely
Signed-off-by: Sangsu Park
---
arch/arm/mach-exynos/include/mach/gpio.h |9 ++---
drivers/gpio/gpio-samsung.c |8
2 files changed, 14 insertions(+), 3 deletions(-)
From: Changhwan Youn
Adapt to changes in GIC physical address in rev1 of Exynos5.
Signed-off-by: Changhwan Youn
---
arch/arm/mach-exynos/common.c |4 ++--
arch/arm/mach-exynos/include/mach/map.h |4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/
From: Heiko Stuebner
Commits 7006ee4f (rtc-s3c: make room for more variants in devicetree block)
and 6c0a2365 (rtc-s3c: add variants for S3C2443 and S3C2416)
introduced build-failures with enabled CONFIG_USE_OF option.
This patch fixes missing "," in s3c_rtc_dt_match and wrong handling of
the of
Add clock instance for MDMA0 controller.
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/clock-exynos5.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos5.c
b/arch/arm/mach-exynos/clock-exynos5.c
index fb95e9b..0230ba8 1
The clock of both the peripheral dma controllers is controlled by a single
clock gate. Hence remove the duplicate instantiation of the pdma clock.
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/clock-exynos5.c | 17 -
1 files changed, 4 insertions(+), 13 deletions(-)
d
Add watchdog timer clock instance for Exynos5 watchdog controller.
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/clock-exynos5.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos5.c
b/arch/arm/mach-exynos/clock-exynos5.c
inde
Use the of_irq_init() call to setup the gic which also properly registers
the gic device node pointer with gic irq domain, without which all interrupt
specifier translations for gic fail.
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/common.c |4 +++-
1 files changed, 3 insertions(+
A seperate bus_type instance is not required for Exynos5. The existing bus_type
instance used with Exynos4 is sufficient for both Exynos4 and Exynos5. This
also solves issue of uninitialized usage of exynos4_subsys in Exynos4 power
management code that is reused for Exynos5 also.
Signed-off-by: Th
This patch series includes modifications to support Rev1.0 of Exynos5250 SoC
and overrides the existing support for Rev0. It also includes basic device
tree support (tested for UART, WDT, RTC, GPIO, I2C, GIC and DMA PL330).
Changhwan Youn (2):
ARM: Exynos5: Modify the GIC physical address for st
On 17 April 2012 00:21, Mark Brown wrote:
> On Sat, Mar 24, 2012 at 03:19:50PM +0530, Thomas Abraham wrote:
>> Add device tree based discovery support for max8997.
>
> I tried to apply this but it's collided with some other changes in the
> driver which have arrived in the meantime and the rejects
On Sat, Mar 24, 2012 at 03:19:50PM +0530, Thomas Abraham wrote:
> Add device tree based discovery support for max8997.
I tried to apply this but it's collided with some other changes in the
driver which have arrived in the meantime and the rejects were too large
to fix up. I suspect it's mostly j
On Sat, Mar 24, 2012 at 03:19:49PM +0530, Thomas Abraham wrote:
> Add irq domain support for max8997 interrupts. The reverse mapping method
> used is linear mapping since the sub-drivers of max8997 such as regulator
> and charger drivers can use the max8997 irq_domain to get the linux irq
> number
Hi Mark,
On Wed, Apr 04, 2012 at 10:22:57PM +0100, Mark Brown wrote:
> On Sat, Mar 24, 2012 at 03:19:49PM +0530, Thomas Abraham wrote:
> > Add irq domain support for max8997 interrupts. The reverse mapping method
> > used is linear mapping since the sub-drivers of max8997 such as regulator
> > and
Hello Marek,
I have tested these patches on origen 3.4-rc2 with sysmmu_v12, and they
work great ! Thank you for sharing them.
Regards,
Subash
On 04/11/2012 08:04 PM, Marek Szyprowski wrote:
Hi!
These two patches fixes operation of the SYSMMU driver (v12 version [1])
with the new power domai
Hi,
On Monday, April 16, 2012 12:10 PM KyongHo Cho wrote:
> On Wed, Apr 11, 2012 at 11:34 PM, Marek Szyprowski
> wrote:
> > SYSMMU platform devices must be registered before setting up power
> > domains to let power domain driver to correctly register also SYSMMU
> > controller devices. This pat
On Mon, Apr 16, 2012 at 7:01 PM, Kyungmin Park
wrote:
> On 4/16/12, KyongHo Cho wrote:
>> On Sun, Apr 15, 2012 at 12:51 AM, Kukjin Kim wrote:
>>> On 04/12/12 01:19, KyongHo Cho wrote:
On Wed, Apr 11, 2012 at 11:34 PM, Marek Szyprowski
wrote:
>
> Hi!
>
> These two
On Wed, Apr 11, 2012 at 11:34 PM, Marek Szyprowski
wrote:
> SYSMMU platform devices must be registered before setting up power
> domains to let power domain driver to correctly register also SYSMMU
> controller devices. This patch also registers SYSMMU controller devices
> to respective power doma
On 4/16/12, KyongHo Cho wrote:
> On Sun, Apr 15, 2012 at 12:51 AM, Kukjin Kim wrote:
>> On 04/12/12 01:19, KyongHo Cho wrote:
>>>
>>> On Wed, Apr 11, 2012 at 11:34 PM, Marek Szyprowski
>>> wrote:
Hi!
These two patches fixes operation of the SYSMMU driver (v12 version [1])
>>
On Sun, Apr 15, 2012 at 12:51 AM, Kukjin Kim wrote:
> On 04/12/12 01:19, KyongHo Cho wrote:
>>
>> On Wed, Apr 11, 2012 at 11:34 PM, Marek Szyprowski
>> wrote:
>>>
>>> Hi!
>>>
>>> These two patches fixes operation of the SYSMMU driver (v12 version [1])
>>> with the new power domain driver based o
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