[Mesa-dev] [PATCH 10/13] radeonsi: Add CE uploader.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 23 +++ src/gallium/drivers/radeonsi/si_pipe.c| 11 +++ src/gallium/drivers/radeonsi/si_pipe.h| 3 +++ 3 files changed, 37 insertions(+) diff --git a/src/gallium

[Mesa-dev] [PATCH 09/13] radeonsi: Allocate chunks of CE ram.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 29 ++- src/gallium/drivers/radeonsi/si_pipe.h| 1 - src/gallium/drivers/radeonsi/si_state.h | 3 +++ 3 files changed, 23 insertions(+), 10 deletions(-) diff --git a/src

[Mesa-dev] [PATCH 02/13] winsys/amdgpu: split IB data into a new structure in preparation for CE

From: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 5 --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 6 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 68 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 16 4 files changed, 48 insertions(+)

[Mesa-dev] [PATCH 07/13] radeonsi: Add CE packet definitions.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/sid.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h index f0aa605..1072e0a 100644 --- a/src/gallium/drivers/radeonsi/sid.h +++ b/src/gallium

[Mesa-dev] [PATCH 12/13] gallium/util: Add u_bit_scan_consecutive_range64.

For use by radeonsi. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/auxiliary/util/u_math.h | 8 1 file changed, 8 insertions(+) diff --git a/src/gallium/auxiliary/util/u_math.h b/src/gallium/auxiliary/util/u_math.h index b4ac0db..3a468e4 100644 --- a/src/gallium/auxiliary/util

[Mesa-dev] [PATCH 08/13] radeonsi: Add CE synchronization.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_pipe.h | 2 ++ src/gallium/drivers/radeonsi/si_state_draw.c | 24 2 files changed, 26 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h

[Mesa-dev] [PATCH 06/13] radeonsi: Add dirty_mask to descriptor list.

We can then upload only the dirty ones with the constant engine. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 23 +++ src/gallium/drivers/radeonsi/si_state.h | 1 + 2 files changed, 24 insertions(+) diff --git a/src/gallium

[Mesa-dev] [PATCH 13/13] radeonsi: Use CE for all descriptors.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 46 +-- 1 file changed, 36 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 5e26760

[Mesa-dev] [PATCH 11/13] radeonsi: Use CE for vertex buffers.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 28 --- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 46d00b4

[Mesa-dev] [PATCH 03/13] winsys/amdgpu: add support for const IB

From: Marek Olšák v2: use the correct IB to update request (Bas Nieuwenhuizen) --- src/gallium/drivers/radeon/radeon_winsys.h | 18 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 48 +++--- src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 9 +- 3 files changed

Re: [Mesa-dev] [PATCH] gallium/util: fix u_bit_scan_consecutive_range for mask == 0xffffffff

unt) - 1) << *start); This signed shift needs to be fixed for *count == 31 too. Either way, Reviewed-by: Bas Nieuwenhuizen > -- > 2.5.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.fr

Re: [Mesa-dev] [PATCH] gallium/util: fix undefined shift to the last bit in u_bit_scan

Reviewed-by: Bas Nieuwenhuizen On Sat, Apr 16, 2016 at 2:13 AM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/auxiliary/util/u_math.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/gallium/auxiliary/util/u_math.h > b/sr

[Mesa-dev] [PATCH v2 00/12] Use the constant engine in radeonsi

them, I think it is not useful to add it already. - Fix u_bit_scan_consecutive_range64 for *mask = ~0llu. - Minor whitespace fixes. Bas Nieuwenhuizen (9): winsys/amdgpu: Enlarge const IB size. radeonsi: Create CE IB. radeonsi: Add CE packet definitions. radeonsi: Add CE synchronization.

[Mesa-dev] [PATCH v2 01/12] gallium/radeon: move ring_type into winsyses

From: Marek Olšák Not used by drivers. Reviewed-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/radeon_winsys.h| 1 - src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 8 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 + src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 10

[Mesa-dev] [PATCH v2 05/12] radeonsi: Create CE IB.

Based on work by Marek Olšák. v2: Add preamble IB. Leaves the load packet in the space calculation as the radeon winsys might not be able to support a premable. The added space calculation may look expensive, but is converted to a constant with (at least) -O2 and -O3. Signed-off-by: Bas

[Mesa-dev] [PATCH v2 12/12] radeonsi: Use CE for all descriptors.

v2: Load previous list for new CS instead of re-emitting all descriptors. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 70 +++ 1 file changed, 60 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeonsi

[Mesa-dev] [PATCH v2 11/12] gallium/util: Add u_bit_scan_consecutive_range64.

For use by radeonsi. v2: Make sure that it works for all 64 bits set. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/auxiliary/util/u_math.h | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/auxiliary/util/u_math.h b/src/gallium/auxiliary/util/u_math.h index

[Mesa-dev] [PATCH v2 09/12] radeonsi: Add CE uploader.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 23 +++ src/gallium/drivers/radeonsi/si_pipe.c| 11 +++ src/gallium/drivers/radeonsi/si_pipe.h| 3 +++ 3 files changed, 37 insertions

[Mesa-dev] [PATCH v2 06/12] radeonsi: Add CE packet definitions.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/sid.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h index f0aa605..1072e0a 100644 --- a/src/gallium/drivers/radeonsi

[Mesa-dev] [PATCH v2 04/12] winsys/amdgpu: Enlarge const IB size.

Necessary to prevent performance regressions due to extra flushing. Probably should enlarge it even further when also updating uniforms through the CE, but this seems large enough for now. v2: Add preamble IB. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 28

[Mesa-dev] [PATCH v2 08/12] radeonsi: Allocate chunks of CE ram.

v2: Use 32 byte alignment. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 30 +++ src/gallium/drivers/radeonsi/si_state.h | 3 +++ 2 files changed, 24 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/radeonsi

[Mesa-dev] [PATCH v2 03/12] winsys/amdgpu: Add support for const IB.

From: Marek Olšák v2: Use the correct IB to update request (Bas Nieuwenhuizen) v3: Add preamble IB. (Bas Nieuwenhuizen) --- src/gallium/drivers/radeon/radeon_winsys.h | 30 ++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 88 -- src/gallium/winsys/amdgpu/drm

[Mesa-dev] [PATCH v2 07/12] radeonsi: Add CE synchronization.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.h | 1 + src/gallium/drivers/radeonsi/si_state_draw.c | 24 2 files changed, 25 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium

[Mesa-dev] [PATCH v2 02/12] winsys/amdgpu: split IB data into a new structure in preparation for CE

From: Marek Olšák Reviewed-by: Bas Nieuwenhuizen --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 5 --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 6 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 68 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 16

[Mesa-dev] [PATCH v2 10/12] radeonsi: Replace list_dirty with a mask.

We can then upload only the dirty ones with the constant engine. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 37 --- src/gallium/drivers/radeonsi/si_state.h | 9 +-- 2 files changed, 29 insertions(+), 17 deletions

Re: [Mesa-dev] [PATCH v2 05/12] radeonsi: Create CE IB.

On Mon, Apr 18, 2016 at 12:04 AM, Marek Olšák wrote: > On Sun, Apr 17, 2016 at 1:43 AM, Bas Nieuwenhuizen > wrote: >> Based on work by Marek Olšák. >> >> v2: Add preamble IB. >> >> Leaves the load packet in the space calculation as the >> radeon wins

Re: [Mesa-dev] [PATCH v2 08/12] radeonsi: Allocate chunks of CE ram.

On Mon, Apr 18, 2016 at 12:13 AM, Marek Olšák wrote: > On Sun, Apr 17, 2016 at 1:43 AM, Bas Nieuwenhuizen > wrote: >> v2: Use 32 byte alignment. >> >> Signed-off-by: Bas Nieuwenhuizen >> --- >> src/gallium/drivers/radeonsi/si_descriptors.c | 30 >> +

Re: [Mesa-dev] [PATCH] radeonsi: enable GLSL 4.30 and therefore OpenGL 4.3

On Mon, Apr 18, 2016 at 7:58 PM, Ian Romanick wrote: > On 04/15/2016 03:33 AM, Marek Olšák wrote: >> The same thing Nicolai said: This can be committed before the UE4 >> compile failure is fixed. > > Is there a bug filed for that problem? Has anyone diagnosed the issue? > I just filed a bug for

[Mesa-dev] [PATCH v3 0/2] Remainder radeonsi compute patches.

). I also updated the update cap patch, as I discovered that writing the USER_DATA registers from a COPY_DATA packet was disallowed by the kernel with the SI CS checker. Now that that has been fixed in the kernel, the new patch checks for the drm version that has the fix. Bas Nieuwenhuizen (2):

[Mesa-dev] [PATCH v3 2/2] radeonsi: enable TGSI support cap for compute shaders

v2: Use chip_class instead of family. v3: Check kernel version for SI. Signed-off-by: Bas Nieuwenhuizen --- docs/GL3.txt | 4 ++-- docs/relnotes/11.3.0.html | 1 + src/gallium/drivers/radeon/r600_pipe_common.c | 21

[Mesa-dev] [PATCH v3 1/2] radeonsi: do not do two full flushes on every compute dispatch

: Add CS_PARTIAL_FLUSH events even if we already have INV_GLOBAL_L2. According to Marek the INV_GLOBAL_L2 events don't wait for compute shaders to finish, so wait for them explicitly. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 17 ++--- s

[Mesa-dev] [PATCH v3 00/12] Constant engine for radeonsi

Changes from v2: - Remains of vertex buffer descriptor support have been removed. Both wrt the space calculation and allocating CE ram. - Failing to create a preamble IB now rersults in failure. - Misc style fixes in patch 5 and 12. - Bas Bas Nieuwenhuizen (9): winsys/amdgpu

[Mesa-dev] [PATCH v3 12/12] radeonsi: Use CE for all descriptors.

v2: Load previous list for new CS instead of re-emitting all descriptors. v3: Do radeon_add_to_buffer_list in si_ce_upload. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 74 +++ 1 file changed, 64

[Mesa-dev] [PATCH v3 02/12] winsys/amdgpu: split IB data into a new structure in preparation for CE

From: Marek Olšák Reviewed-by: Bas Nieuwenhuizen --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 5 --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 6 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 68 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 16

[Mesa-dev] [PATCH v3 11/12] gallium/util: Add u_bit_scan_consecutive_range64.

For use by radeonsi. v2: Make sure that it works for all 64 bits set. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/auxiliary/util/u_math.h | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/auxiliary/util/u_math.h b/src/gallium

[Mesa-dev] [PATCH v3 06/12] radeonsi: Add CE packet definitions.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/sid.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h index 11d6090..516e114 100644 --- a/src/gallium/drivers/radeonsi

[Mesa-dev] [PATCH v3 04/12] winsys/amdgpu: Enlarge const IB size.

Necessary to prevent performance regressions due to extra flushing. Probably should enlarge it even further when also updating uniforms through the CE, but this seems large enough for now. v2: Add preamble IB. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/winsys

[Mesa-dev] [PATCH v3 09/12] radeonsi: Add CE uploader.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 23 +++ src/gallium/drivers/radeonsi/si_pipe.c| 11 +++ src/gallium/drivers/radeonsi/si_pipe.h| 3 +++ 3 files changed, 37 insertions

[Mesa-dev] [PATCH v3 05/12] radeonsi: Create CE IB.

. - Remove needed space for vertex buffer descriptors. - Fail when the preamble cannot be created. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/r600_pipe_common.c | 1 + src/gallium/drivers/radeon/r600_pipe_common.h | 1 + src/gallium/drivers/radeonsi/si_hw_context.c | 35

[Mesa-dev] [PATCH v3 01/12] gallium/radeon: move ring_type into winsyses

From: Marek Olšák Not used by drivers. Reviewed-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/radeon_winsys.h| 1 - src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 8 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 + src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 10

[Mesa-dev] [PATCH v3 10/12] radeonsi: Replace list_dirty with a mask.

We can then upload only the dirty ones with the constant engine. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 37 --- src/gallium/drivers/radeonsi/si_state.h | 9 +-- 2 files changed, 29

[Mesa-dev] [PATCH v3 07/12] radeonsi: Add CE synchronization.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.h | 1 + src/gallium/drivers/radeonsi/si_state_draw.c | 24 2 files changed, 25 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium

[Mesa-dev] [PATCH v3 08/12] radeonsi: Allocate chunks of CE ram.

v2: Use 32 byte alignment. v3: Don't allocate CE space for vertex buffer descriptors. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 33 +++ src/gallium/drivers/radeonsi/si_state.h | 3 +++ 2 files changed, 27 inser

[Mesa-dev] [PATCH v3 03/12] winsys/amdgpu: Add support for const IB.

From: Marek Olšák v2: Use the correct IB to update request (Bas Nieuwenhuizen) v3: Add preamble IB. (Bas Nieuwenhuizen) Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/radeon_winsys.h | 30 ++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 88 -- src

[Mesa-dev] [PATCH v3 12/12] radeonsi: Use CE for all descriptors.

v2: Load previous list for new CS instead of re-emitting all descriptors. v3: Do radeon_add_to_buffer_list in si_ce_upload. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- Forgot to save the file before amending src/gallium/drivers/radeonsi/si_descriptors.c | 74

Re: [Mesa-dev] [PATCH v3 1/2] radeonsi: do not do two full flushes on every compute dispatch

er-write hazards when transitioning from compute > to graphics and vice versa. Is the user expected to call > glMemoryBarrier in this case or do we need to synchronize explicitly > in the driver? > > Marek > > On Tue, Apr 19, 2016 at 1:39 AM, Bas Nieuwenhuizen > wrote: >>

[Mesa-dev] [PATCH 2/2] radeonsi: Consider input SGPR count for compute shader SGPR count.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 16 +++- src/gallium/drivers/radeonsi/si_shader.c | 3 ++- 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi

[Mesa-dev] [PATCH 1/2] radeonsi: Add CE synchronization for compute dispatches.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c| 4 src/gallium/drivers/radeonsi/si_state.h | 2 ++ src/gallium/drivers/radeonsi/si_state_draw.c | 4 ++-- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi

Re: [Mesa-dev] [PATCH v3 2/2] radeonsi: enable TGSI support cap for compute shaders

On Tue, Apr 19, 2016 at 4:03 PM, Alex Deucher wrote: > On Tue, Apr 19, 2016 at 6:56 AM, Marek Olšák wrote: >> Reviewed-by: Marek Olšák >> >> Marek >> >> On Tue, Apr 19, 2016 at 1:39 AM, Bas Nieuwenhuizen >> wrote: >>> v2: Use chip_class instead

[Mesa-dev] [PATCH v4] radeonsi: enable TGSI support cap for compute shaders

v2: Use chip_class instead of family. v3: Check kernel version for SI. v4: Preemptively allow amdgpu winsys for SI. Signed-off-by: Bas Nieuwenhuizen --- docs/GL3.txt | 4 ++-- docs/relnotes/11.3.0.html | 1 + src/gallium/drivers/radeon

[Mesa-dev] [PATCH 1/4] radeonsi: use CE suballocator for CP DMA realignment.

Use the CE suballocator instead of the normal one as the usage is most similar to the CE, i.e. only read and written on GPU and not mapped to CPU. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_cp_dma.c | 27 ++- 1 file changed, 10 insertions(+), 17

[Mesa-dev] [PATCH 3/4] radeonsi: Prevent overflow when calculating the scratch size.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 5 - src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi

[Mesa-dev] [PATCH 2/4] radeonsi: Use winsys pb_buffer for scratch buffers.

Allows allocation of >= 4 GiB. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 23 +++ src/gallium/drivers/radeonsi/si_pipe.c | 4 ++-- src/gallium/drivers/radeonsi/si_pipe.h | 4 ++-- src/gallium/drivers/radeo

[Mesa-dev] [PATCH 4/4] radeonsi: Print a message when scratch allocation fails.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 5 - src/gallium/drivers/radeonsi/si_state_shaders.c | 5 - 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi

Re: [Mesa-dev] [PATCH 1/4] radeonsi: use CE suballocator for CP DMA realignment.

I retract patch 1 and 2. Large scratch buffers are nice, but the hardware only supports a 32-bit offset into it. - Bas On Wed, Apr 20, 2016 at 12:50 AM, Bas Nieuwenhuizen wrote: > Use the CE suballocator instead of the normal one as the usage > is most similar to the CE, i.e. only re

Re: [Mesa-dev] [PATCH 2/2] winsys/amdgpu: clean up and fix switch statement

On Wed, Apr 20, 2016 at 1:13 AM, Grigori Goronzy wrote: > Add missing break, add default case. Additionally initialize variables > to avoid compiler warnings. > --- > src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/src/galliu

Re: [Mesa-dev] [PATCH 1/4] radeonsi: use CE suballocator for CP DMA realignment.

On Wed, Apr 20, 2016 at 2:13 AM, Nicolai Hähnle wrote: > On 19.04.2016 18:29, Bas Nieuwenhuizen wrote: >> >> I retract patch 1 and 2. Large scratch buffers are nice, but the >> hardware only supports a 32-bit offset into it. > > > Do you mean patch 2 and 3? Do y

[Mesa-dev] [PATCH] st/mesa: Use correct size for compute CAPs.

Some CAPs are stored as 64-bit value while Mesa stores the related constant as 32-bit value. Signed-off-by: Bas Nieuwenhuizen --- src/mesa/state_tracker/st_extensions.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa

[Mesa-dev] [PATCH] glsl: Use correct mode for split components.

The mode should stay the same as the original struct. In particular, shared should not be changed to temporary. Signed-off-by: Bas Nieuwenhuizen --- src/compiler/glsl/opt_structure_splitting.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/glsl

[Mesa-dev] [PATCH 1/2] radeonsi: Use defines for CONTEXT_CONTROL instead of magic values.

I have no source for the actual name of these fields, as these are not in the kernel headers. I hope they are clear though. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- src/gallium/drivers/radeonsi/sid.h | 3 +++ 2 files changed, 5 insertions(+), 2

[Mesa-dev] [PATCH 2/2] radeonsi: Enable loading into CE RAM.

We need to enable a bit in the CONTEXT_CONTROL packet for the loads to work. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++ src/gallium/drivers/radeonsi/si_hw_context.c | 5 + src/gallium/drivers/radeonsi/si_state.h | 1 + 3 files

Re: [Mesa-dev] [PATCH 2/2] radeonsi: Enable loading into CE RAM.

, 2016 at 11:44 AM, Marek Olšák wrote: > On Thu, Apr 21, 2016 at 1:49 AM, Bas Nieuwenhuizen > wrote: >> We need to enable a bit in the CONTEXT_CONTROL packet for the >> loads to work. >> >> Signed-off-by: Bas Nieuwenhuizen >> --- >> src/gallium/drivers/ra

[Mesa-dev] [PATCH v2 1/2] radeonsi: Use defines for CONTEXT_CONTROL instead of magic values.

v2: Use field names provided by Nicolai. Signed-off-by: Bas Nieuwenhuizen --- Sending this with the changed names, as they seem double to me. Should I just lose the register name, and optionally add a CONTEXT_CONTROL prefix? src/gallium/drivers/radeonsi/si_state.c | 4 ++-- src/gallium

[Mesa-dev] [PATCH v2 2/2] radeonsi: Enable loading into CE RAM.

We need to enable a bit in the CONTEXT_CONTROL packet for the loads to work. v2: Style issues. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_descriptors.c | 7 +++ src/gallium/drivers/radeonsi/si_hw_context.c | 5 + src/gallium/drivers/radeonsi/si_state.h

[Mesa-dev] [PATCH 1/2] winsys/amdgpu: Silence possibly uninitialized variable warning.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index bbd29fc..69fb9bb 100644 --- a/src/gallium/winsys/amdgpu/drm

[Mesa-dev] [PATCH 2/2] gallium/radeon: Silence possibly uninitialized variable warning.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/radeon_llvm_emit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_llvm_emit.c b/src/gallium/drivers/radeon/radeon_llvm_emit.c index 7174132..d3f5ae3 100644 --- a/src/gallium

Re: [Mesa-dev] [PATCH 02/10] radeonsi: make RW buffer descriptor array global, not per shader stage

On Wed, Apr 20, 2016 at 5:47 PM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/drivers/radeonsi/si_descriptors.c | 50 > +-- > src/gallium/drivers/radeonsi/si_pipe.h| 2 +- > 2 files changed, 25 insertions(+), 27 deletions(-) > > diff --git a/src/

Re: [Mesa-dev] [PATCH 00/10] RadeonSI: cleanup RW shader slots

made global, not per shader stage, so all shaders > receive the same pointer. > > Finally, all shader resource binding masks are shortened to 32 bits. > > Please review. Except for patch 2, which I've commented on, the series i

Re: [Mesa-dev] [PATCH 4/4] radeonsi: Print a message when scratch allocation fails.

On Wed, Apr 20, 2016 at 8:33 AM, wrote: > On 2016-04-20 11:46, Nicolai Hähnle wrote: >> >> On 19.04.2016 17:50, Bas Nieuwenhuizen wrote: >>> >>> Signed-off-by: Bas Nieuwenhuizen >>> --- >>> src/gallium/drivers/radeonsi/si_compute.c

[Mesa-dev] [PATCH 2/3] gallium/ddebug: Support compute states.

Note that compute states have a different struct than the other shader states, so we cannot reuse the macro. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/ddebug/dd_context.c | 37 + 1 file changed, 37 insertions(+) diff --git a/src/gallium/drivers

[Mesa-dev] [PATCH 1/3] gallium/ddebug: Add passthrough for get_compute_param.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/ddebug/dd_screen.c | 12 1 file changed, 12 insertions(+) diff --git a/src/gallium/drivers/ddebug/dd_screen.c b/src/gallium/drivers/ddebug/dd_screen.c index fbc0bec..ebe090b 100644 --- a/src/gallium/drivers/ddebug

[Mesa-dev] [PATCH 3/3] gallium/ddebug: Implement launch_grid.

Does not implement dumping info. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/ddebug/dd_draw.c | 29 + 1 file changed, 29 insertions(+) diff --git a/src/gallium/drivers/ddebug/dd_draw.c b/src/gallium/drivers/ddebug/dd_draw.c index 45e4e10..f0c8887

Re: [Mesa-dev] [PATCH 1/2] radeonsi: remove the shader parameter from si_set_ring_buffer

On Thu, Apr 21, 2016 at 5:58 PM, Marek Olšák wrote: > From: Marek Olšák > > not used anymore > > this is a follow-up to the RW buffer cleanup. Thanks. This series is Reviewed-by: Bas Nieuwenhuizen as well as patch 2 from the original series. - Bas > --- > src/gal

[Mesa-dev] [PATCH] radeonsi: Add config parameter to si_shader_apply_scratch_relocs.

shader->config is not updated for compute kernels. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c| 3 ++- src/gallium/drivers/radeonsi/si_shader.h| 1 + src/gallium/drivers/radeo

Re: [Mesa-dev] [PATCH 3/3] gallium/ddebug: Implement launch_grid.

On Thu, Apr 21, 2016 at 8:03 PM, Nicolai Hähnle wrote: > On 21.04.2016 10:42, Bas Nieuwenhuizen wrote: >> >> Does not implement dumping info. > > > Why not? I primarily wrote this series to make ddebug not crash when used with compute, so I haven't really looked a

[Mesa-dev] [PATCH 2/2] radeonsi: Fix memory leak in error path.

Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index a99a985..29dbdd8 100644 --- a/src/gallium/drivers/radeonsi

[Mesa-dev] [PATCH 1/2] radeonsi: Lock a mutex when checking scratch relocations.

We can use shaders from multiple contexts, and they were not otherwise locked yet. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 20 src/gallium/drivers/radeonsi/si_state_shaders.c | 12 ++-- 2 files changed, 26 insertions

[Mesa-dev] [PATCH v2] radeonsi: Lock a mutex when checking scratch relocations.

We can use shaders from multiple contexts, and they were not otherwise locked yet. v2: Fix the shader = NULL case. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_compute.c | 20 src/gallium/drivers/radeonsi/si_state_shaders.c | 13

Re: [Mesa-dev] [PATCH] radeonsi: add RW_BUFFERS only once in si_ce_needed_cs_space

+= si_descriptor_list_cs_space(SI_NUM_IMAGES, 8); > - Is this whitespace change intended? Either way, Reviewed-by: Bas Nieuwenhuizen - Bas > space *= SI_NUM_SHADERS; > > + space += si_descriptor_list_cs_space(SI_NUM_RW_BUFFERS, 4); > + >

Re: [Mesa-dev] OpenCL max VRAM setting

total available memory will be limited to 4 times this value (and available VRAM+GTT if that is lower). Yours sincerely, Bas Nieuwenhuizen On Tue, Apr 26, 2016 at 9:35 PM, Bo Gao <7zla...@gmail.com> wrote: > Hi all, > > First time poster here. Is there any way I can change global memory

[Mesa-dev] [PATCH 1/2] gallium/os: Add CPU time functions

Adds functions to query the elapsed CPU time of the current process or thread. Implements Linux support only. To be used by the gallium HUD. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/auxiliary/os/os_time.c | 48 ++ src/gallium/auxiliary/os/os_time.h

[Mesa-dev] [PATCH 2/2] gallium/hud: Add a frame time query

applications that do not do that. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/auxiliary/Makefile.sources | 1 + src/gallium/auxiliary/hud/hud_context.c| 18 + src/gallium/auxiliary/hud/hud_frame_time.c | 114 + src/gallium/auxiliary/hud/hud_private.h

[Mesa-dev] [PATCH] winsys/amdgpu: enlarge buffer_indices_hashlist

9.47% (old value) (percentage of CPU usage in render thread as determined by perf) The time spent in amdgpu_add_buffer self is ~4.2% in all cases and for 4096 the time needed to clear the hashlist is still < 0.10%, so I am not expecting significant regressions. Signed-off-by: Bas Nieuw

[Mesa-dev] [PATCH] radeonsi: Lazily re-set sampler views after disabling DCC

Clear DCC flags if necessary when binding a new sampler_view. Also rebind all sampler views so that the sampler views that were already bound are also up to date. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/r600_texture.c | 2 -- src/gallium/drivers/radeonsi

Re: [Mesa-dev] [PATCH 1/4] gallium/radeon: notify all contexts when cmasks are enabled/disabled

FWIW The series is Reviewed-by: Bas Nieuwenhuizen - Bas On Thu, Mar 10, 2016 at 12:07 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > There is an annoying corner case that I stumbled across while looking into > piglit's > arb_shader_image_load_store/executi

[Mesa-dev] [PATCH v2] radeonsi: Lazily re-set sampler views after disabling DCC

Clear DCC flags if necessary when binding a new sampler view. v2: Do not reset DCC flags of bound sampler views. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/r600_texture.c | 2 -- src/gallium/drivers/radeonsi/si_descriptors.c | 10 +++--- 2 files changed, 7

Re: [Mesa-dev] [PATCH 13/17] radeonsi: Enable ARB_framebuffer_no_attachments

On Sat, Mar 19, 2016 at 7:41 AM, Edward O'Callaghan wrote: > Signed-off-by: Edward O'Callaghan > --- > src/gallium/drivers/radeonsi/si_pipe.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/src/gallium/drivers/radeonsi/si_pipe.c > b/src/gallium/drivers/radeonsi/si_pi

Re: [Mesa-dev] [PATCH 01/17] gallium: Add PIPE_CAP_MSAA_MODES

That would limit us to supporting sample counts for which we have texture formats. As far as I understand with radeonsi we can support 16 samples without any attachments, but all formats are limited to <= 8 samples. - Bas On Sat, Mar 19, 2016 at 3:00 PM, Ilia Mirkin wrote: > Why not derive this

Re: [Mesa-dev] [PATCH 01/17] gallium: Add PIPE_CAP_MSAA_MODES

On Sat, Mar 19, 2016 at 4:25 PM, Ilia Mirkin wrote: > On Sat, Mar 19, 2016 at 11:14 AM, Bas Nieuwenhuizen > wrote: >> That would limit us to supporting sample counts for which we have >> texture formats. >> >> As far as I understand with radeonsi we can sup

[Mesa-dev] [PATCH] mesa: replace gl_context->Multisample._Enabled with _mesa_is_multisample_enabled.

This removes any dependency on driver validation of the number of framebuffer samples. Signed-off-by: Bas Nieuwenhuizen --- src/mesa/drivers/dri/i965/brw_util.h | 5 +++-- src/mesa/drivers/dri/i965/gen6_cc.c| 6 +++--- src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH] mesa: replace gl_context->Multisample._Enabled with _mesa_is_multisample_enabled.

ek Olšák >> >> Somebody from Intel or VMWare might want to take a look too. >> >> Marek >> >> On Tue, Mar 22, 2016 at 2:58 AM, Bas Nieuwenhuizen >> wrote: >>> >>> This removes any dependency on driver validation of the number of >>

Re: [Mesa-dev] [PATCH] mesa: replace gl_context->Multisample._Enabled with _mesa_is_multisample_enabled.

Can someone push this patch for me? Thanks, Bas Nieuwenhuizen On Wed, Mar 23, 2016 at 4:21 PM, Brian Paul wrote: > No regressions here, Bas. > > -Brian > > > On 03/22/2016 01:27 PM, Brian Paul wrote: >> >> If you can wait until tomorrow, Bas, I'll do an

[Mesa-dev] [RFC 2/4] gallium: Add fixed block size to pipe_compute_state

This avoids shader variants for radeonsi, or if we go with shader variants, it lets us compile an initial variant. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/trace/tr_dump_state.c | 4 src/gallium/include/pipe/p_state.h| 6 ++ src/gallium/tests/trivial/compute.c

[Mesa-dev] [RFC 4/4] gallium: Distinguish between shader IR's in get_compute_param.

cally depend on the compiler. Radeonsi needs these params as we need to restrict the number of used registers for blocks of > 256 threads, we do not know the block size in advance for clover and cannot use shader variants due to clover only giving native code. Signed-off-by: Bas Nieuwenhuizen

[Mesa-dev] [RFC 1/4] gallium: add compute shader IR type

Needed to distinguish NATIVE and TGSI compute shaders on compute state creation. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/trace/tr_dump_state.c | 2 ++ src/gallium/include/pipe/p_state.h| 1 + src/gallium/state_trackers/clover/core/kernel.cpp | 1 + src

[Mesa-dev] [RFC 0/4] Gallium interface change for compute shaders

These patches contain some interface changes that I want to use for my compute shader work for radeonsi. I am interested in any input or objections on the patches, especially the fourth one. Thanks, Bas Nieuwenhuizen Bas Nieuwenhuizen (4): gallium: add compute shader IR type gallium: Add

[Mesa-dev] [RFC 3/4] gallium: Add global buffer memory barrier bit

Currently radeonsi synchronizes after every dispatch and Clover does nothing to synchronize. This is overzealous, especially with GL compute, so add a barrier for global buffers. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/include/pipe/p_defines.h | 1 + src/gallium

[Mesa-dev] [PATCH] mesa/st: Fix NULL access if no fragment shader is bound

Signed-off-by: Bas Nieuwenhuizen --- src/mesa/state_tracker/st_atom_constbuf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/state_tracker/st_atom_constbuf.c b/src/mesa/state_tracker/st_atom_constbuf.c index 4d9b344..a980dbe 100644 --- a/src/mesa/state_tracker

Re: [Mesa-dev] [PATCH] mesa/st: Fix NULL access if no fragment shader is bound

Mon, Mar 28, 2016 at 6:05 PM, Miklós Máté wrote: > On 03/28/2016 05:01 PM, Bas Nieuwenhuizen wrote: >> >> Signed-off-by: Bas Nieuwenhuizen >> --- >> src/mesa/state_tracker/st_atom_constbuf.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >&

[Mesa-dev] [PATCH v3 03/14] radeonsi: Define build_tbuffer_store_dwords earlier to support new users.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 138 +++ 1 file changed, 69 insertions(+), 69 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium

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