Re: [PATCH] qmp: Stabilize preconfig

Paolo Bonzini writes: > On 11/12/21 12:48, Markus Armbruster wrote: >>> The monitor starts, the question is the availability of the event loop. >> >> What does the event loop depend on? > > It depends on moving the relevant code out of qemu_init (at least > conditionally, as is the case for wha

[RFC v3 5/5] *-user: move safe-syscall.* to common-user

Move linux-user/safe-syscall.S to common-user/common-safe-syscall.S and replace it with a #include "common-safe-syscall.S" so that bsd-user can also use it. Also move safe-syscall.h so that it can define a few more externs. Signed-off-by: Warner Losh --- common-user/common-safe-syscall.S

[RFC v3 1/5] linux-user: Add host_signal_set_pc to set pc in mcontext

Add a new function host_signal_set_pc to set the next pc in an mcontext. The caller should ensure this is a valid PC for execution. Signed-off-by: Warner Losh Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- linux-user/host/aarch64/host-signal.h | 5 + linux-user/host

[RFC v3 2/5] linux-user/signal.c: Create a common rewind_if_in_safe_syscall

All instances of rewind_if_in_safe_syscall are the same, differing only in how the instruction point is fetched from the ucontext and the size of the registers. Use host_signal_pc and new host_signal_set_pc interfaces to fetch the pointer to the PC and adjust if needed. Delete all the old copies of

[RFC v3 4/5] common-user: Adjust system call return on FreeBSD

All the *-users generally use the negative errno return codes to signal errno for a system call. FreeBSD's system calls, on the other hand, returns errno, not -errno. Add ifdefs for FreeBSD to make the adjustment on the 4 hosts that we have support for. Signed-off-by: Warner Losh --- common-use

[RFC v3 3/5] linux-user/safe-syscall.inc.S: Move to common-user

Move all the safe_syscall.inc.S files to common-user. They are almost identical between linux-user and bsd-user to re-use. Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- {linux-user => common-user}/host/aarch64/safe-syscall.inc.S | 0 {linux-user => common-user}/host/arm/safe-sys

[RFC v3 0/5] linux-user: simplify safe signal handling

This is a quick RFC to see if something like this is worth doing. I've created a new interface host_signal_set_pc. This allows us to move all the nearly identical copies of rewind_if_in_safe_syscall into signal.c. This reduces the amount of code that needs to be rewritten for bsd-user's adaptatio

Re: [PATCH v10 04/26] target/loongarch: Add fixed point arithmetic instruction translation

On 11/12/21 22:05, Richard Henderson wrote: On 11/12/21 7:53 AM, Song Gao wrote: +# +# Fields +# +%rd  0:5 +%rj  5:5 +%rk  10:5 +%sa2 15:2 +%si12    10:s12 +%ui12    10:12 +%si16    10:s16 +%si20    5:s20 You should only create separate field definitions like this when they ar

Re: QEMU on x64

Hi folks! Wanted to share some documentation if you all want to give QEMU a try within WinDbg. This is something we've been invested in supporting. - Link to public project: https://github.com/microsoft/WinDbg-Samples/tree/master/Exdi/exdigdbsrv

Re: [PATCH] qmp: Stabilize preconfig

On 11/12/21 12:48, Markus Armbruster wrote: The monitor starts, the question is the availability of the event loop. What does the event loop depend on? It depends on moving the relevant code out of qemu_init (at least conditionally, as is the case for what is in qmp_x_exit_preconfig). This

Re: Guests wont start with 15 pcie-root-port devices

On Fri, 12 Nov 2021 17:53:42 + Daniel P. Berrangé wrote: > On Fri, Nov 12, 2021 at 12:35:07PM -0500, Brian Rak wrote: > > In 6.1, a guest with 15 empty pcie-root-port devices will not boot properly > > - it just hangs on "Guest has not initialized the display (yet).".  As soon > > as I remove

Re: [PATCH v4 0/1] hw/hyperv/vmbus: Is it maintained?

On Fri, Nov 12, 2021 at 09:32:31PM +0300, Vladimir Sementsov-Ogievskiy wrote: > Add Den and Roman (his new address) Thanks, I missed it on the list indeed. > 06.11.2021 16:41, Philippe Mathieu-Daudé wrote: > > This is the 4th time I send this patch. Is the VMBus infrastructure > > used / maintain

Re: [PATCH 01/10] vhost-user-blk: reconnect on any error during realize

On Fri, Nov 12, 2021 at 12:37:59PM +0100, Kevin Wolf wrote: > Am 12.11.2021 um 08:39 hat Roman Kagan geschrieben: > > On Thu, Nov 11, 2021 at 06:52:30PM +0100, Kevin Wolf wrote: > > > Am 11.11.2021 um 16:33 hat Roman Kagan geschrieben: > > > > vhost-user-blk realize only attempts to reconnect if th

[PATCH 2/2] vdpa: Check for existence of opts.vhostdev

Since net_init_vhost_vdpa is trying to open it. Not specifying it in the command line crash qemu. Fixes: 7327813d17 ("vhost-vdpa: open device fd in net_init_vhost_vdpa()") Signed-off-by: Eugenio Pérez --- net/vhost-vdpa.c | 4 1 file changed, 4 insertions(+) diff --git a/net/vhost-vdpa.c b

[PATCH 1/2] vdpa: Replace qemu_open_old by qemu_open at

There is no reason to keep using the old one, since we neither use the variadics arguments nor open it with O_DIRECT. Also, net_client_init1, the caller of net_init_vhost_vdpa, wants all net_client_init_fun to use Error API, so it's a good step in that direction. Signed-off-by: Eugenio Pérez ---

[PATCH 0/2] vdpa: Check for existence of opts.vhostdev

Since net_init_vhost_vdpa is trying to open it. Not specifying it in the command line crash qemu. While we're at it, stop using qemu_open_old. Eugenio Pérez (2): vdpa: Replace qemu_open_old by qemu_open at vdpa: Check for existence of opts.vhostdev net/vhost-vdpa.c | 6 +- 1 file change

Re: [RFC PATCH 1/6] mm: Add F_SEAL_GUEST to shmem/memfd

On Thu, Nov 11, 2021 at 10:13:40PM +0800, Chao Peng wrote: > The new seal is only allowed if there's no pre-existing pages in the fd > and there's no existing mapping of the file. After the seal is set, no > read/write/mmap from userspace is allowed. > > Signed-off-by: Kirill A. Shutemov > Signed

Re: [PATCH 04/10] chardev/char-fe: don't allow EAGAIN from blocking read

On Fri, Nov 12, 2021 at 12:24:06PM +0400, Marc-André Lureau wrote: > Hi > > On Thu, Nov 11, 2021 at 7:44 PM Roman Kagan wrote: > > > As its name suggests, ChardevClass.chr_sync_read is supposed to do a > > blocking read. The only implementation of it, tcp_chr_sync_read, does > > set the underly

Re: [PATCH v2 1/1] Jobs based on custom runners: add CentOS Stream 8

On Thu, Nov 11, 2021 at 1:06 PM Cleber Rosa wrote: > > This introduces three different parts of a job designed to run > on a custom runner managed by Red Hat. The goals include: > > a) propose a model for other organizations that want to onboard > their own runners, with their specific pla

Re: [PATCH v4 0/1] hw/hyperv/vmbus: Is it maintained?

Add Den and Roman (his new address) 06.11.2021 16:41, Philippe Mathieu-Daudé wrote: This is the 4th time I send this patch. Is the VMBus infrastructure used / maintained? Should we deprecate & remove? $ ./scripts/get_maintainer.pl -f hw/hyperv/vmbus.c -f include/hw/hyperv/vmbus.h get_mai

Re: [PATCH v1] job.c: add missing notifier initialization

03.11.2021 19:21, Emanuele Giuseppe Esposito wrote: It seems that on_idle list is not properly initialized like the other notifiers. Signed-off-by: Emanuele Giuseppe Esposito --- job.c | 1 + 1 file changed, 1 insertion(+) diff --git a/job.c b/job.c index dbfa67bb0a..54db80df66 100644 --- a

Re: Guests wont start with 15 pcie-root-port devices

On Fri, Nov 12, 2021 at 12:35:07PM -0500, Brian Rak wrote: > In 6.1, a guest with 15 empty pcie-root-port devices will not boot properly > - it just hangs on "Guest has not initialized the display (yet).".  As soon > as I remove the last pcie-root-port, the guest begins starting up normally.  Yes,

Guests wont start with 15 pcie-root-port devices

In 6.1, a guest with 15 empty pcie-root-port devices will not boot properly - it just hangs on "Guest has not initialized the display (yet).".  As soon as I remove the last pcie-root-port, the guest begins starting up normally.  My qemu command line: /usr/libexec/qemu-kvm -name guest=xxx,debug

[RFC PATCH] hw/intc: clean-up error reporting for failed ITS cmd

While trying to debug a GIC ITS failure I saw some guest errors that had poor formatting as well as leaving me confused as to what failed. As most of the checks aren't possible without a valid dte split that check apart and then check the other conditions in steps. This avoids us relying on undefin

Re: [RFC PATCH v1 1/3] virtio: introduce virtio_force_modern()

On Fri, 12 Nov 2021 16:55:10 +0100 Cornelia Huck wrote: > On Fri, Nov 12 2021, Halil Pasic wrote: > > > On Fri, 29 Oct 2021 16:53:25 +0200 > > Cornelia Huck wrote: > > > >> On Fri, Oct 29 2021, Halil Pasic wrote: > >> > >> > Legacy vs modern should be detected via transport specific mean

Re: Fwd: New Defects reported by Coverity Scan for QEMU

On 10/11/2021 05:18, Cédric Le Goater wrote: Hello Luis, Coverity found a couple of issues which seem related to the DFP patchset. Could you please take a look ? Thanks, C. Forwarded Message Subject: New Defects reported by Coverity Scan for QEMU Date: Tue, 9 Nov 2021 22:09

Re: [PATCH v2 10/10] iotests/030: Unthrottle parallel jobs in reverse

11.11.2021 15:08, Hanna Reitz wrote: See the comment for why this is necessary. Signed-off-by: Hanna Reitz --- tests/qemu-iotests/030 | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/tests/qemu-iotests/030 b/tests/qemu-iotests/030 index 5fb65b4bef..567bf1da67 1

Re: [PATCH v2 09/10] block: Let replace_child_noperm free children

11.11.2021 15:08, Hanna Reitz wrote: In most of the block layer, especially when traversing down from other BlockDriverStates, we assume that BdrvChild.bs can never be NULL. When it becomes NULL, it is expected that the corresponding BdrvChild pointer also becomes NULL and the BdrvChild object i

Re: [RFC PATCH v1 1/3] virtio: introduce virtio_force_modern()

On Fri, Nov 12 2021, Halil Pasic wrote: > On Fri, 29 Oct 2021 16:53:25 +0200 > Cornelia Huck wrote: > >> On Fri, Oct 29 2021, Halil Pasic wrote: >> >> > Legacy vs modern should be detected via transport specific means. We >> > can't wait till feature negotiation is done. Let us introduce >> >

Re: [PATCH v4 14/25] include/systemu/blockdev.h: global state API

Subject: s/systemu/sysemu/ On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: blockdev functions run always under the BQL lock. Signed-off-by: Emanuele Giuseppe Esposito --- include/sysemu/blockdev.h | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/i

Re: [RFC PATCH v1 1/3] virtio: introduce virtio_force_modern()

On Fri, 29 Oct 2021 16:53:25 +0200 Cornelia Huck wrote: > On Fri, Oct 29 2021, Halil Pasic wrote: > > > Legacy vs modern should be detected via transport specific means. We > > can't wait till feature negotiation is done. Let us introduce > > virtio_force_modern() as a means for the transport c

Re: [PATCH v4 13/25] include/sysemu/blockdev.h: move drive_add and inline drive_def

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: drive_add is only used in softmmu/vl.c, so it can be a static function there,and drive_def is only a particular use case of qemu_opts_parse_noisily, so it can be inlined. Also remove drive_mark_claimed_by_board, as it is only defined but not i

Re: [RFC PATCH v2 1/5] virtio: introduce virtio_force_modern()

On Fri, Nov 12 2021, Halil Pasic wrote: > Legacy vs modern should be detected via transport specific means. We > can't wait till feature negotiation is done. Let us introduce > virtio_force_modern() as a means for the transport code to signal > that the device should operate in modern mode (becau

Re: [PATCH v2 08/10] block: Let replace_child_tran keep indirect pointer

11.11.2021 15:08, Hanna Reitz wrote: As of a future commit, bdrv_replace_child_noperm() will clear the indirect BdrvChild pointer passed to it if the new child BDS is NULL. bdrv_replace_child_tran() will want to let it do that, but revert this change in its abort handler. For that, we need to ha

Re: [PATCH v4 12/25] assertions for blockob.h global state API

Subject: s/blockob.h/blockjob.h/ On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- blockjob.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/blockjob.c b/blockjob.c index fbd6c7d873..4982f6a2b5 10

[PATCH v5 10/18] target/riscv: support for 128-bit bitwise instructions

The 128-bit bitwise instructions do not need any function prototype change as the functions can be applied independently on the lower and upper part of the registers. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/translate.c | 21 +++-- 1 file cha

[PATCH v5 14/18] target/riscv: support for 128-bit M extension

Mult are generated inline (using a cool trick pointed out by Richard), but for div and rem, given the complexity of the implementation of these instructions, we call helpers to produce their behavior. From an implementation standpoint, the helpers return the low part of the results, while the high

[PATCH v5 15/18] target/riscv: adding high part of some csrs

Adding the high part of a very minimal set of csr. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas Reviewed-by: Richard Henderson --- target/riscv/cpu.h | 4 target/riscv/machine.c | 2 ++ 2 files changed, 6 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cp

Re: [PATCH v4 10/25] assertions for blockjob_int.h

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- blockjob.c | 4 1 file changed, 4 insertions(+) diff --git a/blockjob.c b/blockjob.c index 4bad1408cb..fbd6c7d873 100644 --- a/blockjob.c +++ b/blockjob.c @@

[PATCH v5 08/18] target/riscv: moving some insns close to similar insns

lwu and ld are functionally close to the other loads, but were after the stores in the source file. Similarly, xor was away from or and and by two arithmetic functions, while the immediate versions were nicely put together. This patch moves the aforementioned loads after lhu, and xor above or, wher

[PATCH v5 16/18] target/riscv: helper functions to wrap calls to 128-bit csr insns

Given the side effects they have, the csr instructions are realized as helpers. We extend this existing infrastructure for 128-bit sized csr. We return 128-bit values using the same approach as for div/rem. Theses helpers all call a unique function that is currently a fallback on the 64-bit version

[PATCH v5 07/18] target/riscv: setup everything so that riscv128-softmmu compiles

This patch is kind of a mess because several files have to be slightly modified to allow for a new target. In the current status, we have done our best to have RV64 and RV128 under the same RV64 umbrella, but there is still work to do to have a single executable for both. In particular, we have no

[PATCH v5 09/18] target/riscv: accessors to registers upper part and 128-bit load/store

Get function to retrieve the 64 top bits of a register, stored in the gprh field of the cpu state. Set function that writes the 128-bit value at once. The access to the gprh field can not be protected at compile time to make sure it is accessed only in the 128-bit version of the processor because w

[PATCH v5 12/18] target/riscv: support for 128-bit shift instructions

Handling shifts for 32, 64 and 128 operation length for RV128, following the general framework for handling various olens proposed by Richard. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/insn32.decode | 10 ++ target/riscv/translate.c

[PATCH v5 13/18] target/riscv: support for 128-bit arithmetic instructions

Addition of 128-bit adds and subs in their various sizes, "set if less than"s and branches. Refactored the code to have a comparison function used for both stls and branches. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/insn32.decode | 3 + target

[PATCH v5 02/18] exec/memop: Adding signed quad and octo defines

Adding defines to handle signed 64-bit and unsigned 128-bit quantities in memory accesses. Signed-off-by: Frédéric Pétrot --- include/exec/memop.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/exec/memop.h b/include/exec/memop.h index 72c2f0ff3d..2a885f3917 100644 --- a/incl

[PATCH v5 11/18] target/riscv: support for 128-bit U-type instructions

Adding the 128-bit version of lui and auipc, and introducing to that end a "set register with immediate" function to handle extension on 128 bits. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas Reviewed-by: Richard Henderson --- target/riscv/translate.c| 21 ++

[PATCH v5 01/18] exec/memop: Adding signedness to quad definitions

Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit of hand edition to keep assignments aligned. Signed-off-by: Frédéric Pétrot Reviewed-by: Philippe Mathieu-Daudé --- include/exec/memop.h

[PATCH v5 18/18] target/riscv: actual functions to realize crs 128-bit insns

The csrs are accessed through function pointers: we add 128-bit read operations in the table for three csrs (writes fallback to the 64-bit version as the upper 64-bit information is handled elsewhere): - misa, as mxl is needed for proper operation, - mstatus and sstatus, to return sd In addition, w

[PATCH v5 05/18] target/riscv: separation of bitwise logic and arithmetic helpers

Introduction of a gen_logic function for bitwise logic to implement instructions in which not propagation of information occurs between bits and use of this function on the bitwise instructions. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas Reviewed-by: Richard Henderson --- tar

[PATCH v5 17/18] target/riscv: modification of the trans_csrxx for 128-bit support

As opposed to the gen_arith and gen_shift generation helpers, the csr insns do not have a common prototype, so the choice to generate 32/64 or 128-bit helper calls is done in the trans_csrxx functions. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas Reviewed-by: Richard Henderson -

[PATCH v5 04/18] target/riscv: additional macros to check instruction support

Given that the 128-bit version of the riscv spec adds new instructions, and that some instructions that were previously only available in 64-bit mode are now available for both 64-bit and 128-bit, we added new macros to check for the processor mode during translation. Although RV128 is a superset o

[PATCH v5 06/18] target/riscv: array for the 64 upper bits of 128-bit registers

The upper 64-bit of the 128-bit registers have now a place inside the cpu state structure, and are created as globals for future use. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/cpu.h | 2 ++ target/riscv/cpu.c | 9 + target/riscv/machine.

[PATCH v5 03/18] qemu/int128: addition of div/rem 128-bit operations

Addition of div and rem on 128-bit integers, using the 128/64->128 divu and 64x64->128 mulu in host-utils. These operations will be used within div/rem helpers in the 128-bit riscv target. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- include/qemu/int128.h | 6 ++ util/int1

[RFC PATCH v2 1/5] virtio: introduce virtio_force_modern()

Legacy vs modern should be detected via transport specific means. We can't wait till feature negotiation is done. Let us introduce virtio_force_modern() as a means for the transport code to signal that the device should operate in modern mode (because a modern driver was detected). A new callback

[RFC PATCH v2 4/5] vhost: push features to backend on force_modern

In vhost we don't push the features to the vhost device when the features are set, but when the vhost device is started. This can lead to problems when config space is implemented in the vhost device, and the driver does some early config space reading (early in a sense that it precedes setting FEA

[PATCH v5 00/18] Adding partial support for 128-bit riscv target

This series of patches provides partial 128-bit support for the riscv target architecture, namely RVI and RVM, with minimal csr support. First of all thanks for the feedback on v4 and guidance for v5. This v5 mainly corrects flaws in the implementation pointed out by Richard and Philippe: - split

[RFC PATCH v2 5/5] virtio-net: handle force_modern for vhost

Signed-off-by: Halil Pasic --- Inspired by virtio_net_set_features() which I don't quite understand. Why do we have to do vhost_net_ack_features() for each possible queue? --- hw/net/virtio-net.c | 20 1 file changed, 20 insertions(+) diff --git a/hw/net/virtio-net.c b/hw/n

[RFC PATCH v2 3/5] virtio-pci: use virtio_force_modern()

Let us detect usage via the modern interface by tapping into the place that implements the 'modern' reset. Signed-off-by: Halil Pasic --- hw/virtio/virtio-pci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 6e16e2705c..8dd862da21 100644

[RFC PATCH v2 2/5] virtio-ccw: use virtio_force_modern()

The fact that revision > 0 was negotiated implies that VIRTIO_VERSION_1 aka modern must be used. This negotiation is done before the obligatory reset. Let us call virtio_force_modern() after the reset if revision > 0 was negotiated, so that the VIRTIO_VERSION_1 feature can be set, and endianness st

[RFC PATCH v2 0/5] virtio: early detect 'modern' virtio

This is an early RFC for a transport specific early detecton of modern virtio, which is most relevant for transitional devices on big endian platforms, when drivers access the config space before FEATURES_OK is set. The most important part that is missing here is fixing all the problems that arise

Re: [PATCH v4 08/25] block: introduce assert_bdrv_graph_writable

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: We want to be sure that the functions that write the child and parent list of a bs are under BQL and drain. BQL prevents from concurrent writings from the GS API, while drains protect from I/O. TODO: drains are missing in some functions using

[PATCH v2 2/3] target/ppc: Implement Vector Extract Mask

From: Matheus Ferst Implement the following PowerISA v3.1 instructions: vextractbm: Vector Extract Byte Mask vextracthm: Vector Extract Halfword Mask vextractwm: Vector Extract Word Mask vextractdm: Vector Extract Doubleword Mask vextractqm: Vector Extract Quadword Mask Suggested-by: Richard Hen

[PATCH v2 3/3] target/ppc: Implement Vector Mask Move insns

From: Matheus Ferst Implement the following PowerISA v3.1 instructions: mtvsrbm: Move to VSR Byte Mask mtvsrhm: Move to VSR Halfword Mask mtvsrwm: Move to VSR Word Mask mtvsrdm: Move to VSR Doubleword Mask mtvsrqm: Move to VSR Quadword Mask mtvsrbmi: Move to VSR Byte Mask Immediate Suggested-by:

[PATCH v2 1/3] target/ppc: Implement Vector Expand Mask

From: Matheus Ferst Implement the following PowerISA v3.1 instructions: vexpandbm: Vector Expand Byte Mask vexpandhm: Vector Expand Halfword Mask vexpandwm: Vector Expand Word Mask vexpanddm: Vector Expand Doubleword Mask vexpandqm: Vector Expand Quadword Mask Reviewed-by: Richard Henderson Sig

[PATCH v2 0/3] target/ppc: Implement Vector Expand/Extract Mask and Vector Mask

From: Matheus Ferst This is a small patch series just to allow Ubuntu 21.10 to boot with -cpu POWER10. Glibc 2.34 is using vextractbm, so the init is killed by SIGILL without the second patch of this series. The other two insns. are included as they are somewhat close to Vector Extract Mask (at l

Re: [PATCH v10 04/26] target/loongarch: Add fixed point arithmetic instruction translation

On 11/12/21 7:53 AM, Song Gao wrote: +# +# Fields +# +%rd 0:5 +%rj 5:5 +%rk 10:5 +%sa2 15:2 +%si1210:s12 +%ui1210:12 +%si1610:s16 +%si205:s20 You should only create separate field definitions like this when they are complex: e.g. the logical field is disjoint

Re: [PATCH v4 07/25] assertions for block_int global state API

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- block.c | 17 + block/backup.c | 1 + block/block-backend.c | 3 +++ block/commit.c

Re: [PULL 03/54] target/ppc: Move load and store floating point instructions to decodetree

On 11/10/21 18:04, Laurent Vivier wrote: On 10/11/2021 17:56, Cédric Le Goater wrote: On 11/10/21 17:33, Laurent Vivier wrote: On 09/11/2021 06:51, David Gibson wrote: From: Fernando Eckhardt Valle Move load floating point instructions (lfs, lfsu, lfsx, lfsux, lfd, lfdu, lfdx, lfdux) and st

Re: does drive_get_next(IF_NONE) make sense?

Thomas Huth writes: > On 03/11/2021 09.41, Markus Armbruster wrote: >> Peter Maydell writes: >> >>> Does it make sense for a device/board to do drive_get_next(IF_NONE) ? >> Short answer: hell, no! ;) > > Would it make sense to add an "assert(type != IF_NONE)" to drive_get() > to avoid such mis

Re: [PULL 0/3] ppc 6.2 queue

On 11/12/21 12:15 PM, Cédric Le Goater wrote: The following changes since commit 0a70bcf18caf7a61d480f8448723c15209d128ef: Update version for v6.2.0-rc0 release (2021-11-09 18:22:57 +0100) are available in the Git repository at: https://github.com/legoater/qemu/ tags/pull-ppc-2022

Re: [PATCH v2] hw/arm/virt: Expose empty NUMA nodes through ACPI

On Wed, 10 Nov 2021 12:01:11 +0100 David Hildenbrand wrote: > On 10.11.21 11:33, Igor Mammedov wrote: > > On Fri, 5 Nov 2021 23:47:37 +1100 > > Gavin Shan wrote: > > > >> Hi Drew and Igor, > >> > >> On 11/2/21 6:39 PM, Andrew Jones wrote: > >>> On Tue, Nov 02, 2021 at 10:44:08AM +1100, Gavi

Re: [PATCH for 6.2 v3 4/5] hw/i386/acpi-build: Deny control on PCIe Native Hot-plug in _OSC

On Fri, Nov 12, 2021 at 4:41 PM Igor Mammedov wrote: > > From: Julia Suvorova > > There are two ways to enable ACPI PCI Hot-plug: > > * Disable the Hot-plug Capable bit on PCIe slots. > > This was the first approach which led to regression [1-2], as > I/O space for a port is allocated onl

Re: [PATCH v4 04/25] include/sysemu/block-backend: split header into I/O and global state (GS) API

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: Similarly to the previous patches, split block-backend.h in block-backend-io.h and block-backend-global-state.h In addition, remove "block/block.h" include as it seems it is not necessary anymore, together with "qemu/iov.h" block-backend-comm

Re: [PATCH v4 02/25] include/block/block: split header into I/O and global state API

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: block.h currently contains a mix of functions: some of them run under the BQL and modify the block layer graph, others are instead thread-safe and perform I/O in iothreads. It is not easy to understand which function is part of which group (I/O

Re: [PATCH v2 07/10] transactions: Invoke clean() after everything else

11.11.2021 15:08, Hanna Reitz wrote: Invoke the transaction drivers' .clean() methods only after all .commit() or .abort() handlers are done. This makes it easier to have nested transactions where the top-level transactions pass objects to lower transactions that the latter can still use through

Re: [PATCH 0/6] RfC: try improve native hotplug for pcie root ports

On Fri, 12 Nov 2021 12:15:28 +0100 Gerd Hoffmann wrote: > On Thu, Nov 11, 2021 at 10:39:59AM -0500, Michael S. Tsirkin wrote: > > On Thu, Nov 11, 2021 at 01:09:05PM +0100, Gerd Hoffmann wrote: > > > Hi, > > > > > > > When the acpihp driver is used the linux kernel will just call the aml >

Re: [PATCH v4 06/25] include/block/block_int: split header into I/O and global state API

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: Similarly to the previous patch, split block_int.h in block_int-io.h and block_int-global-state.h block_int-common.h contains the structures shared between the two headers, and the functions that can't be categorized as I/O or global state. A

Re: [PATCH v2 06/10] block: Restructure remove_file_or_backing_child()

11.11.2021 15:08, Hanna Reitz wrote: As of a future patch, bdrv_replace_child_tran() will take a BdrvChild ** pointer. Prepare for that by getting such a pointer and using it where applicable, and (dereferenced) as a parameter for bdrv_replace_child_tran(). Signed-off-by: Hanna Reitz Reviewed

Re: [PATCH v2 05/10] block: Pass BdrvChild ** to replace_child_noperm

11.11.2021 15:08, Hanna Reitz wrote: bdrv_replace_child_noperm() modifies BdrvChild.bs, and can potentially set it to NULL. That is dangerous, because BDS parents generally assume that their children's .bs pointer is never NULL. We therefore want to let bdrv_replace_child_noperm() set the corre

Re: [PATCH v5 4/6] migration: Add zerocopy parameter for QMP/HMP for Linux

Juan Quintela writes: > Leonardo Bras wrote: >> Add property that allows zerocopy migration of memory pages, >> and also includes a helper function migrate_use_zerocopy() to check >> if it's enabled. >> >> No code is introduced to actually do the migration, but it allow >> future implementations

Re: [PATCH v5 4/6] migration: Add zerocopy parameter for QMP/HMP for Linux

Daniel P. Berrangé writes: > On Fri, Nov 12, 2021 at 12:04:33PM +0100, Juan Quintela wrote: >> Leonardo Bras wrote: [...] >> > diff --git a/migration/migration.c b/migration/migration.c >> > index abaf6f9e3d..add3dabc56 100644 >> > --- a/migration/migration.c >> > +++ b/migration/migration.c >

Re: [PATCH] qmp: Stabilize preconfig

Paolo Bonzini writes: > On 11/11/21 15:37, Markus Armbruster wrote: >>> 1) PHASE_NO_MACHINE - backends can already be created here, but no >>> machine exists yet >>> >>> 2) PHASE_MACHINE_CREATED - the machine object has been created. It's >>> not initialized, but it's there. >>> >>> 3) PHASE_ACC

Re: [PATCH 01/10] vhost-user-blk: reconnect on any error during realize

Am 12.11.2021 um 08:39 hat Roman Kagan geschrieben: > On Thu, Nov 11, 2021 at 06:52:30PM +0100, Kevin Wolf wrote: > > Am 11.11.2021 um 16:33 hat Roman Kagan geschrieben: > > > vhost-user-blk realize only attempts to reconnect if the previous > > > connection attempt failed on "a problem with the co

Re: [PATCH v4 03/25] assertions for block global state API

On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote: All the global state (GS) API functions will check that qemu_in_main_thread() returns true. If not, it means that the safety of BQL cannot be guaranteed, and they need to be moved to I/O. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by:

[PULL 2/3] spapr_numa.c: fix FORM1 distance-less nodes

From: Daniel Henrique Barboza Commit 71e6fae3a99 fixed an issue with FORM2 affinity guests with NUMA nodes in which the distance info is absent in machine_state->numa_state->nodes. This happens when QEMU adds a default NUMA node and when the user adds NUMA nodes without specifying the distances.

[PULL 0/3] ppc 6.2 queue

The following changes since commit 0a70bcf18caf7a61d480f8448723c15209d128ef: Update version for v6.2.0-rc0 release (2021-11-09 18:22:57 +0100) are available in the Git repository at: https://github.com/legoater/qemu/ tags/pull-ppc-2022 for you to fetch changes up to

[PATCH for 6.2 v3 5/5] tests: bios-tables-test update expected blobs

The changes are the result of 'hw/i386/acpi-build: Deny control on PCIe Native Hot-Plug in _OSC' which hides PCIE hotplug bit in host-bridge _OSC Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1)

[PULL 1/3] target/ppc: Fix register update on lf[sd]u[x]/stf[sd]u[x]

From: Matheus Ferst These instructions should update the GPR indicated by the field RA instead of RT. This error caused a regression on Mac OS 9 boot and some graphical glitches in OS X. Fixes: a39a106634a9 ("target/ppc: Move load and store floating point instructions to decodetree") Reported-b

Re: [PATCH 0/6] RfC: try improve native hotplug for pcie root ports

On Thu, Nov 11, 2021 at 10:39:59AM -0500, Michael S. Tsirkin wrote: > On Thu, Nov 11, 2021 at 01:09:05PM +0100, Gerd Hoffmann wrote: > > Hi, > > > > > When the acpihp driver is used the linux kernel will just call the aml > > > methods and I suspect the pci device will stay invisible then becaus

[PULL 3/3] ppc/mmu_helper.c: do not truncate 'ea' in booke206_invalidate_ea_tlb()

From: Daniel Henrique Barboza 'tlbivax' is implemented by gen_tlbivax_booke206() via gen_helper_booke206_tlbivax(). In case the TLB needs to be flushed, booke206_invalidate_ea_tlb() is called. All these functions, but booke206_invalidate_ea_tlb(), uses a 64-bit effective address 'ea'. booke206_i

[PATCH for 6.2 v3 3/5] bios-tables-test: Allow changes in DSDT ACPI tables

From: Julia Suvorova Prepare for changing the _OSC method in q35 DSDT. Signed-off-by: Julia Suvorova Signed-off-by: Igor Mammedov Acked-by: Ani Sinha --- tests/qtest/bios-tables-test-allowed-diff.h | 16 1 file changed, 16 insertions(+) diff --git a/tests/qtest/bios-tables-

Re: [PATCH 05/10] vhost-backend: avoid overflow on memslots_limit

On Fri, Nov 12, 2021 at 09:56:17AM +, Daniel P. Berrangé wrote: > On Fri, Nov 12, 2021 at 10:46:46AM +0300, Roman Kagan wrote: > > On Thu, Nov 11, 2021 at 06:59:43PM +0100, Philippe Mathieu-Daudé wrote: > > > On 11/11/21 16:33, Roman Kagan wrote: > > > > Fix the (hypothetical) potential problem

[PATCH for 6.2 v3 4/5] hw/i386/acpi-build: Deny control on PCIe Native Hot-plug in _OSC

From: Julia Suvorova There are two ways to enable ACPI PCI Hot-plug: * Disable the Hot-plug Capable bit on PCIe slots. This was the first approach which led to regression [1-2], as I/O space for a port is allocated only when it is hot-pluggable, which is determined by HPC bit.

[PATCH for 6.2 v3 2/5] hw/acpi/ich9: Add compat prop to keep HPC bit set for 6.1 machine type

From: Julia Suvorova To solve issues [1-2] the Hot Plug Capable bit in PCIe Slots will be turned on, while the switch to ACPI Hot-plug will be done in the DSDT table. Introducing 'x-keep-native-hpc' property disables the HPC bit only in 6.1 and as a result keeps the forced 'reserve-io' on pcie-r

[PATCH for 6.2 v3 1/5] pcie: rename 'native-hotplug' to 'x-native-hotplug'

Mark property as experimental/internal adding 'x-' prefix. Property was introduced in 6.1 and it should have provided ability to turn on native PCIE hotplug on port even when ACPI PCI hotplug is in use is user explicitly sets property on CLI. However that never worked since slot is wired to ACPI h

[PATCH for-6.2 v3 0/5] Fix Q35 ACPI PCI Hot-plug I/O issues

Changelog: v3: * drop unnecessary expected blobs v2: *

Re: [PATCH v5 4/6] migration: Add zerocopy parameter for QMP/HMP for Linux

On Fri, Nov 12, 2021 at 12:04:33PM +0100, Juan Quintela wrote: > Leonardo Bras wrote: > > Add property that allows zerocopy migration of memory pages, > > and also includes a helper function migrate_use_zerocopy() to check > > if it's enabled. > > > > No code is introduced to actually do the migra

Re: [PATCH v5 4/6] migration: Add zerocopy parameter for QMP/HMP for Linux

On Fri, Nov 12, 2021 at 02:10:39AM -0300, Leonardo Bras wrote: > Add property that allows zerocopy migration of memory pages, > and also includes a helper function migrate_use_zerocopy() to check > if it's enabled. > > No code is introduced to actually do the migration, but it allow > future imple

Re: [PATCH v5 4/6] migration: Add zerocopy parameter for QMP/HMP for Linux

Leonardo Bras wrote: > Add property that allows zerocopy migration of memory pages, > and also includes a helper function migrate_use_zerocopy() to check > if it's enabled. > > No code is introduced to actually do the migration, but it allow > future implementations to enable/disable this feature.

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