get value of the counter (which is used
to set the corresponding QEMUTimer). Patch 7 is a longstanding
TODO that is enabled by all these changes, limiting the maximum
timer frequency of a periodic timer.
Paolo
Paolo Bonzini (7):
hpet: fix and cleanup persistence of interrupt status
hpet: ign
as with a 64-bit write.
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 137 +-
hw/timer/trace-events | 3 +-
2 files changed, 44 insertions(+), 96 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 831e5a95b09..ac55dd1ebd6 100644
The variable "val" is used for two different purposes. As an intermediate
value when writing configuration registers, and to store the cleared bits
when writing ISR.
Use "new_val" for the former, and rename the variable so that it is clearer
for the latter case.
Signed-o
Store the full 64-bit value at which the timer should fire.
This makes it possible to skip the imprecise hpet_calculate_diff()
step, and to remove the clamping of the period to 31 or 63 bits.
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 111
If the period is set to a value that is too low, there could be no
time left to run the rest of QEMU. Do not trigger interrupts faster
than 1 MHz.
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c
led, in
order to set the ISR flag, so writes to HPET_TN_CFG must
not call hpet_del_timer()
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 60 +
1 file changed, 41 insertions(+), 19 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
in
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 4
hw/timer/trace-events | 1 +
2 files changed, 5 insertions(+)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 58073df02b5..bbb1e5f0897 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -585,6 +585,10 @@ static void
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index bbb1e5f0897..380e272fbeb 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -437,12 +437,12 @@ static uint64_t
On Sat, Jul 20, 2024 at 4:30 PM Peter Maydell wrote:
> If the HPET timer device is supposed to permit 64 bit writes and it is not
> doing so, then that needs to be fixed in the HPET timer device model, by
> making sure that its read/write functions correctly handle the size=8 case
> and then
On Wed, Jul 17, 2024 at 9:32 AM Thomas Huth wrote:
> > There is the pycotap dependency to produce TAP from pytest, but that's
> > probably something small enough to be vendored.
>
> The next version is only depending on pycotap now. I'm installing it in the
> venv there that we also install when
...@linaro.org
Signed-off-by: Paolo Bonzini
---
include/disas/capstone.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/disas/capstone.h b/include/disas/capstone.h
index e29068dd977..a11985151d3 100644
--- a/include/disas/capstone.h
+++ b/include/disas/capstone.h
@@ -3,6 +3,7 @@
#ifdef
qemu9.1, add the message there.
Signed-off-by: Boqiao Fu
Link:
https://lore.kernel.org/r/cafrhj6j9umk+hmzl+w+ke1yorcolpgbpuvvdku55sdxyigx...@mail.gmail.com
Signed-off-by: Paolo Bonzini
---
qemu-options.hx | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/qemu-options.hx b
, and also remove the stale comment. The deadlock glib bug
was fixed back in 2010 by b35820285668 ("gmain: move finalization of
GSource outside of context lock").
Suggested-by: Paolo Bonzini
Signed-off-by: Sergey Dyasli
Link:
https://lore.kernel.org/r/20240712092659.216206-1-sergey.dya...@nutani
From: Richard Henderson
Disconnect mmu index computation from the current pl
as stored in env->hflags.
Signed-off-by: Richard Henderson
Link:
https://lore.kernel.org/r/20240617161210.4639-2-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h |
0x.
Co-developed-by: TaiseiIto
Signed-off-by: TaiseiIto
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index ad881448bf3..4cb5393c0b5 100644
--- a/hw/timer/hpet.
/20240617161210.4639-4-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 481 +++
1 file changed, 259 insertions(+), 222 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index b985382d704..b6902ca3fba
From: Akihiko Odaki
Running qemu-system-aarch64 -M virt -nographic and terminating it will
result in a LeakSanitizer error due to remaining queued CPU work so
free it.
Signed-off-by: Akihiko Odaki
Link: https://lore.kernel.org/r/20240714-cpu-v1-1-19c2f8de2...@daynix.com
Signed-off-by: Paolo
.
This bug appears to have been in QEMU since the beginning.
Analyzed-by: Robert R. Henry
Co-developed-by: Robert R. Henry
Signed-off-by: Robert R. Henry
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 18 +-
1 file changed, 9
From: Song Gao
Signed-off-by: Song Gao
Link: https://lore.kernel.org/r/20240716031500.4193498-1-gaos...@loongson.cn
Signed-off-by: Paolo Bonzini
---
include/qemu/timer.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 5ce83c79112
hen became visible because gen_op_st_v
now receives op->ot instead of the "ot" returned by gen_pop_T0.
Analyzed-by: Clément Chigot
Fixes: 5e9e21bcc4d ("target/i386: move 60-BF opcodes to new decoder",
2024-05-07)
Tested-by: Clément Chigot
Reviewed-by: Richard Henderson
Signed-o
:
https://lore.kernel.org/r/20240617161210.4639-3-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index aee3d19f29b
is not clear if the processor
checks the busy bit in the IRET case.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 8a6d92b3583..a
This is how the steps are ordered in the manual. EFLAGS.NT is
overwritten after the fact in the saved image.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 85 +++-
1 file changed, 45 insertions(+), 40 deletions
-vm-type=off behavior that was previously in place, so
make it the default for 9.1+ machine types.
Cc: Daniel P. Berrangé
Cc: Paolo Bonzini
cc: k...@vger.kernel.org
Signed-off-by: Michael Roth
Reviewed-by: Daniel P. Berrangé
Link: https://lore.kernel.org/r/20240710041005.83720-1-michael.r
Add the MMU index to the StackAccess struct, so that it can be cached
or (in the next patch) computed from information that is not in
CPUX86State.
Co-developed-by: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 35
-by: Kevin Wolf
Signed-off-by: Fiona Ebner
Link: https://lore.kernel.org/r/20240710152529.1737407-1-f.eb...@proxmox.com
Signed-off-by: Paolo Bonzini
---
hw/scsi/scsi-bus.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 9e40b0c920b..53ef
Do not pre-decrement esp, let the macros subtract the appropriate
operand size.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b
When writing a new period, the clamping should use a maximum value
rather tyhan a bit mask. Also, when writing the high bits new_val
is shifted right by 32, so the maximum allowed period should also
be shifted right.
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 6 --
1 file changed
emory";
note however that it's not clear how the processor checks for segment
descriptors, and this check is not included in the AMD manual.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 110 ++-
1 file changed, 58
Capstone v6
Michael Roth (1):
i386/sev: Don't allow automatic fallback to legacy KVM_SEV*_INIT
Paolo Bonzini (9):
hpet: fix clamping of period
hpet: fix HPET_TN_SETVAL for high 32-bits of the comparator
target/i386/tcg: fix POP to memory in long mode
target/i386/tcg
ink: https://lore.kernel.org/r/20240715131403.223239-1-f.eb...@proxmox.com
Signed-off-by: Paolo Bonzini
---
hw/scsi/lsi53c895a.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
index eb9828dd5ef..f1935e53280 100644
--- a/hw/scsi/lsi53c895
Il mar 16 lug 2024, 20:10 Daniel P. Berrangé ha
scritto:
> On Tue, Jul 16, 2024 at 08:03:54PM +0200, Paolo Bonzini wrote:
> > Il mar 16 lug 2024, 18:45 John Snow ha scritto:
> >
> > > My only ask is that we keep the tests running in the custom venv
> > > en
Il mar 16 lug 2024, 18:45 John Snow ha scritto:
> My only ask is that we keep the tests running in the custom venv
> environment we set up at build time
>
Yes, they do, however pytest should also be added to pythondeps.toml if we
go this way.
If we move to pytest, it's possible we can
Il mar 16 lug 2024, 13:26 Thomas Huth ha scritto:
> The Avocado v88 that we use in QEMU is already on a life support
> system: It is not supported by upstream anymore, and with the latest
> versions of Python, it won't work anymore since it depends on the
> "imp" module that has been removed in
oject/qemu/-/issues/2142
Signed-off-by: Paolo Bonzini
---
hw/i386/sgx.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
index de76397bcfb..25b2055d653 100644
--- a/hw/i386/sgx.c
+++ b/hw/i386/sgx.c
@@ -266,10 +266,12 @@ void hmp_info_sgx(Mo
On Tue, Jul 16, 2024 at 2:46 PM Akihiko Odaki wrote:
>
> On 2024/07/16 19:43, Paolo Bonzini wrote:
> > On Tue, Jul 16, 2024 at 11:56 AM Daniel P. Berrangé
> > wrote:
> >>
> >> On Tue, Jul 16, 2024 at 11:06:57AM +0300, Michael Tokarev wrote:
> &g
On 7/13/24 13:54, TaiseiIto wrote:
Before this commit, there are 3 problems about HPET timer interrupts. First,
HPET periodic timers cause a too early interrupt before HPET main counter
value reaches a value written its comparator value register. Second,
disabled HPET timers whose comparator
On Tue, Jul 16, 2024 at 11:56 AM Daniel P. Berrangé wrote:
>
> On Tue, Jul 16, 2024 at 11:06:57AM +0300, Michael Tokarev wrote:
> > 16.07.2024 10:27, Akihiko Odaki wrote:
> > > qemu_get_runtime_dir() returns a dynamically allocated directory path
> > > that is appropriate for storing runtime
0x.
Co-developed-by: TaiseiIto
Signed-off-by: TaiseiIto
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 16be1278d09..85fb2c07ae3 100644
--- a/hw/timer/hpet.
Extracted from the patch that TaiseiIto tested.
While not sufficient to fix their problems, this is a step in the
right direction.
Paolo Bonzini (2):
hpet: fix clamping of period
hpet: fix HPET_TN_SETVAL for high 32-bits of the comparator
hw/timer/hpet.c | 25 -
1
When writing a new period, the clamping should use a maximum value
rather than a bit mask. Also, when writing the high bits new_val
is shifted right by 32, so the maximum allowed period should also
be shifted right.
Signed-off-by: Paolo Bonzini
---
hw/timer/hpet.c | 6 --
1 file changed, 4
> Manpage: the description of '-runs' didn't show this parameter will use
> setuid, so the customer might get confused when 'elevateprivileges=deny' is
> used. Since '-runas' is going to be deprecated and replaced by this
> parameter in the coming qemu9.1, add the message here.
Queued, thanks. I
Queued, thanks.
Paolo
Queued, thanks.
Paolo
Queued, thanks.
Paolo
Queued, thanks.
Paolo
Queued, thanks.
Paolo
Queued, thanks.
Paolo
Queued, thanks.
Paolo
:
https://lore.kernel.org/r/20240617161210.4639-3-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index aee3d19f29b
.
This bug appears to have been in QEMU since the beginning.
Analyzed-by: Robert R. Henry
Co-developed-by: Robert R. Henry
Signed-off-by: Robert R. Henry
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 18 +-
1 file changed, 9
emory";
note however that it's not clear how the processor checks for segment
descriptors, and this check is not included in the AMD manual.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 110 ++-
1 file changed, 58
-vm-type=off behavior that was previously in place, so
make it the default for 9.1+ machine types.
Cc: Daniel P. Berrangé
Cc: Paolo Bonzini
cc: k...@vger.kernel.org
Signed-off-by: Michael Roth
Reviewed-by: Daniel P. Berrangé
Link: https://lore.kernel.org/r/20240710041005.83720-1-michael.r
This is how the steps are ordered in the manual. EFLAGS.NT is
overwritten after the fact in the saved image.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 85 +++-
1 file changed, 45 insertions(+), 40 deletions
: Don't allow automatic fallback to legacy KVM_SEV_INIT,
but also don't use it by default
Michael Roth (1):
i386/sev: Don't allow automatic fallback to legacy KVM_SEV*_INIT
Paolo Bonzini (8):
target/i386/tcg: fix POP
From: Richard Henderson
Disconnect mmu index computation from the current pl
as stored in env->hflags.
Signed-off-by: Richard Henderson
Link:
https://lore.kernel.org/r/20240617161210.4639-2-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h |
/20240617161210.4639-4-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 481 +++
1 file changed, 259 insertions(+), 222 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index b985382d704..b6902ca3fba
Add the MMU index to the StackAccess struct, so that it can be cached
or (in the next patch) computed from information that is not in
CPUX86State.
Co-developed-by: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 35
, and also remove the stale comment. The deadlock glib bug
was fixed back in 2010 by b35820285668 ("gmain: move finalization of
GSource outside of context lock").
Suggested-by: Paolo Bonzini
Signed-off-by: Sergey Dyasli
Link:
https://lore.kernel.org/r/20240712092659.216206-1-sergey.dya...@nutani
count as explicit, not implicit
("kernel" in QEMU code), so that SMAP is not applied if DPL=3.
Analyzed-by: Robert R. Henry
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/249
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_hel
is not clear if the processor
checks the busy bit in the IRET case.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 809ee3d9833..0
hen became visible because gen_op_st_v
now receives op->ot instead of the "ot" returned by gen_pop_T0.
Analyzed-by: Clément Chigot
Fixes: 5e9e21bcc4d ("target/i386: move 60-BF opcodes to new decoder",
2024-05-07)
Tested-by: Clément Chigot
Reviewed-by: Richard Henderson
Signed-o
Do not pre-decrement esp, let the macros subtract the appropriate
operand size.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b
On 7/11/24 11:51, Sergey Dyasli wrote:
After 038b4217884c ("Revert "chardev: use a child source for qio input
source"") we've been observing the "iwp->src == NULL" assertion
triggering periodically during the initial capabilities querying by
libvirtd. One of possible backtraces:
Hi Sergey,
On 7/10/24 20:40, Paolo Bonzini wrote:
Il mer 10 lug 2024, 18:47 Richard Henderson
mailto:richard.hender...@linaro.org>> ha
scritto:
On 7/9/24 23:29, Paolo Bonzini wrote:
> This takes care of probing the vaddr range in advance, and is
also faster
> becau
On 7/10/24 20:02, Michael Morrell wrote:
I'm working on a port to a new architecture and was noticing a
discrepancy in where the disassembler code lives. There is a file
"target//disas.c" for 4 architectures (avr, loongarch,
openrisc, and rx), but a file "disas/.c" for 14 architectures
(if I
.
>
-1 is used for 64-bit masks only. They get unwieldy quickly. :)
Paolo
> On Tue, Jul 9, 2024 at 11:29 PM Paolo Bonzini wrote:
>
>> This includes bugfixes:
>> - allowing IRET from user mode to user mode with SMAP (do not use implicit
>> kernel accesses, which
Il mer 10 lug 2024, 18:47 Richard Henderson
ha scritto:
> On 7/9/24 23:29, Paolo Bonzini wrote:
> > This takes care of probing the vaddr range in advance, and is also faster
> > because it avoids repeated TLB lookups. It also matches the Intel manual
> > bette
On Wed, Jul 10, 2024 at 4:48 PM Zhao Liu wrote:
>
> On Tue, Jul 09, 2024 at 02:28:38PM +0200, Paolo Bonzini wrote:
> >
> > Here are the stopping points that I found over the last couple weeks:
> >
> > 1.56.0: 2021 edition
> > 1.59.0: const CStr::from_byte
hen became visible because gen_op_st_v
now receives op->ot instead of the "ot" returned by gen_pop_T0.
Analyzed-by: Clément Chigot
Fixes: 5e9e21bcc4d ("target/i386: move 60-BF opcodes to new decoder",
2024-05-07)
Tested-by: Clément Chigot
Signed-off-by: Paolo Bonzini
---
tar
ything else has worked fine
for you!),
Paolo
Thanks,
Clément
On Sat, Jun 8, 2024 at 10:36 AM Paolo Bonzini wrote:
From: Mark Cave-Ayland
Instead of directly implementing the writeback using gen_op_st_v(), use the
existing gen_writeback() function.
Suggested-by: Paolo Bonzini
Signed-off-by:
Hello! Thanks for looking after the HPET, which is not a very well
maintained device.
I am not sure your patch needs to mask the comparator with
timer->cmp &= 0xULL;
I think that's a bug in the "case HPET_TN_CMP + 4" part of
hpet_ram_write. The logic was changed in "hpet: Fix
Queued, thanks.
Paolo
From: Richard Henderson
Disconnect mmu index computation from the current pl
as stored in env->hflags.
Signed-off-by: Richard Henderson
Link:
https://lore.kernel.org/r/20240617161210.4639-2-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h |
Add the MMU index to the StackAccess struct, so that it can be cached
or (in the next patch) computed from information that is not in
CPUX86State.
Co-developed-by: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 35
once for far calls and returns
(including task switches), and using X86Access for TSS access.
Tested with a really ugly patch to kvm-unit-tests, included after signature.
Paolo Bonzini (7):
target/i386/tcg: Allow IRET from user mode to user mode with SMAP
target/i386/tcg: use PUSHL/PUSHW
.
This bug appears to have been in QEMU since the beginning.
Analyzed-by: Robert R. Henry
Co-developed-by: Robert R. Henry
Signed-off-by: Robert R. Henry
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git
:
https://lore.kernel.org/r/20240617161210.4639-3-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index aee3d19f29b
This is how the steps are ordered in the manual. EFLAGS.NT is
overwritten after the fact in the saved image.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 85 +++-
1 file changed, 45 insertions(+), 40 deletions(-)
diff --git a/target/i386/tcg
/20240617161210.4639-4-richard.hender...@linaro.org
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 439 +++
1 file changed, 238 insertions(+), 201 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 0653bc10936..6b3de7a2be4
emory";
note however that it's not clear how the processor checks for segment
descriptors, and this check is not included in the AMD manual.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 101 ++-
1 file changed, 51 insertions(+), 50 deletions(-)
Do not pre-decrement esp, let the macros subtract the appropriate
operand size.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index
count as explicit, not implicit
("kernel" in QEMU code), so that SMAP is not applied if DPL=3.
Analyzed-by: Robert R. Henry
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/249
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 13 ++---
1 file changed, 6
is not clear if the processor
checks the busy bit in the IRET case.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 1430f477c43..25af9d4a4ec 100644
--- a/target/i386
On Tue, Jul 9, 2024 at 2:18 PM Daniel P. Berrangé wrote:
> My thought is that the initial merge focuses only on the build system
> integration. So that's basically patches 1 + 2 in this series.
>
> Patch 3, the high level APIs is where I see most of the work and
> collaboration being needed, but
On Tue, Jul 9, 2024 at 2:09 PM Peter Maydell wrote:
> * what is the actual baseline requirement? We definitely want
>to support "using rustup on an older system" (should be no
>problem) and "current distro building QEMU using the distro's
>rust", I assume. It would certainly be nice
On Tue, Jul 9, 2024 at 9:38 AM Manos Pitsidianakis
wrote:
> Ah, alright. That wasn't obvious because that e-mail was not directed
> to me nor did it mention my name :)
Oh, ok. Sorry about that. Generally when I say "we" I include as large
a part of the community as applicable.
> I do not want
Il lun 8 lug 2024, 20:39 Manos Pitsidianakis
ha scritto:
>
>
> On Mon, 8 Jul 2024, 21:34 Paolo Bonzini, wrote:
>
>>
>>
>> Il lun 8 lug 2024, 19:12 Daniel P. Berrangé ha
>> scritto:
>>
>>> That's exactly why I suggest its a pre-requisite for
Il lun 8 lug 2024, 19:12 Daniel P. Berrangé ha
scritto:
> That's exactly why I suggest its a pre-requisite for merging
> this. Unless we're able to demonstrate that we can enable
> Rust on all our CI platforms, the benefits of Rust will
> not be realized in QEMU, and we'll have never ending
Il lun 8 lug 2024, 18:33 Daniel P. Berrangé ha
scritto:
> This series is still missing changes to enable build on all targets
> during CI, including cross-compiles, to prove that we're doing the
> correct thing on all our targetted platforms. That's a must have
> before considering it suitable
On 7/4/24 14:15, Manos Pitsidianakis wrote:
Changes from v3->v4:
- Add rust-specific files to .gitattributes
- Added help text to scripts/cargo_wrapper.py arguments (thanks Stephan)
- Split bindings separate crate
- Add declarative macros for symbols exported to QEMU to said crate
- Lowered MSRV
On Thu, Jul 4, 2024 at 2:16 PM Manos Pitsidianakis
wrote:
> +ARM PL011 Rust device
> +M: Manos Pitsidianakis
> +S: Maintained
> +F: rust/pl011/
No need for this, since it's covered by rust/. If (when) it replaces
the main one, the PL011-specific stanza will be assigned to ARM
maintainers (while
On 7/4/24 14:15, Manos Pitsidianakis wrote:
Add rust/qemu-api, which exposes rust-bindgen generated FFI bindings and
provides some declaration macros for symbols visible to the rest of
QEMU.
Signed-off-by: Manos Pitsidianakis
---
MAINTAINERS | 7 ++
On Thu, Jul 4, 2024 at 2:16 PM Manos Pitsidianakis
wrote:
>
> Add mechanism to generate rust hw targets that depend on a custom
> bindgen target for rust bindings to C.
>
> This way bindings will be created before the rust crate is compiled.
>
> The bindings will end up in
On Thu, Jul 4, 2024 at 2:16 PM Manos Pitsidianakis
wrote:
>
> Add options for Rust in meson_options.txt, meson.build, configure to
> prepare for adding Rust code in the followup commits.
>
> `rust` is a reserved meson name, so we have to use an alternative.
> `with_rust` was chosen.
Did you find
Il sab 6 lug 2024, 17:57 Li, Xin3 ha scritto:
> >> The bits in the secondary vmexit controls are not supported, and in
> general the same
> >> is true for the secondary vmexit case. I think it's better to not
> include the vmx-entry-
> >> load-fred bit either, and only do the vmxcap changes.
>
Hi, first of all I want to clarify the raison d'etre for this posting,
which I have also explained to Manos. Nothing you see here is code
that will be certainly included in QEMU; it's (mostly) throwaway by
design. I don't have much attachment to any of the code except perhaps
the casting and
On Thu, Jul 4, 2024 at 9:26 PM Pierrick Bouvier
wrote:
> > Patches 9-10 deal with how to define new subclasses in Rust. They are
> > a lot less polished and less ready. There is probably a lot of polish
> > that could be applied to make the code look nicer, but I guess there is
> > always time
;-cpu host".
Signed-off-by: Paolo Bonzini
---
target/i386/confidential-guest.h | 24
target/i386/kvm/kvm.c| 5 +
2 files changed, 29 insertions(+)
diff --git a/target/i386/confidential-guest.h b/target/i386/confidential-guest.h
index 532e172a60b..7
pabilities()
i386/sev: Fallback to the default SEV device if none provided in
sev_get_capabilities()
Paolo Bonzini (11):
meson: move shared_module() calls where modules are already walked
meson: move block.syms dependency out of libblock
meson: merge plugin_ldflags into emulator
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